Synthesizable AXI4 crossbar with a full UVM verification environment — RTL, SVA, coverage, stress, and CI.

Deterministic hardware verification engine that fails CI when connected components violate electrical or interface contracts.

High-performance discrete-time voltage-mode PID controller for a 100 kHz synchronous buck converter implemented on a Xilinx Spartan-7 FPGA. Features parallel hardware execution, 23-bit fixed-point precision, dual-stage saturation, and cycle-accurate verification. Validated on physical hardware.

Wokwi Arduino Uno NTC thermistor temperature validation bench with ADC conversion, Python analysis, plots, and automated PDF reporting.

Basys 3 FPGA avionics visualization and sensor-evidence stack with VGA HUDs, I2C/SPI/UART telemetry bridges, focused Verilog benches, and Vivado flows.

Automated acceptance toolkit for Linux deep learning GPU servers

Simulation-only validation ladder for mapping neural weight matrices to HRM-style photonic transfer functions.

Hardware-constrained validation of SRFM metastable structural diagnostics on IBM Quantum systems.

Utility scripts and diagnostics for Arduino boards — modular, reusable, and hardware-focused.

A framework that ensures that Nitrux runs in a predictable, supportable, and well-understood environment.

Linux hardware preflight: 18 sensor/memory/peripheral checks via /proc, /sys, syscalls, serial I/O — JSON + Markdown reports

Hardware Control GateKeeper Kernels for AI inference within frameworks.

Python tool for parsing memory validation logs and generating clean CSV and Markdown reports for server hardware testing workflows.

Production-style Python automation framework for server hardware & SSD validation | pytest | CI/CD | defect classification | GitHub Actions

PyLabRobot code that has been run on real hardware, not just in simulation. Hamilton Microlab STAR protocols (ResolveDNA PTA/WGA, amplicon-seq) validated on the instrument with a human at the E-stop.

How much of an end-to-end lab run happens without a human, and what is in the way. Costs a protocol across every reverse-engineered instrument against the command sets actually decoded, and refuses to flatter the lab.

A deterministic, multi-phase C++ PCIe protocol analyzer for decoding TLP traffic, validating transactions, modeling system behavior, and performing fault injection with cross-domain correlation (PCIe, CXL, NVMe).

Public-safe embedded hardware, PCB, firmware, breadboard, and validation patterns for intelligent infrastructure.

Linux Validation Suite (LVS): Linux hardware validation with CLI/TUI stress testing, telemetry, result review, and QA smoke tests.

Automated test infrastructure for 6+ power supply topologies. Precision measurement, real-time control, LED monitoring, and MySQL integration. Each test generates QR-code linked quality metrics. Embedded systems & hardware-software integration.