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FROMLIST: Enable ICE for UFS on Hamoa IoT EVK #848

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FROMLIST: Enable ICE for UFS on Hamoa IoT EVK #848

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4e1cf20
FROMLIST: qcom,inline-crypto-engine: Add x1e80100 support
wenjz-qualcomm Jul 22, 2026
f6f19f2
FROMLIST: hamoa: Add ICE node for UFS inline encryption
wenjz-qualcomm Jul 22, 2026
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1 change: 1 addition & 0 deletions Documentation/devicetree/bindings/crypto/qcom,inline-crypto-engine.yaml
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Original file line number Diff line number Diff line change
Expand Up @@ -23,6 +23,7 @@ properties:
- qcom,sm8550-inline-crypto-engine
- qcom,sm8650-inline-crypto-engine
- qcom,sm8750-inline-crypto-engine
- qcom,x1e80100-inline-crypto-engine
- const: qcom,inline-crypto-engine

reg:
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14 changes: 14 additions & 0 deletions arch/arm64/boot/dts/qcom/hamoa.dtsi
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Expand Up @@ -3089,6 +3089,7 @@
};
};


cryptobam: dma-controller@1dc4000 {
compatible = "qcom,bam-v1.7.4", "qcom,bam-v1.7.0";
reg = <0x0 0x01dc4000 0x0 0x28000>;
Expand Down Expand Up @@ -3932,6 +3933,8 @@
phys = <&ufs_mem_phy>;
phy-names = "ufsphy";

qcom,ice = <&ice>;

#reset-cells = <1>;

status = "disabled";
Expand Down Expand Up @@ -3977,6 +3980,17 @@
};
};

ice: crypto@1d88000 {
compatible = "qcom,x1e80100-inline-crypto-engine",
"qcom,inline-crypto-engine";
reg = <0x0 0x01d88000 0x0 0x18000>;
clocks = <&gcc GCC_UFS_PHY_ICE_CORE_CLK>,
<&gcc GCC_UFS_PHY_AHB_CLK>;
clock-names = "core",
"iface";
power-domains = <&gcc GCC_UFS_PHY_GDSC>;
};

tcsr_mutex: hwlock@1f40000 {
compatible = "qcom,tcsr-mutex";
reg = <0 0x01f40000 0 0x20000>;
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