dmaengine: qcom: gpi: order event ring pointer reads - #45
Conversation
|
Qualification bundle is ready in draft PR #46.
The full Ubuntu configuration emitted five non-fatal warnings in unrelated, PR #46 records the controlled hardware protocol. Because software mute did not Keep this PR draft and unmerged until the physical gates in #46 pass. |
250e623 to
f35a9f8
Compare
Message-only submission cleanupThe commit message was wrapped to satisfy full-patch |
The device writes event elements into coherent memory before publishing its event ring read pointer. Both gpi_process_events() and gpi_mark_stale_events() read that pointer through readl_relaxed() and then consume the event memory without an ordering guarantee. On architectures such as arm64, this can expose a published event before all its fields are visible. Denali QSPI exposed this as an accepted completion whose length was observed as zero. Use ordered MMIO reads only for the event pointer. Keep all other register accesses relaxed. This follows the ordered ioread32() pattern used by the Qualcomm IPA GSI event-ring consumer. Fixes: 5d0c353 ("dmaengine: qcom: Add GPI dma driver") Signed-off-by: Leon Silcott <leon@boasi.io>
f35a9f8 to
bd9f5e2
Compare
Summary
Use ordered MMIO reads for the GPI event-ring read pointer before consuming
events written by the device into coherent memory.
This is a one-variable replacement for the withdrawn early-EOT experiment in
#42. It does not change QSPI completion policy, descriptor ownership, SPI HID,
the MSHW0485 driver, recovery, runtime PM, or userspace.
Evidence boundary
Proven from the failed beta boots:
3628 and reported residue 3628, so the event length was observed as zero;
invalid-cookie kernel BUG, so that patch and its aggregate were withdrawn.
The missing read-side ordering is a hypothesis, not yet a hardware-qualified
root cause. The GPI driver reads the device producer pointer with
readl_relaxed()and immediately readsdma_alloc_coherent()event memory.Linux's MMIO contract reserves ordered
readl()for exactly this relationship.The analogous Qualcomm IPA GSI event-ring path also uses ordered
ioread32().Scope and guardrail
gpi_read_ev_rp()changes;gpi_process_events()andgpi_mark_stale_events();accessor;
suppression, or cookie workaround is introduced.
The change is generic because ordering a device publication pointer before its
coherent payload is a GPI core correctness requirement, not Denali hardware
policy. SP11 qualification can validate the exposed QSPI case; wider upstream
submission will still require review and regression coverage on other GPI
clients.
Validation
git diff --check: passcheckpatch.pl: 0 errors, 0 warnings, 0 checksdrivers/dma/qcom/gpi.obuild using the v7 configuration: passcorrecting the MMIO/DMA and split-pointer analysis
Hardware qualification
Keep this PR draft and unmerged until a touch-only beta build passes on the
Surface Pro 11 with tracing disabled:
SP11 QSPI pair failed, zero-length completion, DMA cookie BUG,host-fault loop, or loss of the IPTS bridge;
overhead.
Failure with the same residue signature falsifies this hypothesis and this PR
must be closed rather than expanded in place.
Merge policy
Do not merge on compile evidence alone. Do not combine this test with the
speaker repair or any other unqualified topic.