refactor: unify runtime SIMD kernel dispatch - #105
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- Align dispatch across distance estimation, rotation, and matrix kernels - Isolate Eigen implementations for each ISA backend - Preserve portable wheel performance and search accuracy - Clean up includes and improve static-analysis coverage - Add regression tests and document dispatch conventions
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Summary
This PR centralizes runtime SIMD dispatch across the library, isolates ISA-specific implementations into dedicated translation units, and lets portable builds use optimized kernels without globally enabling
-march=native.It covers distance estimation, matrix operations, rotation, quantization, FastScan, IVF, HNSW, PiPNN, and SymphonyQG. It also converts SymphonyQG into a concrete float-only class and moves its implementation out of the public header.
Python APIs and persisted index formats remain unchanged.
Main changes
Centralized SIMD dispatch
space_float.cpptospace_generic.cpp.SymphonyQG
QuantizedGraph<float>andQuantizedQuery<float>with concrete float-only classes.qg.hppand move implementations tosrc/index/qg.cpp.C++ callers must replace
QuantizedGraph<float>withQuantizedGraph.IVF, HNSW, and PiPNN
Testing and tooling
CONTRIBUTING.mdandAGENTS.md.Performance
Benchmarks used a Xeon Gold 6418H, GCC 14.3 Release builds, one thread pinned to CPU 2, and fixed saved indexes and queries.
IVF and HNSW portable/native gap
Negative values mean portable was faster.
PiPNN construction
Median construction time decreased from
0.460 sto0.260 s, a 43.4% latency reduction and approximately 1.77× throughput improvement. Initial-graph nearest-neighbor coverage remained unchanged.SymphonyQG
Workload: 8,192 vectors × 128 dimensions, 256 queries, L2,
k=10, degree 32, shared raw/4-bit/8-bit indexes.Portable latency improved by approximately 2.4–7.0% versus the original portable baseline. The unified AVX2 implementation changed native latency by between −1.6% and +3.7% relative to the previous compiler-vectorized native path.
Correctness
1.52587890625e-5, within the established2e-5tolerance.Verification
git diff --checkpassed.AVX-512 execution was verified on the benchmark host. AVX2 implementations were covered by capability-guarded direct backend tests; separate AVX2-only hardware was not available.