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4 changes: 4 additions & 0 deletions benchmarks/single_node/fixed_seq_len/dsv4_fp4_mi355x_vllm.sh
Original file line number Diff line number Diff line change
Expand Up @@ -46,6 +46,10 @@ fi

export VLLM_ROCM_USE_AITER=1
export VLLM_ROCM_USE_AITER_MOE=1
# Keep the upstream ROCm recipe knobs explicit. The shared-expert fusion
# self-disables when this checkpoint's shared-expert path is not eligible.
export VLLM_ROCM_USE_AITER_FUSION_SHARED_EXPERTS=1
export VLLM_ROCM_QUICK_REDUCE_QUANTIZATION=INT4

SERVER_LOG=/workspace/server.log

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Original file line number Diff line number Diff line change
Expand Up @@ -41,6 +41,10 @@ fi

export VLLM_ROCM_USE_AITER=1
export VLLM_ROCM_USE_AITER_MOE=1
# Keep the upstream ROCm recipe knobs explicit. The shared-expert fusion
# self-disables when this checkpoint's shared-expert path is not eligible.
export VLLM_ROCM_USE_AITER_FUSION_SHARED_EXPERTS=1
export VLLM_ROCM_QUICK_REDUCE_QUANTIZATION=INT4

SERVER_LOG=/workspace/server.log
PORT=${PORT:-8888}
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19 changes: 9 additions & 10 deletions configs/amd-master.yaml
Original file line number Diff line number Diff line change
Expand Up @@ -1194,14 +1194,13 @@ dsv4-fp4-mi355x-sglang-mtp:
#
# DeepSeek-V4-Pro is FP4+FP8 mixed (FP4 MoE expert weights, FP8 for the
# rest); InferenceX classifies this as fp4 — same as the sister sglang
# and atom DSv4 mi355x entries below. Image and serving flags follow the
# validated recipe from vllm-project/recipes#433: AITER+AITER_LINEAR, mp
# executor, triton_unfused MoE (required for the FP4 expert format),
# async scheduling, max-num-seqs=128, max-num-batched-tokens=8192,
# gpu-mem-util=0.6. TP8 sweeps conc 4-64; DEP8 has a single conc=64
# probe to validate the ROCm DP+EP path.
# and atom DSv4 mi355x entries below. The serving recipe enables AITER,
# shared-expert fusion, and INT4 quick-reduce explicitly; the pinned nightly
# then auto-selects its ROCm DeepSeek-V4 mHC, sparse-indexer, attention, and
# compressor-GEMM optimizations. Shared-expert fusion self-disables when the
# checkpoint path is not eligible.
dsv4-fp4-mi355x-vllm:
image: vllm/vllm-openai-rocm:nightly-09663abde0f50944a8d5ea30120666024b503faa
image: vllm/vllm-openai-rocm:nightly-7c5dc571cbd1064ecc8a9b1045637ff647aa22cb
model: deepseek-ai/DeepSeek-V4-Pro
model-prefix: dsv4
runner: mi355x
Expand All @@ -1221,10 +1220,10 @@ dsv4-fp4-mi355x-vllm:
# vllm-project/vllm#43385 (ROCm DeepSeek-V4 MTP, merged 2026-05-24, included in
# v0.22.0). Full conc 4-512 range maps the complete crossover curve: MTP wins
# at low batch (PR perf data: +75% @ conc1, +38% @ conc8) and falls behind STP
# above ~conc32 (-37% @ conc32). Image reuses the base entry's v0.22.0 ROCm
# build, which already contains the MTP commit.
# above ~conc32 (-37% @ conc32). Image reuses the base entry's pinned ROCm
# nightly, which includes the MTP path and subsequent DSV4 kernel updates.
dsv4-fp4-mi355x-vllm-mtp:
image: vllm/vllm-openai-rocm:nightly-09663abde0f50944a8d5ea30120666024b503faa
image: vllm/vllm-openai-rocm:nightly-7c5dc571cbd1064ecc8a9b1045637ff647aa22cb
model: deepseek-ai/DeepSeek-V4-Pro
model-prefix: dsv4
runner: mi355x
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11 changes: 11 additions & 0 deletions perf-changelog.yaml
Original file line number Diff line number Diff line change
Expand Up @@ -6821,3 +6821,14 @@
description:
- "Refresh to collect TensorRT-LLM server metrics."
pr-link: https://github.com/SemiAnalysisAI/InferenceX/pull/2774

- config-keys:
- dsv4-fp4-mi355x-vllm
- dsv4-fp4-mi355x-vllm-mtp
scenario-type:
- fixed-seq-len
description:
- "Bump the DeepSeek-V4-Pro FP4 MI355X 8k/1k STP and MTP images from nightly-09663abde0f50944a8d5ea30120666024b503faa to the 2026-09-01 ROCm nightly nightly-7c5dc571cbd1064ecc8a9b1045637ff647aa22cb (digest sha256:f0bdaf5217a09949842b45c1ea1f12260d3205ec81f143b320dfc2eb3ec95e55)."
- "Pick up the latest automatic ROCm DeepSeek-V4 optimizations, including fused mHC post/pre plus RMSNorm, gfx950 C4A top-k dispatch, fused C4 compressor GEMMs, fused SWA q/kv RMSNorm plus q FP8 quantization, and medium-batch cooperative top-k tuning."
- "Keep the existing VLLM_ROCM_USE_AITER=1, VLLM_ROCM_USE_AITER_MOE=1, and --moe-backend aiter settings, and explicitly add VLLM_ROCM_USE_AITER_FUSION_SHARED_EXPERTS=1 plus VLLM_ROCM_QUICK_REDUCE_QUANTIZATION=INT4 to both STP and MTP paths. The current checkpoint's shared-expert path does not satisfy the latest vLLM fusion conditions, so that fusion flag self-disables while preserving recipe parity."
pr-link: https://github.com/SemiAnalysisAI/InferenceX/pull/2792