feat: emit minimal proxy-aware DMA fences on the NVIDIA GPU target (MARA B1)

[Garfee023]

Summary

Implements the first phase (B1) of MARA's minimal proxy-aware fence placement for DMA edges, gated off by default. Also bundles the required build-toolchain restore so the PR is self-contained (builds on a clean checkout).

Changes

Build toolchain (prerequisite)

The public repo ships a libc++-built LLVM, but 66aa348 cherry-picked the internal gcc/libstdc++ config, breaking the build (unable to find library -lstdc++fs). This restores the clang++/-stdlib=libc++ toolchain and drops the stdc++fs link.

DMA fence insertion (B1, opt-in)

• Adds NVGPUTarget::SelectDMAFences (conservative, storage-direction keyed): GLOBAL→SHARED → producer global/threads/release + consumer shared/threads/acquire; SHARED→GLOBAL → producer shared/threads/release.
• Moves FenceInsertion into the semantic routine so the co2ir frontend (NoCodegen=true) observes the annotations.
• Normalizes unannotated buffer storage via ProjectStorage (canonical GLOBAL).
• Resolves AUTO (NONE) fence scope to the space's natural coherence level (GLOBAL→DEVICE, SHARED→GROUP) in emitFenceKinds, mirroring the explicit sync.fence path.

Gated off by default

--insert-dma-fences now defaults to false (was true) — the placement is still conservative (not yet minimal), so it stays opt-in until the elision work (B3) lands. Enable with --insert-dma-fences=true.

Test plan

• New tools/coir/tests/irgen/dma-fence.co (runs co2ir --insert-dma-fences=true) asserts resolved fences for G2S and S2G edges.
• Updated tests/cli/insert_dma_fences.co for the new default (default: false).
• Full regression: lit 754 pass / 1 pre-existing fail / 2 expected fails; standalone 21/21; coir 132/132.

Notes

• The feature is CoIR-observable only in this phase; the -t cute AST path consumes the notes in B2.
• Scope resolution is required because the fence notes flow through to the CUDA/HIP backends, which require a concrete scope.