GitHub - v0r0bb/uart_pl: PL-based UART IP core interfaced with the PS in Zynq 7000 SoC · GitHub

Name		Name	Last commit message	Last commit date
docs		docs
inc		inc
peakRDL		peakRDL
rtl		rtl
src		src
tb		tb
.gitignore		.gitignore
Makefile		Makefile
run_sim.tcl		run_sim.tcl
tree.txt		tree.txt

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PL-based UART IP core interfaced with the PS in Zynq 7000 SoC

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