Here are
15 public repositories
matching this topic...
Updated
Jun 5, 2026
Verilog
Introduction to Computer Systems (II), Spring 2021
基于LoongArch32/MIPS32指令集的七级流水线CPU。2023年龙芯杯(NSCSCC)个人赛参赛作品。
Updated
Apr 24, 2025
VHDL
顺序单/双发射LA32R处理器 (龙芯杯2024) A LA32R CPU in chisel
Updated
Jan 25, 2026
Scala
Updated
Sep 6, 2024
Assembly
USTC YeXiHu Team NSCSCC 2026 LA32R out-of-order processor core in Chisel. 中国科学技术大学也西湖队龙芯杯参赛项目。
Updated
Sep 8, 2026
Scala
NSCSCC “龙芯杯” 2024 个人赛 LoongArch 赛道三等奖
Updated
Aug 17, 2024
VHDL
HITSZ 404 NOT FOUND NSCSCC22 project
Updated
Sep 8, 2022
SystemVerilog
System-on-chip design for NOP in NSCSCC 2023.
Updated
Aug 21, 2023
Verilog
2025年第九届龙芯杯个人赛三等奖作品 LA赛道 110MHZ顺序双发射流水线
Updated
Aug 26, 2025
Verilog
Updated
Aug 24, 2024
VHDL
Third Prize in the 2024 Loongson Cup Individual Competition MIPS Track
Updated
Aug 25, 2026
Assembly
LoongArch LA32R CPU for XC7A200T FPGA with a documented 120 MHz source baseline.
Updated
Aug 26, 2026
Verilog
A 32-bit MIPS CPU in NSCSCC 2021.
Updated
May 28, 2023
Scala
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