Fully-differential asynchronous non-binary 12-bit SAR-ADC in SKY130, free to re-use under Apache-2.0 license
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Mar 13, 2025 - Verilog
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icdesign
Here are 9 public repositories matching this topic...
A simple MOSFET model with only 5-DC-parameters for circuit simulation
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May 28, 2026
Design analog ICs tailored to system requirements with a solid grasp of CMOS technology. Gain proficiency in circuit analysis and master tools like ngspice, xschem, Magic, and Python for full custom design and verification.
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Aug 3, 2025 - SourcePawn
Design of Differential Input Single Ended Output Single Stage Amplifier
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Sep 15, 2021
This repository contains all the designs done by Shreyas Singh in the VLSI related Labs-Digital VLSI design(5th semester) and Current Mode Analog VLSI desig(6th sem)
current vlsi cadence-virtuoso vlsi-physical-design propagation-delay analog-ic-design ltspice ptl nand-memory icdesign digital-ic-design current-mode-circuits nor-memory current-conveyor operational-mode-amplifier current-feedback-amplifier translinear-circuits negative-impedence-converter
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May 9, 2026
The SPI Slave with Single Port RAM project demonstrates the implementation of a high-performance SPI slave interface with integrated single-port RAM. The design utilizes a finite state machine (FSM) with different encoding styles to achieve optimal timing performance.
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Jan 4, 2025 - Verilog
Inter-OS Migration of CAD Tools for IC Design
java open-source opensource magic perl foss tcl eda cad design-flow tcl-tk icdesign interos-migration
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Jun 5, 2023
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