loongarch: Use intrinsics::simd for vsat[u]

crates/core_arch/src/loongarch64/lasx/generated.rs

@@ -75,22 +75,6 @@ unsafe extern "unadjusted" {
     fn __lasx_xvsubi_wu(a: __v8i32, b: u32) -> __v8i32;
     #[link_name = "llvm.loongarch.lasx.xvsubi.du"]
     fn __lasx_xvsubi_du(a: __v4i64, b: u32) -> __v4i64;
-    #[link_name = "llvm.loongarch.lasx.xvsat.b"]
-    fn __lasx_xvsat_b(a: __v32i8, b: u32) -> __v32i8;
-    #[link_name = "llvm.loongarch.lasx.xvsat.h"]
-    fn __lasx_xvsat_h(a: __v16i16, b: u32) -> __v16i16;
-    #[link_name = "llvm.loongarch.lasx.xvsat.w"]
-    fn __lasx_xvsat_w(a: __v8i32, b: u32) -> __v8i32;
-    #[link_name = "llvm.loongarch.lasx.xvsat.d"]
-    fn __lasx_xvsat_d(a: __v4i64, b: u32) -> __v4i64;
-    #[link_name = "llvm.loongarch.lasx.xvsat.bu"]
-    fn __lasx_xvsat_bu(a: __v32u8, b: u32) -> __v32u8;
-    #[link_name = "llvm.loongarch.lasx.xvsat.hu"]
-    fn __lasx_xvsat_hu(a: __v16u16, b: u32) -> __v16u16;
-    #[link_name = "llvm.loongarch.lasx.xvsat.wu"]
-    fn __lasx_xvsat_wu(a: __v8u32, b: u32) -> __v8u32;
-    #[link_name = "llvm.loongarch.lasx.xvsat.du"]
-    fn __lasx_xvsat_du(a: __v4u64, b: u32) -> __v4u64;
     #[link_name = "llvm.loongarch.lasx.xvavg.b"]
     fn __lasx_xvavg_b(a: __v32i8, b: __v32i8) -> __v32i8;
     #[link_name = "llvm.loongarch.lasx.xvavg.h"]
@@ -1211,78 +1195,6 @@ pub fn lasx_xvsubi_du<const IMM5: u32>(a: m256i) -> m256i {
     unsafe { transmute(__lasx_xvsubi_du(transmute(a), IMM5)) }
 }
 
-#[inline]
-#[target_feature(enable = "lasx")]
-#[rustc_legacy_const_generics(1)]
-#[unstable(feature = "stdarch_loongarch", issue = "117427")]
-pub fn lasx_xvsat_b<const IMM3: u32>(a: m256i) -> m256i {
-    static_assert_uimm_bits!(IMM3, 3);
-    unsafe { transmute(__lasx_xvsat_b(transmute(a), IMM3)) }
-}
-
-#[inline]
-#[target_feature(enable = "lasx")]
-#[rustc_legacy_const_generics(1)]
-#[unstable(feature = "stdarch_loongarch", issue = "117427")]
-pub fn lasx_xvsat_h<const IMM4: u32>(a: m256i) -> m256i {
-    static_assert_uimm_bits!(IMM4, 4);
-    unsafe { transmute(__lasx_xvsat_h(transmute(a), IMM4)) }
-}
-
-#[inline]
-#[target_feature(enable = "lasx")]
-#[rustc_legacy_const_generics(1)]
-#[unstable(feature = "stdarch_loongarch", issue = "117427")]
-pub fn lasx_xvsat_w<const IMM5: u32>(a: m256i) -> m256i {
-    static_assert_uimm_bits!(IMM5, 5);
-    unsafe { transmute(__lasx_xvsat_w(transmute(a), IMM5)) }
-}
-
-#[inline]
-#[target_feature(enable = "lasx")]
-#[rustc_legacy_const_generics(1)]
-#[unstable(feature = "stdarch_loongarch", issue = "117427")]
-pub fn lasx_xvsat_d<const IMM6: u32>(a: m256i) -> m256i {
-    static_assert_uimm_bits!(IMM6, 6);
-    unsafe { transmute(__lasx_xvsat_d(transmute(a), IMM6)) }
-}
-
-#[inline]
-#[target_feature(enable = "lasx")]
-#[rustc_legacy_const_generics(1)]
-#[unstable(feature = "stdarch_loongarch", issue = "117427")]
-pub fn lasx_xvsat_bu<const IMM3: u32>(a: m256i) -> m256i {
-    static_assert_uimm_bits!(IMM3, 3);
-    unsafe { transmute(__lasx_xvsat_bu(transmute(a), IMM3)) }
-}
-
-#[inline]
-#[target_feature(enable = "lasx")]
-#[rustc_legacy_const_generics(1)]
-#[unstable(feature = "stdarch_loongarch", issue = "117427")]
-pub fn lasx_xvsat_hu<const IMM4: u32>(a: m256i) -> m256i {
-    static_assert_uimm_bits!(IMM4, 4);
-    unsafe { transmute(__lasx_xvsat_hu(transmute(a), IMM4)) }
-}
-
-#[inline]
-#[target_feature(enable = "lasx")]
-#[rustc_legacy_const_generics(1)]
-#[unstable(feature = "stdarch_loongarch", issue = "117427")]
-pub fn lasx_xvsat_wu<const IMM5: u32>(a: m256i) -> m256i {
-    static_assert_uimm_bits!(IMM5, 5);
-    unsafe { transmute(__lasx_xvsat_wu(transmute(a), IMM5)) }
-}
-
-#[inline]
-#[target_feature(enable = "lasx")]
-#[rustc_legacy_const_generics(1)]
-#[unstable(feature = "stdarch_loongarch", issue = "117427")]
-pub fn lasx_xvsat_du<const IMM6: u32>(a: m256i) -> m256i {
-    static_assert_uimm_bits!(IMM6, 6);
-    unsafe { transmute(__lasx_xvsat_du(transmute(a), IMM6)) }
-}
-
 #[inline]
 #[target_feature(enable = "lasx")]
 #[unstable(feature = "stdarch_loongarch", issue = "117427")]

crates/core_arch/src/loongarch64/lasx/portable.rs

@@ -896,6 +896,80 @@ impl_vvvv!("lasx", lasx_xvfnmsub_d, simd_ext_fnmsub, m256d, f64x4);
 impl_vugv!("lasx", lasx_xvinsgr2vr_w, simd_insert, m256i, i32x8, i32, 3);
 impl_vugv!("lasx", lasx_xvinsgr2vr_d, simd_insert, m256i, i64x4, i64, 2);
 
+// VSAT — signed saturation
+#[inline]
+#[target_feature(enable = "lasx")]
+#[rustc_legacy_const_generics(1)]
+#[unstable(feature = "stdarch_loongarch", issue = "117427")]
+pub fn lasx_xvsat_b<const IMM: u32>(a: m256i) -> m256i {
+    static_assert_uimm_bits!(IMM, 3);
+    unsafe { transmute(simd_ext_sat_signed(transmute::<m256i, i8x32>(a), IMM)) }
+}
+
+#[inline]
+#[target_feature(enable = "lasx")]
+#[rustc_legacy_const_generics(1)]
+#[unstable(feature = "stdarch_loongarch", issue = "117427")]
+pub fn lasx_xvsat_h<const IMM: u32>(a: m256i) -> m256i {
+    static_assert_uimm_bits!(IMM, 4);
+    unsafe { transmute(simd_ext_sat_signed(transmute::<m256i, i16x16>(a), IMM)) }
+}
+
+#[inline]
+#[target_feature(enable = "lasx")]
+#[rustc_legacy_const_generics(1)]
+#[unstable(feature = "stdarch_loongarch", issue = "117427")]
+pub fn lasx_xvsat_w<const IMM: u32>(a: m256i) -> m256i {
+    static_assert_uimm_bits!(IMM, 5);
+    unsafe { transmute(simd_ext_sat_signed(transmute::<m256i, i32x8>(a), IMM)) }
+}
+
+#[inline]
+#[target_feature(enable = "lasx")]
+#[rustc_legacy_const_generics(1)]
+#[unstable(feature = "stdarch_loongarch", issue = "117427")]
+pub fn lasx_xvsat_d<const IMM: u32>(a: m256i) -> m256i {
+    static_assert_uimm_bits!(IMM, 6);
+    unsafe { transmute(simd_ext_sat_signed(transmute::<m256i, i64x4>(a), IMM)) }
+}
+
+// VSATU — unsigned saturation
+#[inline]
+#[target_feature(enable = "lasx")]
+#[rustc_legacy_const_generics(1)]
+#[unstable(feature = "stdarch_loongarch", issue = "117427")]
+pub fn lasx_xvsat_bu<const IMM: u32>(a: m256i) -> m256i {
+    static_assert_uimm_bits!(IMM, 3);
+    unsafe { transmute(simd_ext_sat_unsigned(transmute::<m256i, u8x32>(a), IMM)) }
+}
+
+#[inline]
+#[target_feature(enable = "lasx")]
+#[rustc_legacy_const_generics(1)]
+#[unstable(feature = "stdarch_loongarch", issue = "117427")]
+pub fn lasx_xvsat_hu<const IMM: u32>(a: m256i) -> m256i {
+    static_assert_uimm_bits!(IMM, 4);
+    unsafe { transmute(simd_ext_sat_unsigned(transmute::<m256i, u16x16>(a), IMM)) }
+}
+
+#[inline]
+#[target_feature(enable = "lasx")]
+#[rustc_legacy_const_generics(1)]
+#[unstable(feature = "stdarch_loongarch", issue = "117427")]
+pub fn lasx_xvsat_wu<const IMM: u32>(a: m256i) -> m256i {
+    static_assert_uimm_bits!(IMM, 5);
+    unsafe { transmute(simd_ext_sat_unsigned(transmute::<m256i, u32x8>(a), IMM)) }
+}
+
+#[inline]
+#[target_feature(enable = "lasx")]
+#[rustc_legacy_const_generics(1)]
+#[unstable(feature = "stdarch_loongarch", issue = "117427")]
+pub fn lasx_xvsat_du<const IMM: u32>(a: m256i) -> m256i {
+    static_assert_uimm_bits!(IMM, 6);
+    unsafe { transmute(simd_ext_sat_unsigned(transmute::<m256i, u64x4>(a), IMM)) }
+}
+
 #[cfg(test)]
 mod tests {
     use crate::{

crates/core_arch/src/loongarch64/lsx/generated.rs

@@ -75,22 +75,6 @@ unsafe extern "unadjusted" {
     fn __lsx_vsubi_wu(a: __v4i32, b: u32) -> __v4i32;
     #[link_name = "llvm.loongarch.lsx.vsubi.du"]
     fn __lsx_vsubi_du(a: __v2i64, b: u32) -> __v2i64;
-    #[link_name = "llvm.loongarch.lsx.vsat.b"]
-    fn __lsx_vsat_b(a: __v16i8, b: u32) -> __v16i8;
-    #[link_name = "llvm.loongarch.lsx.vsat.h"]
-    fn __lsx_vsat_h(a: __v8i16, b: u32) -> __v8i16;
-    #[link_name = "llvm.loongarch.lsx.vsat.w"]
-    fn __lsx_vsat_w(a: __v4i32, b: u32) -> __v4i32;
-    #[link_name = "llvm.loongarch.lsx.vsat.d"]
-    fn __lsx_vsat_d(a: __v2i64, b: u32) -> __v2i64;
-    #[link_name = "llvm.loongarch.lsx.vsat.bu"]
-    fn __lsx_vsat_bu(a: __v16u8, b: u32) -> __v16u8;
-    #[link_name = "llvm.loongarch.lsx.vsat.hu"]
-    fn __lsx_vsat_hu(a: __v8u16, b: u32) -> __v8u16;
-    #[link_name = "llvm.loongarch.lsx.vsat.wu"]
-    fn __lsx_vsat_wu(a: __v4u32, b: u32) -> __v4u32;
-    #[link_name = "llvm.loongarch.lsx.vsat.du"]
-    fn __lsx_vsat_du(a: __v2u64, b: u32) -> __v2u64;
     #[link_name = "llvm.loongarch.lsx.vavg.b"]
     fn __lsx_vavg_b(a: __v16i8, b: __v16i8) -> __v16i8;
     #[link_name = "llvm.loongarch.lsx.vavg.h"]
@@ -1131,78 +1115,6 @@ pub fn lsx_vsubi_du<const IMM5: u32>(a: m128i) -> m128i {
     unsafe { transmute(__lsx_vsubi_du(transmute(a), IMM5)) }
 }
 
-#[inline]
-#[target_feature(enable = "lsx")]
-#[rustc_legacy_const_generics(1)]
-#[unstable(feature = "stdarch_loongarch", issue = "117427")]
-pub fn lsx_vsat_b<const IMM3: u32>(a: m128i) -> m128i {
-    static_assert_uimm_bits!(IMM3, 3);
-    unsafe { transmute(__lsx_vsat_b(transmute(a), IMM3)) }
-}
-
-#[inline]
-#[target_feature(enable = "lsx")]
-#[rustc_legacy_const_generics(1)]
-#[unstable(feature = "stdarch_loongarch", issue = "117427")]
-pub fn lsx_vsat_h<const IMM4: u32>(a: m128i) -> m128i {
-    static_assert_uimm_bits!(IMM4, 4);
-    unsafe { transmute(__lsx_vsat_h(transmute(a), IMM4)) }
-}
-
-#[inline]
-#[target_feature(enable = "lsx")]
-#[rustc_legacy_const_generics(1)]
-#[unstable(feature = "stdarch_loongarch", issue = "117427")]
-pub fn lsx_vsat_w<const IMM5: u32>(a: m128i) -> m128i {
-    static_assert_uimm_bits!(IMM5, 5);
-    unsafe { transmute(__lsx_vsat_w(transmute(a), IMM5)) }
-}
-
-#[inline]
-#[target_feature(enable = "lsx")]
-#[rustc_legacy_const_generics(1)]
-#[unstable(feature = "stdarch_loongarch", issue = "117427")]
-pub fn lsx_vsat_d<const IMM6: u32>(a: m128i) -> m128i {
-    static_assert_uimm_bits!(IMM6, 6);
-    unsafe { transmute(__lsx_vsat_d(transmute(a), IMM6)) }
-}
-
-#[inline]
-#[target_feature(enable = "lsx")]
-#[rustc_legacy_const_generics(1)]
-#[unstable(feature = "stdarch_loongarch", issue = "117427")]
-pub fn lsx_vsat_bu<const IMM3: u32>(a: m128i) -> m128i {
-    static_assert_uimm_bits!(IMM3, 3);
-    unsafe { transmute(__lsx_vsat_bu(transmute(a), IMM3)) }
-}
-
-#[inline]
-#[target_feature(enable = "lsx")]
-#[rustc_legacy_const_generics(1)]
-#[unstable(feature = "stdarch_loongarch", issue = "117427")]
-pub fn lsx_vsat_hu<const IMM4: u32>(a: m128i) -> m128i {
-    static_assert_uimm_bits!(IMM4, 4);
-    unsafe { transmute(__lsx_vsat_hu(transmute(a), IMM4)) }
-}
-
-#[inline]
-#[target_feature(enable = "lsx")]
-#[rustc_legacy_const_generics(1)]
-#[unstable(feature = "stdarch_loongarch", issue = "117427")]
-pub fn lsx_vsat_wu<const IMM5: u32>(a: m128i) -> m128i {
-    static_assert_uimm_bits!(IMM5, 5);
-    unsafe { transmute(__lsx_vsat_wu(transmute(a), IMM5)) }
-}
-
-#[inline]
-#[target_feature(enable = "lsx")]
-#[rustc_legacy_const_generics(1)]
-#[unstable(feature = "stdarch_loongarch", issue = "117427")]
-pub fn lsx_vsat_du<const IMM6: u32>(a: m128i) -> m128i {
-    static_assert_uimm_bits!(IMM6, 6);
-    unsafe { transmute(__lsx_vsat_du(transmute(a), IMM6)) }
-}
-
 #[inline]
 #[target_feature(enable = "lsx")]
 #[unstable(feature = "stdarch_loongarch", issue = "117427")]

crates/core_arch/src/loongarch64/lsx/portable.rs

@@ -574,6 +574,73 @@ impl_vugv!("lsx", lsx_vinsgr2vr_h, simd_insert, m128i, i16x8, i32, 3);
 impl_vugv!("lsx", lsx_vinsgr2vr_w, simd_insert, m128i, i32x4, i32, 2);
 impl_vugv!("lsx", lsx_vinsgr2vr_d, simd_insert, m128i, i64x2, i64, 1);
 
+// VSAT — signed saturation to IMM+1 bits
+#[inline]
+#[target_feature(enable = "lsx")]
+#[unstable(feature = "stdarch_loongarch", issue = "117427")]
+pub fn lsx_vsat_b<const IMM: u32>(a: m128i) -> m128i {
+    static_assert_uimm_bits!(IMM, 3);
+    unsafe { transmute(simd_ext_sat_signed(transmute::<m128i, i8x16>(a), IMM)) }
+}
+
+#[inline]
+#[target_feature(enable = "lsx")]
+#[rustc_legacy_const_generics(1)]
+#[unstable(feature = "stdarch_loongarch", issue = "117427")]
+pub fn lsx_vsat_h<const IMM: u32>(a: m128i) -> m128i {
+    static_assert_uimm_bits!(IMM, 4);
+    unsafe { transmute(simd_ext_sat_signed(transmute::<m128i, i16x8>(a), IMM)) }
+}
+
+#[inline]
+#[target_feature(enable = "lsx")]
+#[unstable(feature = "stdarch_loongarch", issue = "117427")]
+pub fn lsx_vsat_w<const IMM: u32>(a: m128i) -> m128i {
+    static_assert_uimm_bits!(IMM, 5);
+    unsafe { transmute(simd_ext_sat_signed(transmute::<m128i, i32x4>(a), IMM)) }
+}
+
+#[inline]
+#[target_feature(enable = "lsx")]
+#[unstable(feature = "stdarch_loongarch", issue = "117427")]
+pub fn lsx_vsat_d<const IMM: u32>(a: m128i) -> m128i {
+    static_assert_uimm_bits!(IMM, 6);
+    unsafe { transmute(simd_ext_sat_signed(transmute::<m128i, i64x2>(a), IMM)) }
+}
+
+// VSATU — unsigned saturation to IMM+1 bits
+#[inline]
+#[target_feature(enable = "lsx")]
+#[unstable(feature = "stdarch_loongarch", issue = "117427")]
+pub fn lsx_vsat_bu<const IMM: u32>(a: m128i) -> m128i {
+    static_assert_uimm_bits!(IMM, 3);
+    unsafe { transmute(simd_ext_sat_unsigned(transmute::<m128i, u8x16>(a), IMM)) }
+}
+
+#[inline]
+#[target_feature(enable = "lsx")]
+#[unstable(feature = "stdarch_loongarch", issue = "117427")]
+pub fn lsx_vsat_hu<const IMM: u32>(a: m128i) -> m128i {
+    static_assert_uimm_bits!(IMM, 4);
+    unsafe { transmute(simd_ext_sat_unsigned(transmute::<m128i, u16x8>(a), IMM)) }
+}
+
+#[inline]
+#[target_feature(enable = "lsx")]
+#[unstable(feature = "stdarch_loongarch", issue = "117427")]
+pub fn lsx_vsat_wu<const IMM: u32>(a: m128i) -> m128i {
+    static_assert_uimm_bits!(IMM, 5);
+    unsafe { transmute(simd_ext_sat_unsigned(transmute::<m128i, u32x4>(a), IMM)) }
+}
+
+#[inline]
+#[target_feature(enable = "lsx")]
+#[unstable(feature = "stdarch_loongarch", issue = "117427")]
+pub fn lsx_vsat_du<const IMM: u32>(a: m128i) -> m128i {
+    static_assert_uimm_bits!(IMM, 6);
+    unsafe { transmute(simd_ext_sat_unsigned(transmute::<m128i, u64x2>(a), IMM)) }
+}
+
 #[cfg(test)]
 mod tests {
     use crate::{

crates/core_arch/src/loongarch64/simd.rs

@@ -1,5 +1,6 @@
 //! LoongArch64 SIMD helpers
 
+use crate::core_arch::simd::*;
 use crate::intrinsics::simd::*;
 
 // Internal extension trait for concrete `Simd<T, N>` types.
@@ -304,6 +305,32 @@ pub(super) const unsafe fn simd_ext_stx<T: Copy>(a: T, b: *mut i8, c: i64) {
     core::ptr::write_unaligned(b, a);
 }
 
+#[inline(always)]
+#[rustc_const_unstable(feature = "stdarch_const_helpers", issue = "none")]
+pub(super) const unsafe fn simd_ext_sat_signed<T: Copy + const SimdExt>(a: T, imm: u32) -> T {
+    let bits = (size_of::<T::Elem>() * 8) as u32;
+    if imm >= bits - 1 {
+        return a;
+    }
+    let min_val = -(1i64 << imm);
+    let max_val = (1i64 << imm) - 1;
+    simd_imax(
+        simd_imin(a, simd_ext_splat(max_val)),
+        simd_ext_splat(min_val),
+    )
+}
+
+#[inline(always)]
+#[rustc_const_unstable(feature = "stdarch_const_helpers", issue = "none")]
+pub(super) const unsafe fn simd_ext_sat_unsigned<T: Copy + const SimdExt>(a: T, imm: u32) -> T {
+    let bits = (size_of::<T::Elem>() * 8) as u32;
+    if imm >= bits - 1 {
+        return a;
+    }
+    let max_val = (1i64 << (imm + 1)) - 1;
+    simd_imax(simd_imin(a, simd_ext_splat(max_val)), simd_ext_splat(0))
+}
+
 macro_rules! impl_vv {
     ($ft:literal, $name:ident, $op:ident, $oty:ty, $ity:ty) => {
         #[inline]