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Rollup of 24 pull requests - #162893

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Successful merges:

r? @ghost

Create a similar rollup

ChayimFriedman2 and others added 30 commits August 10, 2026 01:08
Giving access to `std::os::windows::process::ChildExt::main_thread_handle()`.
It does not look like these items are actually used by rustc.
This is to make it easy to update the static template, like its skeleton or style,
and add features there, instead of doing it all with rust code. The dynamic sections
are marked as dummy tokens and are replaced when dumping the MIR.
display a list of all the nodes each loan can reach (and whether the node's region
is live at the node's point)
Loan traces can be big and numerous, so we hide them by default. We instead
use a button to show a loan's trace.
margins and spacing, section separators, reachability layout, etc.
This API is in FCP, but there are no examples and much of it is
untested. Add examples here.
Item bounds already instantiate higher-ranked GAT arguments with identity parameters. Compare the bound self type with the identity alias directly, and treat any remaining bound region as static.
Co-authored-by: Amanda Stjerna <amanda@stjerna.space>
Co-authored-by: Jack Huey <31162821+jackh726@users.noreply.github.com>
Right now things are undertested and underspecified.

Some of the library code would get in a loop if searcher starts
returning empty rejects.

And there's no tests for backwards multi byte char matchers. Pull
request I'm reviving had a problem implementing that, so making sure
it's tested before the actual code lands.

Right now it is possible to break both tests (and user code) without
breaking anything else in the test suite I think.
LLVM prior to 24 didn't do some optimizations around call slots on
pointers without `dereferenceable` set. A recent change enhanced the
optimizer so it can handle that case (at least in this test) so we relax
the checks here slightly. We still (from what I can tell) demonstrate
that `sse41_blend_nofeature` is not inlined, which seems to be the
import part of this region of the test.
`annotate-snippets-rs` supports pointing at `Span`s without an underline. Start using that feature in `rustc`. We currently use secondary span labels with no text to point at context that should appear in the diagnostic, but that are merely context.
Generally `rustc_middle::query` has types while `rustc_query_impl` has
operations. So this commit moves some operations from the former to the
latter. Some of them are just moved, while others are inlined and
removed.
The old name `implement_ty_decoder!` historically made some sense, but nowadays
is quite misleading for a macro that only forwards Decoder methods.

Requiring the caller to provide the `impl` block makes the calling code
clearer, while also reducing the complexity of dealing with generics. The
downside is a little less context at the macro-definition site, which seems
fine.

The closure-like syntax allows for arbitrary expressions involving `self`,
without running into hygiene problems and without requiring separate closures
for `&self` and `&mut self` methods. It also works well with IDE hover hints.
@rustbot rustbot added A-query-system Area: The rustc query system (https://rustc-dev-guide.rust-lang.org/query.html) A-translation Area: Translation infrastructure, and migrating existing diagnostics to SessionDiagnostic F-explicit_tail_calls `#![feature(explicit_tail_calls)]` O-windows Operating system: Windows PG-exploit-mitigations Project group: Exploit mitigations S-waiting-on-review Status: Awaiting review from the assignee but also interested parties. T-clippy Relevant to the Clippy team. T-compiler Relevant to the compiler team, which will review and decide on the PR/issue. T-libs Relevant to the library team, which will review and decide on the PR/issue. T-rustdoc Relevant to the rustdoc team, which will review and decide on the PR/issue. WG-trait-system-refactor The Rustc Trait System Refactor Initiative (-Znext-solver) labels Sep 17, 2026
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@bors r+ p=5

Trying commonly failed jobs
@bors try jobs=dist-various-1,test-various,test-x86_64-gnu-aux,test-x86_64-gnu-llvm-21-3,test-x86_64-msvc-1,test-aarch64-apple-1,test-aarch64-apple-2,test-x86_64-mingw-1,test-i686-msvc,test-armhf-gnu

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📌 Commit 73e6978 has been approved by JonathanBrouwer

It is now in the queue for this repository.

@rust-bors rust-bors Bot added S-waiting-on-bors Status: Waiting on bors to run and complete tests. Bors will change the label on completion. and removed S-waiting-on-review Status: Awaiting review from the assignee but also interested parties. labels Sep 17, 2026
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rust-bors Bot pushed a commit that referenced this pull request Sep 17, 2026
Rollup of 24 pull requests


try-job: dist-various-1
try-job: test-various
try-job: test-x86_64-gnu-aux
try-job: test-x86_64-gnu-llvm-21-3
try-job: test-x86_64-msvc-1
try-job: test-aarch64-apple-1
try-job: test-aarch64-apple-2
try-job: test-x86_64-mingw-1
try-job: test-i686-msvc
try-job: test-armhf-gnu
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rust-bors Bot pushed a commit that referenced this pull request Sep 17, 2026
…uwer

Rollup of 24 pull requests

Successful merges:

 - #161596 (coretests: Add more pattern tests.)
 - #162177 (Properly implement the gpu-kernel ABI for amdgpu)
 - #162411 (Make Receiver `#[rustc_dyn_incompatible_trait]`)
 - #162760 (yeet alias new_from_def_id)
 - #162796 (libtest: do not early exit from test runners)
 - #162844 (Add loan reachability traces to polonius MIR dumps)
 - #162876 (Move operations out of `rustc_middle::query::job`)
 - #160108 (Stabilize `windows_process_extensions_main_thread_handle`)
 - #160212 (traits: Fix rigid alias liveness matching)
 - #160544 (Stabilize `feature(trim_prefix_suffix)` (`{str, [T], Path}::trim_prefix` and `{str, [T]}::trim_suffix`))
 - #161305 (Use the entire type of a dropped local to compute variance (edge direction) for Polonius alpha)
 - #161838 (tests: accept LLVM 24 optimization in this test)
 - #162312 (core: Rewrite docs for try_as_dyn)
 - #162785 (Avoid creating overlapping assignments in MatchBranchSimplification)
 - #162805 (Add `must_use` lint to `ExitCode`)
 - #162825 (core: Add examples for `debug_closure_helpers`)
 - #162841 (enable asm tests for xtensa targets)
 - #162842 (reintroduce check RibKind::ConstParamTy did in direct consts)
 - #162845 (mgca: fix issue with mismatched array valtree/valtree tys)
 - #162856 (Stabilize CommandExt::show_window)
 - #162865 (Complex conjugate, negation and default)
 - #162874 (Add support for `annotate_snippets::snippet::AnnotationKind::Visible`)
 - #162881 (Simplify the macro for forwarding Decoder methods )
 - #162888 (Fix a typo on the Armv7-R platform docs page)
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The job test-x86_64-gnu-nopt failed! Check out the build log: (web) (plain enhanced) (plain)

Click to see the possible cause of the failure (guessed by this bot)

---- [codegen] tests/codegen-llvm/amdgpu-abi/struct-abi.rs stdout ----
------FileCheck stdout------------------------------

------FileCheck stderr------------------------------
/checkout/tests/codegen-llvm/amdgpu-abi/struct-abi.rs:110:11: error: CHECK: expected string not found in input
// CHECK: define amdgpu_kernel void @kernel_struct_arg(ptr addrspace(4) noalias nofree noundef readnone byref([12 x i8]) align 4 captures(none) dereferenceable(12) {{%.+}})
          ^
/checkout/obj/build/x86_64-unknown-linux-gnu/test/codegen-llvm/amdgpu-abi/struct-abi/struct-abi.ll:19:75: note: scanning from here
define amdgpu_kernel void @kernel_nested_single_element_struct_arg(i32 %0) unnamed_addr #0 !guid !4 {
                                                                          ^

Input file: /checkout/obj/build/x86_64-unknown-linux-gnu/test/codegen-llvm/amdgpu-abi/struct-abi/struct-abi.ll
Check file: /checkout/tests/codegen-llvm/amdgpu-abi/struct-abi.rs

-dump-input=help explains the following input dump.

Input was:
<<<<<<
             1: ; ModuleID = 'struct_abi.3cacc9adda15326c-cgu.0' 
             2: source_filename = "struct_abi.3cacc9adda15326c-cgu.0" 
             3: target datalayout = "e-m:e-p:64:64-p1:64:64-p2:32:32-p3:32:32-p4:64:64-p5:32:32-p6:32:32-p7:160:256:256:32-p8:128:128:128:48-p9:192:256:256:32-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-v2048:2048-n32:64-S32-A5-G1-ni:7:8:9" 
             4: target triple = "amdgcn-amd-amdhsa" 
             5:  
             6: ; Function Attrs: convergent nounwind uwtable 
             7: define amdgpu_kernel void @kernel_single_element_struct_arg(i32 %0) unnamed_addr #0 !guid !3 { 
             8: start: 
             9:  %1 = alloca [4 x i8], align 4, addrspace(5) 
            10:  %2 = addrspacecast ptr addrspace(5) %1 to ptr 
            11:  %3 = alloca [4 x i8], align 4, addrspace(5) 
            12:  %_1 = addrspacecast ptr addrspace(5) %3 to ptr 
            13:  store i32 %0, ptr %2, align 4 
            14:  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %_1, ptr align 4 %2, i64 4, i1 false) 
            15:  ret void 
            16: } 
            17:  
            18: ; Function Attrs: convergent nounwind uwtable 
            19: define amdgpu_kernel void @kernel_nested_single_element_struct_arg(i32 %0) unnamed_addr #0 !guid !4 { 
check:110'0                                                                              {                              search range start (exclusive)
check:110'1                                                                                                             error: no match found in search range
            20: start: 
            21:  %1 = alloca [4 x i8], align 4, addrspace(5) 
            22:  %2 = addrspacecast ptr addrspace(5) %1 to ptr 
            23:  %3 = alloca [4 x i8], align 4, addrspace(5) 
            24:  %_1 = addrspacecast ptr addrspace(5) %3 to ptr 
            25:  store i32 %0, ptr %2, align 4 
            26:  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %_1, ptr align 4 %2, i64 4, i1 false) 
            27:  ret void 
            28: } 
            29:  
            30: ; Function Attrs: convergent nounwind uwtable 
            31: define amdgpu_kernel void @kernel_struct_arg(ptr addrspace(4) byref([12 x i8]) align 4 %0) unnamed_addr #0 !guid !5 { 
            32: start: 
            33:  %1 = alloca [12 x i8], align 4, addrspace(5) 
            34:  %_1 = addrspacecast ptr addrspace(5) %1 to ptr 
            35:  call void @llvm.memcpy.p0.p4.i64(ptr align 4 %_1, ptr addrspace(4) align 4 %0, i64 12, i1 false) 
            36:  ret void 
            37: } 
            38:  
            39: ; Function Attrs: convergent nounwind uwtable 
            40: define amdgpu_kernel void @kernel_struct_padding_arg(ptr addrspace(4) byref([16 x i8]) align 8 %0) unnamed_addr #0 !guid !6 { 
            41: start: 
            42:  %1 = alloca [16 x i8], align 8, addrspace(5) 
            43:  %_1 = addrspacecast ptr addrspace(5) %1 to ptr 
            44:  call void @llvm.memcpy.p0.p4.i64(ptr align 8 %_1, ptr addrspace(4) align 8 %0, i64 16, i1 false) 
            45:  ret void 
            46: } 
            47:  
            48: ; Function Attrs: convergent nounwind uwtable 
            49: define amdgpu_kernel void @kernel_struct_of_arrays_arg(ptr addrspace(4) byref([44 x i8]) align 4 %0) unnamed_addr #0 !guid !7 { 
            50: start: 
            51:  %1 = alloca [44 x i8], align 4, addrspace(5) 
            52:  %_1 = addrspacecast ptr addrspace(5) %1 to ptr 
            53:  call void @llvm.memcpy.p0.p4.i64(ptr align 4 %_1, ptr addrspace(4) align 4 %0, i64 44, i1 false) 
            54:  ret void 
            55: } 
            56:  
            57: ; Function Attrs: convergent nounwind uwtable 
            58: define amdgpu_kernel void @kernel_struct_of_structs_arg(ptr addrspace(4) byref([24 x i8]) align 4 %0) unnamed_addr #0 !guid !8 { 
            59: start: 
            60:  %1 = alloca [24 x i8], align 4, addrspace(5) 
            61:  %_1 = addrspacecast ptr addrspace(5) %1 to ptr 
            62:  call void @llvm.memcpy.p0.p4.i64(ptr align 4 %_1, ptr addrspace(4) align 4 %0, i64 24, i1 false) 
            63:  ret void 
            64: } 
            65:  
            66: ; Function Attrs: convergent nounwind uwtable 
            67: define amdgpu_kernel void @test_kernel_union_arg(ptr addrspace(4) byref([4 x i8]) align 4 %0) unnamed_addr #0 !guid !9 { 
            68: start: 
            69:  %1 = alloca [4 x i8], align 4, addrspace(5) 
            70:  %_1 = addrspacecast ptr addrspace(5) %1 to ptr 
            71:  call void @llvm.memcpy.p0.p4.i64(ptr align 4 %_1, ptr addrspace(4) align 4 %0, i64 4, i1 false) 
            72:  ret void 
            73: } 
            74:  
            75: ; Function Attrs: convergent nounwind uwtable 
            76: define amdgpu_kernel void @kernel_single_array_element_struct_arg(ptr addrspace(4) byref([16 x i8]) align 4 %0) unnamed_addr #0 !guid !10 { 
            77: start: 
            78:  %1 = alloca [16 x i8], align 4, addrspace(5) 
            79:  %_1 = addrspacecast ptr addrspace(5) %1 to ptr 
            80:  call void @llvm.memcpy.p0.p4.i64(ptr align 4 %_1, ptr addrspace(4) align 4 %0, i64 16, i1 false) 
            81:  ret void 
            82: } 
            83:  
            84: ; Function Attrs: convergent nounwind uwtable 
            85: define amdgpu_kernel void @kernel_single_struct_element_struct_arg(ptr addrspace(4) byref([16 x i8]) align 8 %0) unnamed_addr #0 !guid !11 { 
            86: start: 
            87:  %1 = alloca [16 x i8], align 8, addrspace(5) 
            88:  %_1 = addrspacecast ptr addrspace(5) %1 to ptr 
            89:  call void @llvm.memcpy.p0.p4.i64(ptr align 8 %_1, ptr addrspace(4) align 8 %0, i64 16, i1 false) 
            90:  ret void 
            91: } 
            92:  
            93: ; Function Attrs: convergent nounwind uwtable 
            94: define amdgpu_kernel void @kernel_different_size_type_pair_arg(ptr addrspace(4) byref([16 x i8]) align 8 %0) unnamed_addr #0 !guid !12 { 
            95: start: 
            96:  %1 = alloca [16 x i8], align 8, addrspace(5) 
            97:  %_1 = addrspacecast ptr addrspace(5) %1 to ptr 
            98:  call void @llvm.memcpy.p0.p4.i64(ptr align 8 %_1, ptr addrspace(4) align 8 %0, i64 16, i1 false) 
            99:  ret void 
           100: } 
           101:  
           102: ; Function Attrs: convergent nounwind uwtable 
           103: define amdgpu_kernel void @kernel_complex(ptr addrspace(4) byref([8 x i8]) align 4 %0) unnamed_addr #0 !guid !13 { 
           104: start: 
           105:  %1 = alloca [8 x i8], align 4, addrspace(5) 
           106:  %_1 = addrspacecast ptr addrspace(5) %1 to ptr 
           107:  call void @llvm.memcpy.p0.p4.i64(ptr align 4 %_1, ptr addrspace(4) align 4 %0, i64 8, i1 false) 
           108:  ret void 
           109: } 
           110:  
           111: ; Function Attrs: convergent nounwind uwtable 
           112: define amdgpu_kernel void @kernel_slice(ptr addrspace(4) byref([16 x i8]) align 8 %0) unnamed_addr #0 !guid !14 { 
           113: start: 
           114:  %1 = alloca [16 x i8], align 8, addrspace(5) 
           115:  %_1 = addrspacecast ptr addrspace(5) %1 to ptr 
           116:  call void @llvm.memcpy.p0.p4.i64(ptr align 8 %_1, ptr addrspace(4) align 8 %0, i64 16, i1 false) 
           117:  ret void 
           118: } 
           119:  
             .
             .
             .
           157:  store <2 x i8> %0, ptr %2, align 2 
           158:  call void @llvm.memcpy.p0.p0.i64(ptr align 2 %_1, ptr align 2 %2, i64 2, i1 false) 
           159:  ret void 
           160: } 
           161:  
           162: ; Function Attrs: convergent nounwind uwtable 
           163: define amdgpu_kernel void @kernel_i16x2_struct(<2 x i16> %0) unnamed_addr #0 !guid !19 { 
           164: start: 
           165:  %1 = alloca [4 x i8], align 4, addrspace(5) 
           166:  %2 = addrspacecast ptr addrspace(5) %1 to ptr 
           167:  %3 = alloca [4 x i8], align 4, addrspace(5) 
           168:  %_1 = addrspacecast ptr addrspace(5) %3 to ptr 
           169:  store <2 x i16> %0, ptr %2, align 4 
           170:  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %_1, ptr align 4 %2, i64 4, i1 false) 
           171:  ret void 
           172: } 
           173:  
           174: ; Function Attrs: convergent nounwind uwtable 
           175: define amdgpu_kernel void @kernel_i16x3_struct(<4 x i16> %0) unnamed_addr #0 !guid !20 { 
           176: start: 
           177:  %1 = alloca [8 x i8], align 8, addrspace(5) 
           178:  %2 = addrspacecast ptr addrspace(5) %1 to ptr 
           179:  %3 = alloca [8 x i8], align 8, addrspace(5) 
           180:  %_1 = addrspacecast ptr addrspace(5) %3 to ptr 
           181:  store <4 x i16> %0, ptr %2, align 8 
           182:  call void @llvm.memcpy.p0.p0.i64(ptr align 8 %_1, ptr align 8 %2, i64 8, i1 false) 
           183:  ret void 
           184: } 
           185:  
           186: ; Function Attrs: convergent nounwind uwtable 
           187: define amdgpu_kernel void @kernel_i16x4_struct(<4 x i16> %0) unnamed_addr #0 !guid !21 { 
           188: start: 
           189:  %1 = alloca [8 x i8], align 8, addrspace(5) 
           190:  %2 = addrspacecast ptr addrspace(5) %1 to ptr 
           191:  %3 = alloca [8 x i8], align 8, addrspace(5) 
           192:  %_1 = addrspacecast ptr addrspace(5) %3 to ptr 
           193:  store <4 x i16> %0, ptr %2, align 8 
           194:  call void @llvm.memcpy.p0.p0.i64(ptr align 8 %_1, ptr align 8 %2, i64 8, i1 false) 
           195:  ret void 
           196: } 
           197:  
           198: ; Function Attrs: convergent nounwind uwtable 
           199: define amdgpu_kernel void @kernel_i32x3_struct(<4 x i32> %0) unnamed_addr #0 !guid !22 { 
           200: start: 
           201:  %1 = alloca [16 x i8], align 16, addrspace(5) 
           202:  %2 = addrspacecast ptr addrspace(5) %1 to ptr 
           203:  %3 = alloca [16 x i8], align 16, addrspace(5) 
           204:  %_1 = addrspacecast ptr addrspace(5) %3 to ptr 
           205:  store <4 x i32> %0, ptr %2, align 16 
           206:  call void @llvm.memcpy.p0.p0.i64(ptr align 16 %_1, ptr align 16 %2, i64 16, i1 false) 
           207:  ret void 
           208: } 
           209:  
           210: ; Function Attrs: convergent nounwind uwtable 
           211: define amdgpu_kernel void @kernel_i32x4_struct(<4 x i32> %0) unnamed_addr #0 !guid !23 { 
           212: start: 
           213:  %1 = alloca [16 x i8], align 16, addrspace(5) 
           214:  %2 = addrspacecast ptr addrspace(5) %1 to ptr 
           215:  %3 = alloca [16 x i8], align 16, addrspace(5) 
           216:  %_1 = addrspacecast ptr addrspace(5) %3 to ptr 
           217:  store <4 x i32> %0, ptr %2, align 16 
           218:  call void @llvm.memcpy.p0.p0.i64(ptr align 16 %_1, ptr align 16 %2, i64 16, i1 false) 
           219:  ret void 
           220: } 
           221:  
           222: ; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) 
           223: declare void @llvm.memcpy.p0.p0.i64(ptr noalias writeonly captures(none), ptr noalias readonly captures(none), i64, i1 immarg) #1 
           224:  
           225: ; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) 
           226: declare void @llvm.memcpy.p0.p4.i64(ptr noalias writeonly captures(none), ptr addrspace(4) noalias readonly captures(none), i64, i1 immarg) #1 
           227:  
           228: attributes #0 = { convergent nounwind uwtable "target-cpu"="gfx900" } 
           229: attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) } 
           230:  
           231: !llvm.module.flags = !{!0, !1} 
           232: !llvm.ident = !{!2} 
           233:  
           234: !0 = !{i32 8, !"PIC Level", i32 2} 
           235: !1 = !{i32 7, !"uwtable", i32 2} 
           236: !2 = !{!"rustc version 1.100.0-nightly (a5deafdf1 2026-09-17)"} 
           237: !3 = !{i64 -1423071334091511355} 
           238: !4 = !{i64 5236029989505593049} 
           239: !5 = !{i64 3579283859987830744} 
           240: !6 = !{i64 -8343270752813774532} 
           241: !7 = !{i64 -3184313367073458083} 
           242: !8 = !{i64 -5082808322621136593} 
           243: !9 = !{i64 -3482464583660219769} 
           244: !10 = !{i64 1614804376308817931} 
           245: !11 = !{i64 -1507475595764241110} 
           246: !12 = !{i64 3294797800777344892} 
           247: !13 = !{i64 -6695143118636520432} 
           248: !14 = !{i64 2188551456724770103} 
           249: !15 = !{i64 -6185863346673075832} 
           250: !16 = !{i64 1846582427142452378} 
           251: !17 = !{i64 -2978271056480204578} 
           252: !18 = !{i64 -1523675446781228222} 
           253: !19 = !{i64 643363077994258841} 
           254: !20 = !{i64 -1085310592206253730} 
           255: !21 = !{i64 5306481493370234278} 
           256: !22 = !{i64 -3717069861779487104} 
           257: !23 = !{i64 1843908619938972735} 
check:110'2                                      } search range end (exclusive)
>>>>>>

------------------------------------------

error: verification with 'FileCheck' failed
status: exit status: 1
command: "/checkout/obj/build/x86_64-unknown-linux-gnu/ci-llvm/bin/FileCheck" "--input-file" "/checkout/obj/build/x86_64-unknown-linux-gnu/test/codegen-llvm/amdgpu-abi/struct-abi/struct-abi.ll" "/checkout/tests/codegen-llvm/amdgpu-abi/struct-abi.rs" "--check-prefix=CHECK" "--allow-unused-prefixes" "--dump-input-context" "100"
stdout: none
--- stderr -------------------------------
/checkout/tests/codegen-llvm/amdgpu-abi/struct-abi.rs:110:11: error: CHECK: expected string not found in input
// CHECK: define amdgpu_kernel void @kernel_struct_arg(ptr addrspace(4) noalias nofree noundef readnone byref([12 x i8]) align 4 captures(none) dereferenceable(12) {{%.+}})
          ^
/checkout/obj/build/x86_64-unknown-linux-gnu/test/codegen-llvm/amdgpu-abi/struct-abi/struct-abi.ll:19:75: note: scanning from here
define amdgpu_kernel void @kernel_nested_single_element_struct_arg(i32 %0) unnamed_addr #0 !guid !4 {
                                                                          ^

Input file: /checkout/obj/build/x86_64-unknown-linux-gnu/test/codegen-llvm/amdgpu-abi/struct-abi/struct-abi.ll
Check file: /checkout/tests/codegen-llvm/amdgpu-abi/struct-abi.rs

-dump-input=help explains the following input dump.

Input was:
<<<<<<
             1: ; ModuleID = 'struct_abi.3cacc9adda15326c-cgu.0' 
             2: source_filename = "struct_abi.3cacc9adda15326c-cgu.0" 
             3: target datalayout = "e-m:e-p:64:64-p1:64:64-p2:32:32-p3:32:32-p4:64:64-p5:32:32-p6:32:32-p7:160:256:256:32-p8:128:128:128:48-p9:192:256:256:32-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-v2048:2048-n32:64-S32-A5-G1-ni:7:8:9" 
             4: target triple = "amdgcn-amd-amdhsa" 
             5:  
             6: ; Function Attrs: convergent nounwind uwtable 
             7: define amdgpu_kernel void @kernel_single_element_struct_arg(i32 %0) unnamed_addr #0 !guid !3 { 
             8: start: 
             9:  %1 = alloca [4 x i8], align 4, addrspace(5) 
            10:  %2 = addrspacecast ptr addrspace(5) %1 to ptr 
            11:  %3 = alloca [4 x i8], align 4, addrspace(5) 
            12:  %_1 = addrspacecast ptr addrspace(5) %3 to ptr 
            13:  store i32 %0, ptr %2, align 4 
            14:  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %_1, ptr align 4 %2, i64 4, i1 false) 
            15:  ret void 
            16: } 
            17:  
            18: ; Function Attrs: convergent nounwind uwtable 
            19: define amdgpu_kernel void @kernel_nested_single_element_struct_arg(i32 %0) unnamed_addr #0 !guid !4 { 
check:110'0                                                                              {                              search range start (exclusive)
check:110'1                                                                                                             error: no match found in search range
            20: start: 
            21:  %1 = alloca [4 x i8], align 4, addrspace(5) 
            22:  %2 = addrspacecast ptr addrspace(5) %1 to ptr 
            23:  %3 = alloca [4 x i8], align 4, addrspace(5) 
            24:  %_1 = addrspacecast ptr addrspace(5) %3 to ptr 
            25:  store i32 %0, ptr %2, align 4 
            26:  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %_1, ptr align 4 %2, i64 4, i1 false) 
            27:  ret void 
            28: } 
            29:  
            30: ; Function Attrs: convergent nounwind uwtable 
            31: define amdgpu_kernel void @kernel_struct_arg(ptr addrspace(4) byref([12 x i8]) align 4 %0) unnamed_addr #0 !guid !5 { 
            32: start: 
            33:  %1 = alloca [12 x i8], align 4, addrspace(5) 
            34:  %_1 = addrspacecast ptr addrspace(5) %1 to ptr 
            35:  call void @llvm.memcpy.p0.p4.i64(ptr align 4 %_1, ptr addrspace(4) align 4 %0, i64 12, i1 false) 
            36:  ret void 
            37: } 
            38:  
            39: ; Function Attrs: convergent nounwind uwtable 
            40: define amdgpu_kernel void @kernel_struct_padding_arg(ptr addrspace(4) byref([16 x i8]) align 8 %0) unnamed_addr #0 !guid !6 { 
            41: start: 
            42:  %1 = alloca [16 x i8], align 8, addrspace(5) 
            43:  %_1 = addrspacecast ptr addrspace(5) %1 to ptr 
            44:  call void @llvm.memcpy.p0.p4.i64(ptr align 8 %_1, ptr addrspace(4) align 8 %0, i64 16, i1 false) 
            45:  ret void 
            46: } 
            47:  
            48: ; Function Attrs: convergent nounwind uwtable 
            49: define amdgpu_kernel void @kernel_struct_of_arrays_arg(ptr addrspace(4) byref([44 x i8]) align 4 %0) unnamed_addr #0 !guid !7 { 
            50: start: 
            51:  %1 = alloca [44 x i8], align 4, addrspace(5) 
            52:  %_1 = addrspacecast ptr addrspace(5) %1 to ptr 
            53:  call void @llvm.memcpy.p0.p4.i64(ptr align 4 %_1, ptr addrspace(4) align 4 %0, i64 44, i1 false) 
            54:  ret void 
            55: } 
            56:  
            57: ; Function Attrs: convergent nounwind uwtable 
            58: define amdgpu_kernel void @kernel_struct_of_structs_arg(ptr addrspace(4) byref([24 x i8]) align 4 %0) unnamed_addr #0 !guid !8 { 
            59: start: 
            60:  %1 = alloca [24 x i8], align 4, addrspace(5) 
            61:  %_1 = addrspacecast ptr addrspace(5) %1 to ptr 
            62:  call void @llvm.memcpy.p0.p4.i64(ptr align 4 %_1, ptr addrspace(4) align 4 %0, i64 24, i1 false) 
            63:  ret void 
            64: } 
            65:  
            66: ; Function Attrs: convergent nounwind uwtable 
            67: define amdgpu_kernel void @test_kernel_union_arg(ptr addrspace(4) byref([4 x i8]) align 4 %0) unnamed_addr #0 !guid !9 { 
            68: start: 
            69:  %1 = alloca [4 x i8], align 4, addrspace(5) 
            70:  %_1 = addrspacecast ptr addrspace(5) %1 to ptr 
            71:  call void @llvm.memcpy.p0.p4.i64(ptr align 4 %_1, ptr addrspace(4) align 4 %0, i64 4, i1 false) 
            72:  ret void 
            73: } 
            74:  
            75: ; Function Attrs: convergent nounwind uwtable 
            76: define amdgpu_kernel void @kernel_single_array_element_struct_arg(ptr addrspace(4) byref([16 x i8]) align 4 %0) unnamed_addr #0 !guid !10 { 
            77: start: 
            78:  %1 = alloca [16 x i8], align 4, addrspace(5) 
            79:  %_1 = addrspacecast ptr addrspace(5) %1 to ptr 
            80:  call void @llvm.memcpy.p0.p4.i64(ptr align 4 %_1, ptr addrspace(4) align 4 %0, i64 16, i1 false) 
            81:  ret void 
            82: } 
            83:  
            84: ; Function Attrs: convergent nounwind uwtable 
            85: define amdgpu_kernel void @kernel_single_struct_element_struct_arg(ptr addrspace(4) byref([16 x i8]) align 8 %0) unnamed_addr #0 !guid !11 { 
            86: start: 
            87:  %1 = alloca [16 x i8], align 8, addrspace(5) 
            88:  %_1 = addrspacecast ptr addrspace(5) %1 to ptr 
            89:  call void @llvm.memcpy.p0.p4.i64(ptr align 8 %_1, ptr addrspace(4) align 8 %0, i64 16, i1 false) 
            90:  ret void 
            91: } 
            92:  
            93: ; Function Attrs: convergent nounwind uwtable 
            94: define amdgpu_kernel void @kernel_different_size_type_pair_arg(ptr addrspace(4) byref([16 x i8]) align 8 %0) unnamed_addr #0 !guid !12 { 
            95: start: 
            96:  %1 = alloca [16 x i8], align 8, addrspace(5) 
            97:  %_1 = addrspacecast ptr addrspace(5) %1 to ptr 
            98:  call void @llvm.memcpy.p0.p4.i64(ptr align 8 %_1, ptr addrspace(4) align 8 %0, i64 16, i1 false) 
            99:  ret void 
           100: } 
           101:  
           102: ; Function Attrs: convergent nounwind uwtable 
           103: define amdgpu_kernel void @kernel_complex(ptr addrspace(4) byref([8 x i8]) align 4 %0) unnamed_addr #0 !guid !13 { 
           104: start: 
           105:  %1 = alloca [8 x i8], align 4, addrspace(5) 
           106:  %_1 = addrspacecast ptr addrspace(5) %1 to ptr 
           107:  call void @llvm.memcpy.p0.p4.i64(ptr align 4 %_1, ptr addrspace(4) align 4 %0, i64 8, i1 false) 
           108:  ret void 
           109: } 
           110:  
           111: ; Function Attrs: convergent nounwind uwtable 
           112: define amdgpu_kernel void @kernel_slice(ptr addrspace(4) byref([16 x i8]) align 8 %0) unnamed_addr #0 !guid !14 { 
           113: start: 
           114:  %1 = alloca [16 x i8], align 8, addrspace(5) 
           115:  %_1 = addrspacecast ptr addrspace(5) %1 to ptr 
           116:  call void @llvm.memcpy.p0.p4.i64(ptr align 8 %_1, ptr addrspace(4) align 8 %0, i64 16, i1 false) 
           117:  ret void 
           118: } 
           119:  
             .
             .
             .
           157:  store <2 x i8> %0, ptr %2, align 2 
           158:  call void @llvm.memcpy.p0.p0.i64(ptr align 2 %_1, ptr align 2 %2, i64 2, i1 false) 
           159:  ret void 
           160: } 
           161:  
           162: ; Function Attrs: convergent nounwind uwtable 
           163: define amdgpu_kernel void @kernel_i16x2_struct(<2 x i16> %0) unnamed_addr #0 !guid !19 { 
           164: start: 
           165:  %1 = alloca [4 x i8], align 4, addrspace(5) 
           166:  %2 = addrspacecast ptr addrspace(5) %1 to ptr 
           167:  %3 = alloca [4 x i8], align 4, addrspace(5) 
           168:  %_1 = addrspacecast ptr addrspace(5) %3 to ptr 
           169:  store <2 x i16> %0, ptr %2, align 4 
           170:  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %_1, ptr align 4 %2, i64 4, i1 false) 
           171:  ret void 
           172: } 
           173:  
           174: ; Function Attrs: convergent nounwind uwtable 
           175: define amdgpu_kernel void @kernel_i16x3_struct(<4 x i16> %0) unnamed_addr #0 !guid !20 { 
           176: start: 
           177:  %1 = alloca [8 x i8], align 8, addrspace(5) 
           178:  %2 = addrspacecast ptr addrspace(5) %1 to ptr 
           179:  %3 = alloca [8 x i8], align 8, addrspace(5) 
           180:  %_1 = addrspacecast ptr addrspace(5) %3 to ptr 
           181:  store <4 x i16> %0, ptr %2, align 8 
           182:  call void @llvm.memcpy.p0.p0.i64(ptr align 8 %_1, ptr align 8 %2, i64 8, i1 false) 
           183:  ret void 
           184: } 
           185:  
           186: ; Function Attrs: convergent nounwind uwtable 
           187: define amdgpu_kernel void @kernel_i16x4_struct(<4 x i16> %0) unnamed_addr #0 !guid !21 { 
           188: start: 
           189:  %1 = alloca [8 x i8], align 8, addrspace(5) 
           190:  %2 = addrspacecast ptr addrspace(5) %1 to ptr 
           191:  %3 = alloca [8 x i8], align 8, addrspace(5) 
           192:  %_1 = addrspacecast ptr addrspace(5) %3 to ptr 
           193:  store <4 x i16> %0, ptr %2, align 8 
           194:  call void @llvm.memcpy.p0.p0.i64(ptr align 8 %_1, ptr align 8 %2, i64 8, i1 false) 
           195:  ret void 
           196: } 
           197:  
           198: ; Function Attrs: convergent nounwind uwtable 
           199: define amdgpu_kernel void @kernel_i32x3_struct(<4 x i32> %0) unnamed_addr #0 !guid !22 { 
           200: start: 
           201:  %1 = alloca [16 x i8], align 16, addrspace(5) 
           202:  %2 = addrspacecast ptr addrspace(5) %1 to ptr 
           203:  %3 = alloca [16 x i8], align 16, addrspace(5) 
           204:  %_1 = addrspacecast ptr addrspace(5) %3 to ptr 
           205:  store <4 x i32> %0, ptr %2, align 16 
           206:  call void @llvm.memcpy.p0.p0.i64(ptr align 16 %_1, ptr align 16 %2, i64 16, i1 false) 
           207:  ret void 
           208: } 
           209:  
           210: ; Function Attrs: convergent nounwind uwtable 
           211: define amdgpu_kernel void @kernel_i32x4_struct(<4 x i32> %0) unnamed_addr #0 !guid !23 { 
           212: start: 
           213:  %1 = alloca [16 x i8], align 16, addrspace(5) 
           214:  %2 = addrspacecast ptr addrspace(5) %1 to ptr 
           215:  %3 = alloca [16 x i8], align 16, addrspace(5) 
           216:  %_1 = addrspacecast ptr addrspace(5) %3 to ptr 
           217:  store <4 x i32> %0, ptr %2, align 16 
           218:  call void @llvm.memcpy.p0.p0.i64(ptr align 16 %_1, ptr align 16 %2, i64 16, i1 false) 
           219:  ret void 
           220: } 
           221:  
           222: ; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) 
           223: declare void @llvm.memcpy.p0.p0.i64(ptr noalias writeonly captures(none), ptr noalias readonly captures(none), i64, i1 immarg) #1 
           224:  
           225: ; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) 
           226: declare void @llvm.memcpy.p0.p4.i64(ptr noalias writeonly captures(none), ptr addrspace(4) noalias readonly captures(none), i64, i1 immarg) #1 
           227:  
           228: attributes #0 = { convergent nounwind uwtable "target-cpu"="gfx900" } 
           229: attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) } 
           230:  
           231: !llvm.module.flags = !{!0, !1} 
           232: !llvm.ident = !{!2} 
           233:  
           234: !0 = !{i32 8, !"PIC Level", i32 2} 
           235: !1 = !{i32 7, !"uwtable", i32 2} 
           236: !2 = !{!"rustc version 1.100.0-nightly (a5deafdf1 2026-09-17)"} 
           237: !3 = !{i64 -1423071334091511355} 
           238: !4 = !{i64 5236029989505593049} 
           239: !5 = !{i64 3579283859987830744} 
           240: !6 = !{i64 -8343270752813774532} 
           241: !7 = !{i64 -3184313367073458083} 
           242: !8 = !{i64 -5082808322621136593} 
           243: !9 = !{i64 -3482464583660219769} 
           244: !10 = !{i64 1614804376308817931} 
           245: !11 = !{i64 -1507475595764241110} 
           246: !12 = !{i64 3294797800777344892} 
           247: !13 = !{i64 -6695143118636520432} 
           248: !14 = !{i64 2188551456724770103} 
           249: !15 = !{i64 -6185863346673075832} 
           250: !16 = !{i64 1846582427142452378} 
           251: !17 = !{i64 -2978271056480204578} 
           252: !18 = !{i64 -1523675446781228222} 
           253: !19 = !{i64 643363077994258841} 
           254: !20 = !{i64 -1085310592206253730} 
           255: !21 = !{i64 5306481493370234278} 
           256: !22 = !{i64 -3717069861779487104} 
           257: !23 = !{i64 1843908619938972735} 
check:110'2                                      } search range end (exclusive)
>>>>>>
------------------------------------------

---- [codegen] tests/codegen-llvm/amdgpu-abi/struct-abi.rs stdout end ----

@rust-bors rust-bors Bot added S-waiting-on-review Status: Awaiting review from the assignee but also interested parties. and removed S-waiting-on-bors Status: Waiting on bors to run and complete tests. Bors will change the label on completion. labels Sep 17, 2026
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💔 Test for a5deafd failed: CI. Failed job:

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☀️ Try build successful (CI)
Build commit: 6d68648 (6d686489e21bcb5107e53893b24cd02124b72dbb)
Base parent: c999cef (c999cef531ea9059e189e82fe0e82c5daf249bc9)

@rust-bors rust-bors Bot added S-waiting-on-author Status: This is awaiting some action (such as code changes or more information) from the author. and removed S-waiting-on-review Status: Awaiting review from the assignee but also interested parties. labels Sep 17, 2026
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PR #162177, which is a member of this rollup, was unapproved.

@rustbot rustbot removed the S-waiting-on-author Status: This is awaiting some action (such as code changes or more information) from the author. label Sep 17, 2026
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