Configuration registers

[jimaandro]

Hello
Can you explain what exactly are these used for ?

    assign cfg_rstval = hyperbus_pkg::hyper_cfg_t'{
        t_latency_access:           'h6,
        en_latency_additional:      'b0,
        t_burst_max:                'd350,      // At lowest legal clock (100 MHz): 3.5ns (0.5ns safety margin)
        t_read_write_recovery:      'h6,
        t_rx_clk_delay:             'h8,
        t_tx_clk_delay:             'h8,
        address_mask_msb:           'd25,       // 26 bit addresses = 2^6*2^20B == 64 MB per chip (biggest availale as of now)
        address_space:              'b0,
        phys_in_use:                NumPhys-1,
        which_phy:                  NumPhys-1,
        t_csh_cycles:               'h1
    };

How does this match with this ? www.infineon.com

[phsauter]

We are working on integrating PeakRDL which should have short descriptions of what the different params do, you can see it over in #34.