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simulation.yml
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Switch to SystemRDL simulation #13: Pull request #33 synchronize by ezelioli
1m 12s ez/rdl
ez/rdl
1m 12s
Switch to SystemRDL simulation #12: Pull request #33 synchronize by ezelioli
1m 7s ez/rdl
ez/rdl
1m 7s
Update CHANGELOG.md simulation #11: Commit cc03bc1 pushed by ezelioli
1m 5s master
master
1m 5s
Release v3.1.0 simulation #10: Pull request #34 opened by ezelioli
59s ez/v3p1p0
ez/v3p1p0
59s
Switch to SystemRDL simulation #9: Pull request #33 synchronize by ezelioli
1m 13s ez/rdl
ez/rdl
1m 13s
Switch to SystemRDL simulation #8: Pull request #33 opened by ezelioli
1m 14s ez/rdl
ez/rdl
1m 14s
Remove useless TCL lint job simulation #7: Commit fb9e40e pushed by ezelioli
1m 2s master
master
1m 2s
Remove useless TCL lint job simulation #6: Pull request #32 opened by ezelioli
59s ez/python
ez/python
59s
Switch to UV for Python simulation #5: Pull request #31 synchronize by ezelioli
1m 7s ez/uv
ez/uv
1m 7s
Switch to UV for Python simulation #4: Pull request #31 opened by ezelioli
1m 11s ez/uv
ez/uv
1m 11s
Add testbench simulation #3: Commit 4777d4f pushed by ezelioli
1m 11s master
master
1m 11s
Add testbench simulation #2: Pull request #30 synchronize by ezelioli
1m 7s ez/testbench
ez/testbench
1m 7s
Add testbench simulation #1: Pull request #30 opened by ezelioli
1m 5s ez/testbench
ez/testbench
1m 5s