feat(BACKEND-ROCM-F16-WEIGHTS): retain F16 dense weights on ROCm

[VikashLoomba]

Row

BACKEND-ROCM-F16-WEIGHTS. Refs #3092. Refs #3106.

What changed

ROCm retains supported dense and embedding GGUF weights in F16 storage. Each retained operand carries its resolved value dtype, so BF16 model arithmetic rounds the file values before multiplication or gathering. Ordinary NN/BT multiplication and both embedding ID widths reach native ROCm providers. Queue and graph ownership release transient conversion scratch without retaining a permanent converted weight copy.

The default Qwen3.5 dense registry supplies the value dtype and rejects incompatible explicit model dtypes. Other loaders and stacked experts preserve expansion. This change integrates the reviewed full-attention consumer prerequisite from #3101 and its runner regression correction under #3098. It is independent of #2782 and changes no CI configuration.

Before starting

• The gap was verified at 6db4bef906859e864c82523c01107473f7dcca29 against the code, tests, issues, pull requests, and owning records.
• One pull request carries specification 4486d24f07ce197155fa2b37c1ff590cdbe290e7 before implementation. The scratch-lifetime amendment also precedes its product changes.
• The canonical child inventory and evidence are in .agents/specs/rocm-f16-weights.md. The child remains ACTIVE; the parent lifecycle does not change.
• The design follows pinned vLLM e126687a9a and GGUF plugin d4c1f0d082 through parameter creation, destination-dtype conversion, and native dispatch.

Evidence

CPU ownership and metadata tests, physical gfx1100 primitive and lifetime tests, graph dedup, and two-device controls pass. The new registry control passes 4 cases and 107 assertions. The complete CPU operand-contract suite passes 6 cases and 240 assertions. Guard-deletion mutations fail the new registry, embedding-provider, and NN-compute assertions; the unchanged controls pass. Scoped restoration covers absent, empty, and nonempty environment values and both provider states.

The unchanged full-attention runner fixture now passes 18 assertions through successful execution, attention-cache writes, sampling, and request feedback. All 41 CPU runner cases pass with 1,914 assertions. Restoring unconditional dense GDN validation fails at the original refusal. The committed #3098 amendment precedes this test-only repair.

ctest --test-dir build-repair-cpu --output-on-failure -j 1 passes 703 cases, skips 12, and retains the single #3102 baseline failure out of 716. The operator runs the complete HIP suite under the GPU mutex with both devices visible, provider statistics enabled, and graph dedup disabled: 692 pass, 12 skip, and 20 fail out of 724. Every one of the 19 baseline failures matches the pristine diagnostic and assertion summary exactly. The remaining failure is #3106. The added public full-attention completion target passes.

bash scripts/agent-preflight.sh --staged exits zero with every executed check passing and 678 translation units compiled. Its five argument-dependent skips are qualified by an explicit passing CPU ISA audit, passing PR #3095 classification, and inapplicable ARM/CUDA/Triton artifacts. Exact-range style, trailer, classification, Now, and diff checks pass on 9cf2bc9505fc377dd5ef707b15c1122e6f09c60d.

The spec records exact commands, source and binary hashes, skips, and baseline comparisons. Root verifies all 4,157 source files and 1,006 declared HIP inputs before and after the full run. The operator's full preflight on 9cf2bc9505fc377dd5ef707b15c1122e6f09c60d also passed, including all 678 affected translation units. Fresh scoped review passed the three F16 guards, the prerequisite integration, and the runner regression. A separate implementer corrected the paged-attention source citation. Fresh record review passed on 4137b96369467e925bfdf0738e5bad013c89b58f. All 7,274 other tracked files retain their tested bytes and modes. The operator verified the one-line delta and reran the applicable record, anchor, compilation-scope, and exact-range gates before publishing that commit.

Repair round (heads 15d8e1682 and 6607faea2)

The committed spec and fix complete native unfused attention. Fresh review of 15d8e1682 returned PASS with no findings: four CPU guard mutations redden both model modes (default and explicitly unfused), and the operator's six GPU mutation gates each redden its guarantee on gfx1100: G1 unregisters the split and reproduces the recorded pre-fix refusal at the production regression (57 of 58, 10,457 assertions, vt: no kernel for op AttnGateSplit), G2 swaps the per-head query/gate layout, G3 replaces the nearest-even BF16 narrowing, G4 makes the gate widening lossy, G5 modifies the input, and G6 removes the current-device binding. Pristine rebuilt-head reruns of the five receipt gates exit zero. The operator receipts, the review report, and the mutation logs are retained with the row evidence, and the full preflight at 6607faea2 exits zero with the argument-dependent skips separately recorded.

Speed claims

This pull request makes no speed, latency, memory-ratio, or invocation-parity claim. The capacity-four materialized-oracle subcase matches all 256 generated IDs across both repeats. Matching rocprofv3 artifacts capture both executing paths, but native BF16-to-F32 outputs and atomics policy differ from the primary BF16-to-BF16 path.

Honest gaps

• F16-G3 is resolved at this head: the branch carries the committed BACKEND-ROCM-ATTN-GATE-SPLIT spec, the native ROCm AttnGateSplit kernel and its registration, and the model guards that reach it. The complete HIP GGUF test passes all 58 cases with 10,970 assertions, and ROCm unfused gated attention cannot dispatch AttnGateSplit #3106 closes when this change lands.
• Native D1 repeatability and the primary arithmetic comparison remain failing under Characterize Qwen3.5-0.8B CPU and ROCm state numerics on gfx1100 #2773. The identical GGUF primary remains pending under feat(BACKEND-ROCM-F16-WEIGHTS): retain F16 dense and embedding weights on ROCm #3092 and the plugin's recorded limitations; Can the pinned vLLM serve our Qwen3.8-27B Q4_K_M GGUF through vllm-gguf-plugin, and displace llama.cpp as this arm's oracle? #2624 owns the separate Qwen3.8 gateability measurement. The prerequisite's actual pinned engine attempt refuses Qwen3_5TextConfig before producing a token.
• CPU token-anchor failure fix(MODEL-TEXT-qwen3-qwen3-for-causal-lm): diagnose the CPU paged anchor drift #3102 and HIP baseline failures test(BACKEND-ROCM): reconcile the Strix full-suite failures #3070/fix(BACKEND-ROCM): diagnose the gfx1100 Qwen3 paged anchor drift #3105 retain their recorded diagnostics. Ownership does not waive any correctness gate.
• F16 model activations and outputs, RMSNorm activation support, stacked-expert retention, and other model-loader admission are outside this row. Public checkpoint pins and refused arms are recorded in docs/USAGE.md.
• The row remains ACTIVE. This session publishes for user review and does not merge.

FOLLOWING_AGENTS_PROTOCOL

Following-Agents-Protocol: true
AI-Assisted: true
Assisted-by: Codex:gpt-6-astra [Codex CLI]

[VikashLoomba]

CI triage — so the red checks can be read at a glance.

Four of the five red checks here are red in the same way on origin/main at 8df67640d, in main's own run 34538060205:

Check	Failure	Main evidence
sanitize-cpu (address,undefined)	test_dots3_note_vision, test_dots3_note_audio, test_openai_api_server_dots3_mm_forward	job 103074166410 fails the same three tests
sanitize-cpu (thread)	test_gemma4_moe_fp8_native_arm_guard	job 103074166517 fails the same test (its number is 162 there and 163 here because this branch adds one test)
windows-msvc-cpu	test_openai_api_server.exe exits -1073740791 (0xC0000409) at localiser cases 58/59/61	job 103074166371 is the same crash and exit code
windows-msvc-vulkan	the same crash and exit code	job 103074166311

The fifth, build-test-cpu, is a wall-clock flake in a path this diff never calls:

tests/vt/test_cpu_threadpool.cpp:610: MESSAGE: empty-op dispatch: 2 threads 0.421 us, 5 threads 42.75 us, ratio 101.544
ERROR: CHECK( ratio < 100.0 ) is NOT correct!

The arms 2 and 5 show the runner reported 4 cores. That case's own comment calibrates its 100x threshold on a 20-core box, where the arms are 10 and 21 and the recorded defect signature is an over arm of 2999-5996 us against 18-20 us fixed; the 42.75 us measured here is roughly 70x below the defect the case exists to catch, and the fitted arm's 0.421 us is about 4x below the 1.68 us that comment calibrates against. The measured path is Threadpool::Run with an empty body, which this branch never reaches: it changes attention and embedding gating in src/vt/ops.cpp. Tracked for the owning row as #3130. A re-run of the job should clear it.

pr-size passes on this pull request. mergeStateStatus is UNSTABLE because of the four pre-existing checks above.