[cryptolib, ecc] Pre register with randomness before shifting in scalar#30757
[cryptolib, ecc] Pre register with randomness before shifting in scalar#30757h-filali wants to merge 1 commit into
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andrea-caforio
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andrea-caforio
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Thanks @h-filali.
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@h-filali Can you investigate the CI failures? That's an abnormal amount. Might be worth to check with the infrastructure team. |
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@andrea-caforio having a look! |
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I would expect some ECC tests to fail here if it was due to the changes in this PR. There are no failing ECC tests though. I am restarting the tests to see if anything changes. If the tests still fail I'll check with the infra team. |
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Just FYI that the p256 sign also is used in the DICE of the boot, which might be the cause of the failing tests |
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Thanks @siemen11 I just had a look there were some additional instruction count checks I wasn't aware of. I added the updated counts to the commit now. This should hopefully do the trick! |
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Thanks @h-filali, indeed we now protect the ECC in the boot via instruction counts as well :s sorry for the inconvenience there! Looks like now it is good |
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There are two FPGA tests failing. Checking if a rerun does anything. @siemen11 no worries, it wasn't too much of a hassle :) |
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sca_ibex_python_test_fpga_cw340_sival_rom_ext is a flaky test, so the change looks good to go |
This PR first loads randomness into a register before shifting in 65 bits of the scalar. This acts as an SCA countermeasure. Signed-off-by: Hakim Filali <hfilali@lowrisc.org> (cherry picked from commit 3ad70d3)
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Backport PR.
(cherry picked from commit 3ad70d3)