27 Rev A - #16
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Assuming some of this stuff is coming from the like premade "design blocks" ppl made, never actually looked at any of that so I'll be looking thru that as well ig. Why did we decide to use hierarch labels instead of the regular ones for Vdd/GND? I think it's pretty common to tie SHIELD to GND thru a 1Mohm + 4.7nF. Again with this, why? Is this something we're actually doing or are you being sathvik? I think it may be meta to have these as an array of pinheaders or something (either in one big like 2xN RPI style array, or multiple smaller sub-arrays) instead of randomly placed. No Datasheet Which FET using? Not consistent? I would trend towards just using what the datasheet provides? (Idk what the prompt was for TI-GPT) These need to get spec'd and placed? (Also it pmo this stuf not centered, but super to the left) May be misunderstanding, but is this duped? There is cc pulldowns where USB-CONN is, and in PD sheet..? What will VBUS actually be in this situation? (Just curious) May just be retarded but I'm starting to get confused by all this PD bs. PD is attempting to negotiate for 20V max, and that is being set to PD_VBUS_OUT. It looks like we only are using 5V out??? If so, why do we even have PD here in the first place, just use CC pulldowns and call it a day?? I don't like this being advertised as a hierarch pin (saying it's NC), if its actually connected on the inside. Only end up exposing what's needed. If this is ALL that is in "MCU+Periphs", take it out. No reason for it to be a sheet within a sheet, Why two diode? Oh! There they are! 
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Holy fucking shit sathvik
Too many fuses imo board will be big (unless are pptc?). You already have on on 12V in, Honestly just put on on the MUX_OUT if you really want another one. I don't think you need one on the LDO. So instead of 4 fuses, 2 should be enough imo. i HATE how this looks. Make it normal Whatever man, put my name on it somewhere atp I dont like this ONE BIT. (Same for 3V3/VDDA). This to me looks like you're just completely shorting that shit together, and then not at the same time. ??? ???????????? HELLO ???????????? Also what's with this, why 10k and 33k parallel tied to both ALERT# and CLK. 
Multiple of my previous comments were not addressed, address them. |
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Sure whatever looks fine I guess.
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I'll keep fuses on for revA i like it this way, its compact I'll add you as decor dw, and will fix dc dc LC filter to follow data sheet |
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Still unaddressed:
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+1 on Shield GND - DNP 0ohm, tie shield pins together after the 0ohm |
Just making sure for when u implement DAC - its out of 5V not 3.3V |
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not seeing motor thermistor implemented (100k thermistor) |
thesurabhik
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thesurabhik
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Make sure you also fix Mika's comments but here's my feedback on top of that
Why do you have a VCU folder inside your hardware folder? You don't have multiple boards on this repo so get rid of it
Why does your gnd not say gnd?
Fuse on every single output is overkill. I'd just stick a blade fuse on the 12V line and not worry about the rest imo
Update all design blocks pls... the buck p/n got fixed recently
Ew wtf is this fan chip symbol it's so ugly
Why are they horizontal? and lwk just make them two separate ones
I would recommend using two 1x3 can connectors and a 1x2 debug connector for rev a. It'll just be easier for testing. We can group things into larger connectors for rev b
Your shielding is wrong, this is how you should do it so that the pins are shorted to each other and then optionally to gnd if needed
Use the connector symbol that has 1 opposite of 10 so it circles around instead. The pin numbering convention is different this yr to match the new deutsch connectors
Add labels and footprints for these test points. Make sure you differentiate between pin headers and through holes for appropriate applications. Also don't put them in an array like this, have them as part of the circuits they're breaking out
Mostly ignoring motor comms since you said that was a work in progress? I can look over it again later if needed
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