Add f32-ibilinear-chw microkernel benchmark - #10770
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This microkernel family had no benchmark. Build the indirection buffer with xnn_indirection_init_resize_bilinear2d_chw_f32 so the layout cannot drift from the operator's, and rotate buffers across iterations as bench/f32-dwconv.cc does. Shapes reuse bench/operators/resize-bilinear-nhwc.cc, plus a few working sets larger than cache. Registers all f32-ibilinear-chw ukernels: scalar, neon, neonfma, sse, wasmsimd. Signed-off-by: Le Duc Léandre <lleduc@kalrayinc.com>
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There is no benchmark for the
f32-ibilinear-chwmicrokernel family, so changes to these kernels cannot be measured.The benchmark builds its indirection buffer and interpolation coefficients with
xnn_indirection_init_resize_bilinear2d_chw_f32the operator's own code, asbench/f32-dwconv.ccalready does for dwconv so it cannot drift from the layoutxnn_resize_bilinear2d_nchwactually produces.Shapes are the decoder ladder from
bench/operators/resize-bilinear-nhwc.cc, so the CHW microkernel numbers stay comparable with the operator benchmark, plus a few working sets larger than cache.Every existing ukernel is registered:
scalarp1/p2/p4,neonandneonfmap4/p8/p16,ssep4/p8,wasmsimdp4/p8. The#ifguards mirroribilinear-chw-config.c.Only the x86 path (
sse_p4/p8,scalar_p1/p2/p4) has been built and run; the ARM and wasm registrations are compile-time-guarded and untested.