Add RV64D floating-point context switching and MicroPython math support

[codingskynet]

Summary

• Add eager save and restore of all RV64D floating-point registers and fcsr during kernel thread context switches.
• Preserve user-mode floating-point state across traps and scheduler preemption.
• Keep floating-point instructions disabled during ordinary kernel execution.
• Add a concurrent floating-point context-switch smoke test.
• Enable double-precision floating-point and the math module in MicroPython.
• Add an RK4 harmonic oscillator test that verifies exact IEEE 754 results.
• Extend MicroPython module imports to support read-only modules and packages from /lib.

Implementation details

Floating-point context switching

SwitchContext now stores:

• All 32 RV64D floating-point registers
• The floating-point control and status register (fcsr)

The scheduler eagerly saves the outgoing thread's floating-point state and restores the incoming thread's state during every context switch.

The kernel normally runs with sstatus.FS=Off. The context-switch assembly temporarily enables floating-point access only while copying FP state and disables it before returning to Rust code.

RISC-V assembly workaround

Rust currently lowers naked_asm! to global assembly without reliably forwarding the target's floating-point extensions to LLVM's assembler.

Each floating-point assembly fragment is therefore locally wrapped with:

.option push
.option arch, +d
...
.option pop