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Merged
alexcrichton merged 1 commit into from
Jul 23, 2026
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winch(aarch64) v128 comparisons #13937

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51 changes: 51 additions & 0 deletions tests/disas/winch/aarch64/v128_ops/f32x4_eq.wat
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;;! target = "aarch64"
;;! test = "winch"

(module
(memory 1)
(func (export "run")
(v128.store (i32.const 0)
(f32x4.eq
(v128.const f32x4 1.5 nan -0x0p0 100)
(v128.const f32x4 1.5 2 0 -3)))))
;; wasm[0]::function[0]:
;; stp x29, x30, [sp, #-0x10]!
;; mov x29, sp
;; str x28, [sp, #-0x10]!
;; mov x28, sp
;; ldur x16, [x0, #8]
;; ldur x16, [x16, #0x18]
;; mov x17, #0
;; movk x17, #0x10
;; add x16, x16, x17
;; cmp sp, x16
;; b.lo #0x74
;; 2c: mov x9, x0
;; sub x28, x28, #0x10
;; mov sp, x28
;; stur x0, [x28, #8]
;; stur x1, [x28]
;; ldr q0, #0x80
;; ldr q1, #0x90
;; fcmeq v1.4s, v1.4s, v0.4s
;; mov x0, #0
;; ldur x1, [x9, #0x38]
;; add x1, x1, w0, uxtw
;; stur q1, [x1]
;; add x28, x28, #0x10
;; mov sp, x28
;; mov sp, x28
;; ldr x28, [sp], #0x10
;; ldp x29, x30, [sp], #0x10
;; ret
;; 74: udf #0xc11f
;; 78: udf #0
;; 7c: udf #0
;; 80: .byte 0x00, 0x00, 0xc0, 0x3f
;; 84: .byte 0x00, 0x00, 0x00, 0x40
;; 88: udf #0
;; 8c: mov za0h.h[w12, 0], p0/m, z0.h
;; 90: .byte 0x00, 0x00, 0xc0, 0x3f
;; 94: .byte 0x00, 0x00, 0xc0, 0x7f
;; 98: .byte 0x00, 0x00, 0x00, 0x80
;; 9c: .byte 0x00, 0x00, 0xc8, 0x42
51 changes: 51 additions & 0 deletions tests/disas/winch/aarch64/v128_ops/f32x4_ge.wat
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;;! target = "aarch64"
;;! test = "winch"

(module
(memory 1)
(func (export "run")
(v128.store (i32.const 0)
(f32x4.ge
(v128.const f32x4 1.5 nan -0x0p0 100)
(v128.const f32x4 1.5 2 0 -3)))))
;; wasm[0]::function[0]:
;; stp x29, x30, [sp, #-0x10]!
;; mov x29, sp
;; str x28, [sp, #-0x10]!
;; mov x28, sp
;; ldur x16, [x0, #8]
;; ldur x16, [x16, #0x18]
;; mov x17, #0
;; movk x17, #0x10
;; add x16, x16, x17
;; cmp sp, x16
;; b.lo #0x74
;; 2c: mov x9, x0
;; sub x28, x28, #0x10
;; mov sp, x28
;; stur x0, [x28, #8]
;; stur x1, [x28]
;; ldr q0, #0x80
;; ldr q1, #0x90
;; fcmge v1.4s, v1.4s, v0.4s
;; mov x0, #0
;; ldur x1, [x9, #0x38]
;; add x1, x1, w0, uxtw
;; stur q1, [x1]
;; add x28, x28, #0x10
;; mov sp, x28
;; mov sp, x28
;; ldr x28, [sp], #0x10
;; ldp x29, x30, [sp], #0x10
;; ret
;; 74: udf #0xc11f
;; 78: udf #0
;; 7c: udf #0
;; 80: .byte 0x00, 0x00, 0xc0, 0x3f
;; 84: .byte 0x00, 0x00, 0x00, 0x40
;; 88: udf #0
;; 8c: mov za0h.h[w12, 0], p0/m, z0.h
;; 90: .byte 0x00, 0x00, 0xc0, 0x3f
;; 94: .byte 0x00, 0x00, 0xc0, 0x7f
;; 98: .byte 0x00, 0x00, 0x00, 0x80
;; 9c: .byte 0x00, 0x00, 0xc8, 0x42
51 changes: 51 additions & 0 deletions tests/disas/winch/aarch64/v128_ops/f32x4_gt.wat
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;;! target = "aarch64"
;;! test = "winch"

(module
(memory 1)
(func (export "run")
(v128.store (i32.const 0)
(f32x4.gt
(v128.const f32x4 1.5 nan -0x0p0 100)
(v128.const f32x4 1.5 2 0 -3)))))
;; wasm[0]::function[0]:
;; stp x29, x30, [sp, #-0x10]!
;; mov x29, sp
;; str x28, [sp, #-0x10]!
;; mov x28, sp
;; ldur x16, [x0, #8]
;; ldur x16, [x16, #0x18]
;; mov x17, #0
;; movk x17, #0x10
;; add x16, x16, x17
;; cmp sp, x16
;; b.lo #0x74
;; 2c: mov x9, x0
;; sub x28, x28, #0x10
;; mov sp, x28
;; stur x0, [x28, #8]
;; stur x1, [x28]
;; ldr q0, #0x80
;; ldr q1, #0x90
;; fcmgt v1.4s, v1.4s, v0.4s
;; mov x0, #0
;; ldur x1, [x9, #0x38]
;; add x1, x1, w0, uxtw
;; stur q1, [x1]
;; add x28, x28, #0x10
;; mov sp, x28
;; mov sp, x28
;; ldr x28, [sp], #0x10
;; ldp x29, x30, [sp], #0x10
;; ret
;; 74: udf #0xc11f
;; 78: udf #0
;; 7c: udf #0
;; 80: .byte 0x00, 0x00, 0xc0, 0x3f
;; 84: .byte 0x00, 0x00, 0x00, 0x40
;; 88: udf #0
;; 8c: mov za0h.h[w12, 0], p0/m, z0.h
;; 90: .byte 0x00, 0x00, 0xc0, 0x3f
;; 94: .byte 0x00, 0x00, 0xc0, 0x7f
;; 98: .byte 0x00, 0x00, 0x00, 0x80
;; 9c: .byte 0x00, 0x00, 0xc8, 0x42
51 changes: 51 additions & 0 deletions tests/disas/winch/aarch64/v128_ops/f32x4_le.wat
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;;! target = "aarch64"
;;! test = "winch"

(module
(memory 1)
(func (export "run")
(v128.store (i32.const 0)
(f32x4.le
(v128.const f32x4 1.5 nan -0x0p0 100)
(v128.const f32x4 1.5 2 0 -3)))))
;; wasm[0]::function[0]:
;; stp x29, x30, [sp, #-0x10]!
;; mov x29, sp
;; str x28, [sp, #-0x10]!
;; mov x28, sp
;; ldur x16, [x0, #8]
;; ldur x16, [x16, #0x18]
;; mov x17, #0
;; movk x17, #0x10
;; add x16, x16, x17
;; cmp sp, x16
;; b.lo #0x74
;; 2c: mov x9, x0
;; sub x28, x28, #0x10
;; mov sp, x28
;; stur x0, [x28, #8]
;; stur x1, [x28]
;; ldr q0, #0x80
;; ldr q1, #0x90
;; fcmge v1.4s, v0.4s, v1.4s
;; mov x0, #0
;; ldur x1, [x9, #0x38]
;; add x1, x1, w0, uxtw
;; stur q1, [x1]
;; add x28, x28, #0x10
;; mov sp, x28
;; mov sp, x28
;; ldr x28, [sp], #0x10
;; ldp x29, x30, [sp], #0x10
;; ret
;; 74: udf #0xc11f
;; 78: udf #0
;; 7c: udf #0
;; 80: .byte 0x00, 0x00, 0xc0, 0x3f
;; 84: .byte 0x00, 0x00, 0x00, 0x40
;; 88: udf #0
;; 8c: mov za0h.h[w12, 0], p0/m, z0.h
;; 90: .byte 0x00, 0x00, 0xc0, 0x3f
;; 94: .byte 0x00, 0x00, 0xc0, 0x7f
;; 98: .byte 0x00, 0x00, 0x00, 0x80
;; 9c: .byte 0x00, 0x00, 0xc8, 0x42
51 changes: 51 additions & 0 deletions tests/disas/winch/aarch64/v128_ops/f32x4_lt.wat
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;;! target = "aarch64"
;;! test = "winch"

(module
(memory 1)
(func (export "run")
(v128.store (i32.const 0)
(f32x4.lt
(v128.const f32x4 1.5 nan -0x0p0 100)
(v128.const f32x4 1.5 2 0 -3)))))
;; wasm[0]::function[0]:
;; stp x29, x30, [sp, #-0x10]!
;; mov x29, sp
;; str x28, [sp, #-0x10]!
;; mov x28, sp
;; ldur x16, [x0, #8]
;; ldur x16, [x16, #0x18]
;; mov x17, #0
;; movk x17, #0x10
;; add x16, x16, x17
;; cmp sp, x16
;; b.lo #0x74
;; 2c: mov x9, x0
;; sub x28, x28, #0x10
;; mov sp, x28
;; stur x0, [x28, #8]
;; stur x1, [x28]
;; ldr q0, #0x80
;; ldr q1, #0x90
;; fcmgt v1.4s, v0.4s, v1.4s
;; mov x0, #0
;; ldur x1, [x9, #0x38]
;; add x1, x1, w0, uxtw
;; stur q1, [x1]
;; add x28, x28, #0x10
;; mov sp, x28
;; mov sp, x28
;; ldr x28, [sp], #0x10
;; ldp x29, x30, [sp], #0x10
;; ret
;; 74: udf #0xc11f
;; 78: udf #0
;; 7c: udf #0
;; 80: .byte 0x00, 0x00, 0xc0, 0x3f
;; 84: .byte 0x00, 0x00, 0x00, 0x40
;; 88: udf #0
;; 8c: mov za0h.h[w12, 0], p0/m, z0.h
;; 90: .byte 0x00, 0x00, 0xc0, 0x3f
;; 94: .byte 0x00, 0x00, 0xc0, 0x7f
;; 98: .byte 0x00, 0x00, 0x00, 0x80
;; 9c: .byte 0x00, 0x00, 0xc8, 0x42
51 changes: 51 additions & 0 deletions tests/disas/winch/aarch64/v128_ops/f32x4_ne.wat
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;;! target = "aarch64"
;;! test = "winch"

(module
(memory 1)
(func (export "run")
(v128.store (i32.const 0)
(f32x4.ne
(v128.const f32x4 1.5 nan -0x0p0 100)
(v128.const f32x4 1.5 2 0 -3)))))
;; wasm[0]::function[0]:
;; stp x29, x30, [sp, #-0x10]!
;; mov x29, sp
;; str x28, [sp, #-0x10]!
;; mov x28, sp
;; ldur x16, [x0, #8]
;; ldur x16, [x16, #0x18]
;; mov x17, #0
;; movk x17, #0x10
;; add x16, x16, x17
;; cmp sp, x16
;; b.lo #0x78
;; 2c: mov x9, x0
;; sub x28, x28, #0x10
;; mov sp, x28
;; stur x0, [x28, #8]
;; stur x1, [x28]
;; ldr q0, #0x80
;; ldr q1, #0x90
;; fcmeq v1.4s, v1.4s, v0.4s
;; mvn v1.16b, v1.16b
;; mov x0, #0
;; ldur x1, [x9, #0x38]
;; add x1, x1, w0, uxtw
;; stur q1, [x1]
;; add x28, x28, #0x10
;; mov sp, x28
;; mov sp, x28
;; ldr x28, [sp], #0x10
;; ldp x29, x30, [sp], #0x10
;; ret
;; 78: udf #0xc11f
;; 7c: udf #0
;; 80: .byte 0x00, 0x00, 0xc0, 0x3f
;; 84: .byte 0x00, 0x00, 0x00, 0x40
;; 88: udf #0
;; 8c: mov za0h.h[w12, 0], p0/m, z0.h
;; 90: .byte 0x00, 0x00, 0xc0, 0x3f
;; 94: .byte 0x00, 0x00, 0xc0, 0x7f
;; 98: .byte 0x00, 0x00, 0x00, 0x80
;; 9c: .byte 0x00, 0x00, 0xc8, 0x42
51 changes: 51 additions & 0 deletions tests/disas/winch/aarch64/v128_ops/f64x2_eq.wat
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;;! target = "aarch64"
;;! test = "winch"

(module
(memory 1)
(func (export "run")
(v128.store (i32.const 0)
(f64x2.eq
(v128.const f64x2 nan 2.5)
(v128.const f64x2 1 2.5)))))
;; wasm[0]::function[0]:
;; stp x29, x30, [sp, #-0x10]!
;; mov x29, sp
;; str x28, [sp, #-0x10]!
;; mov x28, sp
;; ldur x16, [x0, #8]
;; ldur x16, [x16, #0x18]
;; mov x17, #0
;; movk x17, #0x10
;; add x16, x16, x17
;; cmp sp, x16
;; b.lo #0x74
;; 2c: mov x9, x0
;; sub x28, x28, #0x10
;; mov sp, x28
;; stur x0, [x28, #8]
;; stur x1, [x28]
;; ldr q0, #0x80
;; ldr q1, #0x90
;; fcmeq v1.2d, v1.2d, v0.2d
;; mov x0, #0
;; ldur x1, [x9, #0x38]
;; add x1, x1, w0, uxtw
;; stur q1, [x1]
;; add x28, x28, #0x10
;; mov sp, x28
;; mov sp, x28
;; ldr x28, [sp], #0x10
;; ldp x29, x30, [sp], #0x10
;; ret
;; 74: udf #0xc11f
;; 78: udf #0
;; 7c: udf #0
;; 80: udf #0
;; 84: .byte 0x00, 0x00, 0xf0, 0x3f
;; 88: udf #0
;; 8c: .byte 0x00, 0x00, 0x04, 0x40
;; 90: udf #0
;; 94: .byte 0x00, 0x00, 0xf8, 0x7f
;; 98: udf #0
;; 9c: .byte 0x00, 0x00, 0x04, 0x40
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