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Fix Triton pointer offsets for large batches#1

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ashutoshuiuc:mainfrom
HuXinjing:fix/triton-int64-pointer-offsets
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Fix Triton pointer offsets for large batches#1
HuXinjing wants to merge 1 commit into
ashutoshuiuc:mainfrom
HuXinjing:fix/triton-int64-pointer-offsets

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Summary

This fixes large-batch pointer arithmetic in the V2 Triton MaxSim kernels.

For large document batches, pointer offsets such as:

D_ptr + batch_idx * Nd * d + ...

can cross the signed int32 element-offset boundary before GPU memory is exhausted.
With a real ColQwen page shape of Nd=747, d=320, the limit is about:

floor((2^31 - 1) / (747 * 320)) + 1 = 8984 documents

That caused flash_maxsim_v2_multiquery to fail with CUDA illegal memory access
around 8990 documents even though GPU memory usage was only about 4.5 GiB.

Changes

  • Cast Triton program ids and index vectors used in pointer arithmetic to tl.int64.
  • Apply the fix consistently to:
    • _flash_maxsim_v2_kernel
    • _flash_maxsim_v2_multiquery_kernel
    • _flash_maxsim_v2_mq_dimtile_kernel

Validation

Environment:

  • GPU: RTX 4090 24GB
  • Query shape: 44 x 320
  • Document/page shape: 747 x 320
  • dtype: fp16
  • Kernel: flash_maxsim_v2_multiquery

Before this change:

Documents Result
8950 ok
8990 CUDA illegal memory access

After this change:

Documents Result Peak GPU memory Mean scoring latency
8990 ok 4559 MiB 9.20 ms
10000 ok 5019 MiB 10.22 ms
16384 ok 7929 MiB 16.56 ms
32768 ok 15399 MiB 32.86 ms
49152 ok 22869 MiB 49.14 ms
53248 expected CUDA OOM during tensor allocation - -

The failure mode after the fix is normal GPU memory exhaustion rather than an
illegal memory access.

@HuXinjing HuXinjing force-pushed the fix/triton-int64-pointer-offsets branch from c83ef10 to a9bfd1e Compare July 11, 2026 13:40
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