accel/amdxdna: Increase max ctx id for aie4/umq#1453
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Pull request overview
This PR updates the AMD XDNA DRM driver’s hardware-context handle allocation limit so UMQ (notably AIE4 UMQ/PF variants) can create more than 255 contexts, while keeping the smaller 255-handle space for KMQ devices.
Changes:
- Make the maximum allocatable hwctx handle depend on
dev_info->device_type(KMQ: 255, non-KMQ: 1024). - Add
<linux/sizes.h>to useSZ_1Kfor the UMQ handle limit.
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Signed-off-by: Hayden Laccabue <hlaccabu@amd.com>
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| #define MAX_HWCTX_ID 255 | ||
| /* KMQ has a smaller hw context id space than UMQ */ | ||
| #define MAX_HWCTX_ID(xdna) ((xdna)->dev_info->device_type == AMDXDNA_DEV_TYPE_KMQ ? 255 : 1023) |
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This looks better but it doesn't address my another concern.
The KMQ will be enabled soon for aie4.
My question is:
Should aie2 also keep 255 and aie4 use 1023? If yes, the new code won't work.
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I said before the device type of aie4 won't change to KMQ though, it will still have device type UMQ with kernel mode submission enabled.
@NishadSaraf fw for umq supports > 255 ctxs, I am assuming we want to keep 255 as max for kmq? Let me know.