Support header entries in RTL filelists

[SFangYy]

Description

This PR improves export filelist handling for header-only RTL entries and makes the top-level build more stable in CI.

Changes included:

• support .vh and .svh entries in RTL filelists during picker export
• treat header entries as include directories instead of simulator source files
• keep generated simulator filelist.f limited to compilable RTL sources such as .v and .sv
• set the top-level Makefile default goal explicitly to all so plain make does not accidentally select example targets in CI or container builds
• add regression coverage for header-only filelist entries

This is a non-breaking change intended to make multi-file RTL filelists behave more like common HDL project layouts.

Fixes # (issue)

Type of change

• Bug fix (non-breaking change which fixes an issue)
• New feature (non-breaking change which adds functionality)
• Breaking change (fix or feature that would cause existing functionality to not work as expected)
• This change requires a documentation update

How Has This Been Tested?

• Added a unit test case covering .vh / .svh entries in filelists
• Verified generated simulator filelists keep .v / .sv entries and exclude header-only entries
• Reviewed top-level make behavior to ensure the default goal is explicitly all

Test Configuration:

• Firmware version: N/A
• Hardware: N/A
• Toolchain: local GCC / CMake build environment
• SDK: N/A

Checklist:

• My code follows the style guidelines of this project
• I have added the appropriate labels
• I have performed a self-review of my code
• I have commented my code, particularly in hard-to-understand areas
• I have made corresponding changes to the documentation
• My changes generate no new warnings
• I have added tests that prove my fix is effective or that my feature works
• New and existing unit tests pass locally with my changes
• Any dependent changes have been merged and published in downstream modules

[Copilot]

Pull request overview

This PR updates picker export filelist processing so SystemVerilog/Verilog header entries (.svh, .vh) are handled as include directories rather than compilable sources, and stabilizes top-level CI builds by explicitly setting the Makefile default target.

Changes:

• Extend filelist parsing to recognize .svh/.vh and convert those entries into include directories (excluding them from the generated compilable file list).
• Add a regression test covering header-only filelist entries and their include-dir behavior.
• Set .DEFAULT_GOAL := all in the top-level Makefile to avoid accidental target selection when running plain make.

Reviewed changes

Copilot reviewed 10 out of 10 changed files in this pull request and generated no comments.

Show a summary per file

File	Description
test/test_codegen_filelist.cpp	Adds a regression scenario asserting .vh/.svh entries are excluded from ofilelist and contribute include dirs.
src/codegen/lib.cpp	Updates gen_filelist to treat .vh/.svh as headers: add their parent directories to incdirs and omit them from ofilelist.
Makefile	Sets the default goal to all to make make behavior deterministic in CI/container contexts.
example/MultiFileRTL/top.sv	Adds a new example top module that uses included headers for parameterization.
example/MultiFileRTL/release-vcs.sh	Adds a VCS export script for the new MultiFileRTL example.
example/MultiFileRTL/leaf.v	Adds a leaf RTL module for the MultiFileRTL example.
example/MultiFileRTL/inc/outer.svh	Adds a header that composes definitions via include and defines a derived width.
example/MultiFileRTL/inc/defs.vh	Adds a base header define used by the example.
example/MultiFileRTL/example.py	Adds a simple Python usage example for the exported DUT.
example/MultiFileRTL/design.f	Adds a multi-file RTL filelist including +incdir+ and explicit header entries to exercise the new behavior.

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