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Fix ISD2115 write skipping and RP2040 unaligned memory access#63

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notexactlynikhil:fix-isd2115-write-corruption
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Fix ISD2115 write skipping and RP2040 unaligned memory access#63
notexactlynikhil wants to merge 1 commit into
X360Tools:masterfrom
notexactlynikhil:fix-isd2115-write-corruption

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Summary of Changes

This PR resolves writing/verification failures on the ISD2115 (and potentially other ISD/Nuvoton voice chips) by fixing a PIO timing race condition and resolving a silent unaligned memory access bug on the Cortex-M0+ core.

Root Causes & Fixes

1. ISD SPI Byte Skipping (PIO Race Condition)

  • Problem: In spi.pio, the CPHA1 SPI program (spi_cpha1_cs) loops back and checks the RDY pin (wait 1 GPIO 11) immediately after transmitting a byte. Since the PIO clock is running at 4MHz, it executes this check before the ISD chip can physically pull the RDY pin low (busy). Consequently, the PIO incorrectly assumes the chip is ready and immediately transmits the next byte, causing the ISD chip to skip every alternating byte. The ISD2110 barely squeaked by this timing margin, while the ISD2115 consistently failed.
  • Fix: Added a 31-cycle delay ([31], ~7.75µs) on the loopback jump instruction in spi.pio (jmp !osre byteloop side 0x0 [31]). This gives the chip adequate time to pull RDY low, ensuring the subsequent wait blocks correctly until the chip is ready for the next byte.

2. Silent Command Corruption (Cortex-M0+ Unaligned Store)

  • Problem: In isd1200.c (isd1200_flash_read and isd1200_flash_write), the 24-bit offset was written using a 32-bit pointer dereference at an unaligned address: *(uint32_t *)&buf[1] = __builtin_bswap32(offset << 8);. On the RP2040's Cortex-M0+ core, unaligned 32-bit stores are not supported and are silently aligned down to the nearest 4-byte boundary. This resulted in the write targeting buf[0], corrupting the command byte (e.g., CMD_DIG_WRITE / 0xA0).
  • Fix: Replaced the unaligned pointer casts with safe, portable byte-wise shifts to correctly populate buf[1], buf[2], and buf[3].

File Modifications

  • isd1200.c: Replaced unaligned 32-bit casts with safe byte-wise bit-shifting.
  • spi.pio: Added [31] delay cycles to CPHA1 SPI loopback to prevent RDY pin race condition.

Verification & Testing

  • Verified that write operations to ISD2115 now successfully complete and pass verification without byte skipping or padding corruption.

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