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I'm an Electronics & Communication Engineering student building toward Verification Engineering in the VLSI industry. My path runs through signal processing first — filters, spectral analysis, modulation — because that's where the intuition for "what a signal actually looks like" comes from before you're staring at RTL and waveforms all day.
I build things that run, not things that just look like they run. Every repo below has a real test suite and I can walk through any line of it.
+ Building out a Verilog/SystemVerilog foundation
+ Maintaining signal-processing-toolkit (Python DSP library)
+ Following an 18-month roadmap toward VLSI verification internships|
A Python DSP library built from the ground up — not a wrapper, an actual toolkit with validated math. What's in it:
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Designed and simulated a patch antenna for the 2.4 GHz ISM band as a team B.Tech project — full workflow from geometry design through S-parameter validation. What it involved:
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Languages |
Tools |
Focus areas |