[AMD][MI35X] Serve Qwen3.5 MXFP4-AttnFP8-V2 on the MI355X SGLang - #2793
[AMD][MI35X] Serve Qwen3.5 MXFP4-AttnFP8-V2 on the MI355X SGLang#2793yichiche wants to merge 1 commit into
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| description: | ||
| - "Serve amd/Qwen3.5-397B-A17B-MXFP4-AttnFP8-V2 instead of amd/Qwen3.5-397B-A17B-MXFP4, the newer AMD checkpoint that keeps MXFP4 MoE weights, quantizes the shared expert into the fused MoE kernel, and runs attention in FP8" | ||
| - "Add SGLANG_USE_AITER_FP8_PER_TOKEN=1 to benchmarks/single_node/fixed_seq_len/qwen3.5_fp4_mi355x.sh and qwen3.5_fp4_mi355x_mtp.sh so the FP8 attention weights take the per-channel/per-token aiter GEMM path published with the checkpoint instead of the per-tensor fallback" | ||
| pr-link: PR_LINK_PLACEHOLDER |
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🔴 New changelog entry's pr-link is the literal placeholder string "PR_LINK_PLACEHOLDER" instead of a real PR URL, unlike every other entry in this append-only file. Fix: replace with the actual GitHub PR URL before merge; any tooling that parses pr-link (e.g. to build changelog links) will get a broken/non-URL value otherwise.
Extended reasoning...
perf-changelog.yaml is append-only and each prior entry (e.g. line 6730's pr-link: https://github.com/.../pull/2634) holds a real URL. This new entry at the tail sets pr-link: PR_LINK_PLACEHOLDER, so any consumer of this file (changelog renderer, doc generator, or a human clicking through) that expects a valid URL for every entry will fail or produce a dead link for this record specifically.
Verification: normal. The new entry at perf-changelog.yaml:6742 sets pr-link: PR_LINK_PLACEHOLDER, an invalid value. This is stronger than the candidate frames it (not just a dead link): the repo's own changelog gate rejects it. In utils/validate_perf_changelog.py, accepted placeholders are only PR_LINK_PLACEHOLDERS = {"XXX", "https://github.com/SemiAnalysisAI/InferenceX/pull/XXX"} (lines 24-27), and…
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see unofficial run visualizer at https://inferencex.semianalysis.com/inference?unofficialRun=33484262630 |
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…d-seq-len arms Retarget qwen3.5-fp4-mi355x-sglang and qwen3.5-fp4-mi355x-sglang-mtp from amd/Qwen3.5-397B-A17B-MXFP4 to amd/Qwen3.5-397B-A17B-MXFP4-AttnFP8-V2, the newer AMD checkpoint that keeps MXFP4 MoE weights, folds the shared expert into the fused MoE kernel, and runs self_attn / linear_attn in FP8. Drop the TP4 band from both arms. The checkpoint's Quark config marks linear_attn as per-channel FP8 weights with dynamic per-token activations, so QuarkW8A8Fp8 routes in_proj_ba through aiter gemm_a8w8_bpreshuffle. in_proj_ba has N=128, which TP4 shards to N=32, and the CK bpreshuffle instances are generated with GemmSpecialization::Default (NPerBlock=64, no MN padding), so IsSupportedArgument rejects it and the scheduler dies during prefill with "This GEMM is not supported!". TP2 gives N=64 and runs fine. The band comes back once SGLang falls back to torch._scaled_mm for N % 64 != 0. Image, isl/osl, runner, precision, framework and every launch flag are unchanged, and the qwen3.5-fp4-mi355x-atom arm keeps both TP bands on the older MXFP4 checkpoint. Co-Authored-By: Claude Opus 5 (1M context) <noreply@anthropic.com>
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see unofficial run visualizer at https://inferencex.semianalysis.com/inference?unofficialRun=33598359757 |
Motivation
amd/Qwen3.5-397B-A17B-MXFP4-AttnFP8-V2is a newer AMD checkpoint of Qwen3.5-397B-A17B. It keeps the routed experts in MXFP4, additionally quantizes the shared expert to MXFP4 and fuses it into the routed MoE kernel, and runsself_attn/linear_attnin FP8 (per-channel static weights, per-token dynamic activations). Its published GSM8K is 97.24 vs. 97.71 for the bf16Qwen/Qwen3.5-397B-A17Bbaseline (99.55% recovery). It supersedesamd/Qwen3.5-397B-A17B-MXFP4as the checkpoint the MI355X SGLang single-node fixed-seq-len submission should represent.This is a redo of #2695 on top of current
main: that PR predates #2640 (image bump tov0.5.18-rocm720-mi35x-20260829,--kv-cache-dtype fp8_e4m3,--disable-shared-experts-fusion), which has since landed and made it conflict.Modifications
In
configs/amd-master.yaml, onqwen3.5-fp4-mi355x-sglangandqwen3.5-fp4-mi355x-sglang-mtp:model:amd/Qwen3.5-397B-A17B-MXFP4→amd/Qwen3.5-397B-A17B-MXFP4-AttnFP8-V2.{ tp: 4, conc-start: 4, conc-end: 16 }band from both arms, leaving TP2.Why TP4 has to go. The first sweep on this PR (run 33484262630) crashed every TP4 job in prefill:
The checkpoint's
quantization_configisquant_method: quarkwithlayer_quant_configentries for*linear_attn*and*self_attn*(fp8_e4m3,qscheme: per_channel,is_dynamic: true). SoQuarkW8A8Fp8setsper_token=Trueand, under theSGLANG_USE_AITER=1the scripts already export, pre-shuffles the weights and dispatches to aitergemm_a8w8_bpreshuffle.in_proj_baisMergedColumnParallelLinear(hidden_size=4096, output_sizes=[num_v_heads, num_v_heads]), i.e. N=128 total. TP2 shards it to N=64; TP4 shards it to N=32. aiter's CK dispatch for K≥1536 / M≥256 / N<1536 picks an NPerBlock=64 instance, and the bpreshuffle instances are generated withGemmSpecialization::Default— no MN padding, because the weight is pre-shuffled — soIsSupportedArgumentrejects N=32. This is structural in the current CK instance set, not a tuning gap, so a newer image alone would not fix it. The band can come back onceapply_fp8_linearfalls back totorch._scaled_mmrowwise forN % 64 != 0; a comment in the config records that.The
imagestays atlmsysorg/sglang-rocm:v0.5.18-rocm720-mi35x-20260829, andisl/osl, runner, precision, framework, and all launch flags are untouched — no launch-script change in this PR at all.runners/launch_mi355x-amds.shresolves the launch script frommodel-prefix,precision, andframework, so both arms keep using the same two scripts with the checkpoint arriving through$MODEL.The
qwen3.5-fp4-mi355x-atomarm still servesamd/Qwen3.5-397B-A17B-MXFP4and keeps both TP bands; the AgentX and disagg fp4 arms are untouched.Append the corresponding
perf-changelog.yamltrigger covering both config keys.Accuracy Tests
GSM8K from the sweep on this PR, all four eval rows green on the new checkpoint (
lm-eval, 5-shot, chat template):em_strictem_flexibleqwen3.5-fp4-mi355x-sglangqwen3.5-fp4-mi355x-sglangqwen3.5-fp4-mi355x-sglang-mtpqwen3.5-fp4-mi355x-sglang-mtpNo accuracy-affecting logic changes in this repo; correctness of the checkpoint itself is upstream.
Benchmarking
Repo validation was run locally:
python -m pytest utils/matrix_logic/ -q→ 267 passed.python utils/matrix_logic/generate_sweep_configs.py full-sweep --config-files configs/amd-master.yaml --model-prefix qwen3.5 --precision fp4 --runner-type mi355x --scenario-type fixed-seq-len→ 23 configs: 13 onamd/Qwen3.5-397B-A17B-MXFP4-AttnFP8-V2(7 TP2 non-MTP, 6 TP2 MTP) at the unchanged image, plus the 10 unchanged ATOM configs still onamd/Qwen3.5-397B-A17B-MXFP4. Down from 29 because the two TP4 bands (6 configs) are gone.End-to-end MI355X throughput numbers come from the sweep triggered on this PR (
full-sweep-fail-fast). Because the checkpoint changes and the TP4 band is removed, the resulting numbers are not a like-for-like continuation of the previous MXFP4 series on these two config keys.Conflicts
Supersedes #2695, which is the same checkpoint change against a pre-#2640
main. #2695 should be closed if this lands.Note
Low Risk
Benchmark configuration and changelog only; no launch scripts or runtime logic in this repo.
Overview
Updates the MI355X SGLang fixed-seq-len benchmark matrix for Qwen3.5 FP4 by pointing
qwen3.5-fp4-mi355x-sglangandqwen3.5-fp4-mi355x-sglang-mtpatamd/Qwen3.5-397B-A17B-MXFP4-AttnFP8-V2instead of the older MXFP4-only checkpoint (FP8 attention + fused shared-expert MoE). TP4 concurrency sweeps are removed from both keys, leaving TP2 only, because TP4 triggers unsupported aiter FP8 GEMM shapes during prefill.A matching
perf-changelog.yamlentry documents the checkpoint swap and TP4 removal for those two config keys. ATOM, agentic, and disagg arms are unchanged.Reviewed by Cursor Bugbot for commit febaac4. Bugbot is set up for automated code reviews on this repo. Configure here.