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CollectiveX: wire-basis payload bandwidth + nccl-ep LL hold in the support matrix - #953

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Oseltamivir merged 2 commits into
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feat/collectivex-wire-basis
Aug 31, 2026
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CollectiveX: wire-basis payload bandwidth + nccl-ep LL hold in the support matrix#953
Oseltamivir merged 2 commits into
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feat/collectivex-wire-basis

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@Oseltamivir Oseltamivir commented Aug 30, 2026

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Companion to SemiAnalysisAI/InferenceX#2786 (measurement-side).

  1. Payload bandwidth divides from the wire basis. packages/db/src/collectivex/reader.ts mapped rates only from byte_provenance, which is rank-deduplicated — for DeepEP/UCCL/NCCL low-latency layouts (one copy per token–expert assignment) that published a lower bound as the wire rate, 34.1% low on nccl-ep LL EP8 at T=128 (77.4 vs 117.4 MB per direction), and made LL GB/s incomparable across backends. The reader now prefers the new wire_byte_provenance field; artifacts written before it fall back and only ever understate.
  2. Known-support matrix: nccl-ep LL cells go red. The "works with ladder clamped to ≤128" note presented the clamp as a safety boundary; the harness source says it is not one (the un-fenced combine race is on every rung). Cells flip to broken/held until a fenced wheel ships; the registry hold is in InferenceX#2786.
  3. MoRI LL note now reflects AsyncLL split-phase (the kernel SGLang deploys; validated on mi355x, run 33319409233, both precisions green).

Tests: reader/known-support/data suites 72 pass (new test pins the wire-basis preference and payload_bytes); tsc clean on db+app.


Note

Low Risk
Changes affect CollectiveX metric interpretation and curated support labels only; no auth, persistence, or runtime execution paths.

Overview
Payload bandwidth now derives from wire_byte_provenance when artifacts include it, instead of rank-deduplicated byte_provenance alone—so low-latency token–expert layouts no longer show understated wire GB/s; older shards still fall back and only understate. A reader test and fixture hook (wireBytesFactor) lock in that preference for payload_bytes and payload rates.

The known-support matrix reclassifies nccl-ep low-latency from “works with T≤128 clamp” to held/broken (nccl-ll-fence-race) across NVIDIA SKUs, and marks MoRI LL on mi3xx as broken for AsyncLL top-k 6 (mori-asyncll-topk6) while updating the scale-up-only footnote to describe AsyncLL split-phase.

Reviewed by Cursor Bugbot for commit 1728eb7. Bugbot is set up for automated code reviews on this repo. Configure here.

…nccl-ep LL cells

- reader.ts prefers wire_byte_provenance (per-(token,expert) for the LL layouts
  that do not rank-deduplicate; InferenceX#2786) over the deduplicated
  byte_provenance, whose rates were a lower bound presented as wire bandwidth
  (34% low on nccl-ep LL EP8 at T=128). Pre-wire artifacts fall back and only
  ever understate.
- Known-support matrix: nccl-ep low-latency EP8 cells flip to broken with an
  honest note — the T<=128 clamp only reduced exposure to the un-fenced combine
  race (DeepEP #642), it was never a safety boundary; rows are held until a
  fenced wheel ships (registry hold in InferenceX#2786).
- MoRI LL note updated: the benchmark now measures AsyncLL split-phase, the
  kernel SGLang deploys (validated on mi355x 2026-08-30).
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Oseltamivir requested a review from adibarra as a code owner August 30, 2026 15:34
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…opk-6 assert)

Bisected on-metal with a pure mori.ops probe on mia1-p01-g18: AsyncLL passes at
top-k 8 with both 256 and 384 experts and dies at top-k 6 with both, on the
device assert (pe >= 0) && (pe < worldSize) in
EpDispatchLowLatencyAsyncRecvCopyMultiBlock. Known upstream: ROCm/mori#505
('AsyncLL slot assignment double-allocates when top-k does not divide
warpSize', merged 2026-07-31); every shipped mi35x image predates it (newest
mori-0706). Cells flip green with the image bump; no new upstream issue needed.
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Oseltamivir merged commit e5addf2 into master Aug 31, 2026
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Oseltamivir deleted the feat/collectivex-wire-basis branch August 31, 2026 07:54
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