drivers/iommu:riscv:add dma_wmb before cmpxchg_relaxed#309
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开始测试 log: https://github.com/RVCK-Project/rvck/actions/runs/27664081160 参数解析结果
测试完成 详细结果:
Kunit Test Result[03:42:15] Testing complete. Ran 482 tests: passed: 466, skipped: 16
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开始测试 log: https://github.com/RVCK-Project/rvck/actions/runs/27677458532 参数解析结果
测试完成 详细结果:
Kunit Test Result[08:58:23] Testing complete. Ran 482 tests: passed: 466, skipped: 16
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The real race here is CPU-CPU (concurrent pte_alloc callers), not CPU-to-DMA-device. dma_wmb fixes it functionally but is semantically misleading. Suggest using cmpxchg_release instead,— matching upstream generic_pt (pt_table_install64 uses try_cmpxchg64_release)
Also, the CPU vs IOMMU-HW-walker race likely doesn't exist for new PDE installation,Please double-check whether this race is actually reachable in practice. |
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@fangyu0809 As the comment explains, the introduction of dma_wmb() primarily addresses the lack of ordering guarantees for cmpxchg64_release on non‑SMP architectures. The new version modifies this to: I believe this adjustment is also intended to maintain compatibility across both SMP and non‑SMP configurations. Therefore, in my current modification, I have chosen to adopt the earlier approach — using dma_wmb() combined with cmpxchg64_relaxed — for consistency and to preserve the original ordering semantics. |
driver inclusion category: bugfix Link: RVCK-Project#308 -------------------------------- When multiple cores execute riscv_iommu_map_pages/riscv_iommu_pte_alloc, a parallel consistency problem can occur. Setting dma_wmb ensures that all previous DMA write operations have been completed before cmpxchg_relaxed. Signed-off-by: bailu <bai.lu5@zte.com.cn> Signed-off-by: liuqingtao <liu.qingtao2@zte.com.cn>
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开始测试 log: https://github.com/RVCK-Project/rvck/actions/runs/28210386797 参数解析结果
测试完成 详细结果:
Kunit Test Result[01:07:04] Testing complete. Ran 482 tests: passed: 466, skipped: 16
Kernel Build Result
Check Patch Result
LAVA Check (qemu)
result: Lava check done!
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drivers/iommu:riscv:add dma_wmb before cmpxchg_relaxed
driver inclusion
category: bugfix
bugzilla: #308
When multiple cores execute riscv_iommu_map_pages/riscv_iommu_pte_alloc, a parallel consistency problem can occur.
Setting dma_wmb ensures that all previous DMA write operations have been completed before cmpxchg_relaxed.
Signed-off-by: bailu bai.lu5@zte.com.cn
Signed-off-by: liuqingtao liu.qingtao2@zte.com.cn