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moe: mxfp_moe gemm1 fp4 A-LDS read -> crd2idx (fp8 kept manual) - #929

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moe: mxfp_moe gemm1 fp4 A-LDS read -> crd2idx (fp8 kept manual)#929
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Summary

Follow-up to #913. Ports the fp4 mxfp_moe gemm1 A-LDS read swizzle from the manual XOR to the crd2idx layout form (reusing _a_lds_swz_block_layout/_a_lds_swz_block_idx landed in #913), matching gemm2. fp8 (a8w4) is intentionally kept on the manual XOR.

Why fp4 only (measured, not inferred)

Rigorous median-of-15 on gfx950 (interleaved A/B, order-reversed, cache off, 7168×2048 t8192 e32 k8):

dtype manual crd2idx Δ verdict
fp4 1515.1 µs 1513.6 µs -0.1% parity → ported
fp8 (a8w4) 1859.5 µs 2046.5 µs +10.1% real regression → kept manual

Both forms are bit-for-bit identical to the manual index (verified exhaustively; fp8 uses the split-16@64 reuse of the 8-block helper). The fp8 crd2idx form has equal-or-leaner static ISA (fewer instrs, 148<152 VGPR, no spills) yet is reproducibly ~10% slower — pure hot-loop instruction-scheduling sensitivity, non-overlapping across all 15 paired rounds. So fp8 stays manual.

Cold fp4 cos passes (✓ Check passed, Logits Diff 0.911). black + ruff clean.

🤖 Generated with Claude Code

fp4 read swizzle -> crd2idx over composed SwizzleType(3,0,4); bit-identical to
the manual XOR and perf-neutral (-0.1% median-of-15 on gfx950). fp8 (a8w4) read
stays manual: crd2idx is bit-identical but ~10% slower (measured, median-of-15)
from hot-loop instruction scheduling despite equal-or-leaner static ISA. Cold
fp4 cos passes.

Co-Authored-By: Claude Opus 4.8 (1M context) <noreply@anthropic.com>
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coderfeli marked this pull request as draft July 30, 2026 09:22
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