Feature/csr#7

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PeterWang-dev wants to merge 18 commits into

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Commits on Mar 12, 2026

refactor(hw/riscv/Rvi): rename Rvi to Rv32i to match the spec
PeterWang-dev
committed

Commits on Mar 27, 2026

fix(hw/blackbox/MemDpi): align dpi memory to axi-like interface and make read invalid when write
PeterWang-dev
committed

Commits on Mar 28, 2026

feat(sim/rust): enhance diff result and disable difftest temporarily
PeterWang-dev
committed

Commits on Jun 4, 2026

fix(hw/verilog/ebreak): correct the context of ebreak call to make it response to valid immediately
PeterWang-dev
committed
build(Makefile): add target to generate waveform
PeterWang-dev
committed

Commits on Jul 12, 2026

fix(sim/rust/futurecore): correct difftest skip sync write logic
PeterWang-dev
committed