gk7205v500: CMA-allocated MMZ no longer panics the kernel on VPSS-to-VENC bind

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Problem

With mmz_allocator=cma (the gk7205v500 family default since #236), a GK7205V510 panicked the kernel as soon as a bound VPSS channel delivered its first frame to VENC. The image runs with the console loglevel at 0, so nothing was printed, and the board rebooted panic= seconds later. That looked like a hardware reset. With printk raised:

Alignment trap: not handling instruction f8d31045 at [<bfa025d8>]
Unhandled fault: alignment exception (0x001) at 0xc99b6045
[c99b6045] *pgd=4086d811, *pte=42008043, *ppte=42008012
PC is at VENC_VpssSend+0x10f/0x164 [open_venc]
(VENC_VpssSend [open_venc]) from (VpssFakeSend+0x1aa/0x294 [open_vpss])
(VpssFakeSend) from (VPSS_ProcSendPic) ... from (VpssOnLineSendFrame [open_vpss])

The closed venc object reads its bind descriptors with an unaligned ldr.w. The CMA allocator mapped non-cached MMBs with pgprot_noncached(), which is strongly-ordered on ARM, and an unaligned load from strongly-ordered memory always faults. The carve-out allocator maps the same buffers with ioremap_wc() (Normal non-cacheable), where the load is legal. That is why mmz_allocator=xmedia streams and cma did not.

Change

kernel/osal/gk7205v500/mmz_arm.h, ARM branch only:

• arch_kern_pgprot() returns pgprot_writecombine() for the non-cached case, matching the carve-out allocator.
• __dma_clear_buffer() is declared and called with the OpenIPC 4.9 kernel's three arguments. With two, its coherent_flag, which decides whether the zeroed pages are flushed out of the cache, was whatever cma_alloc() left in r2.

The other families' mmz_arm.h copies (hi3516cv500, hi3519v101, linux) also use pgprot_noncached(). They are left alone: no fault has been observed there.

Tested on

GK7205V510, Zenointel SD-2N-4G, MIS2008, OpenIPC gk7205v500_ultimate NAND image, mem=128M mmz_allocator=cma mmz=anonymous,0,0x42000000,96M. The rebuilt open_osal.ko was loaded in place of the image's.

Isolation, with the same image and modules:

Run	before	after
vendor SPC020 sample_vio mode 0 (VI → VPSS → bound VENC)	kernel panic within 1 s	25 s, 13 MB H.265
same, with mmz_allocator=xmedia (mem=32M or mem=64M)	streams	—
VI → VPSS, VPSS frames relayed to an unbound VENC from user space	stable	—
majestic, default config	panic	40 s of 1080p snapshots, RTSP HEVC 1920x1080@20
dmesg | grep -c alignment	—	0

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PR Summary by Qodo

Prevent CMA MMZ alignment panic on GK7205V500 VPSS-to-VENC binds

🐞 Bug fix 🕐 10-20 Minutes

AI Description

• Map non-cached CMA MMZ buffers as write-combined memory to prevent VPSS-to-VENC alignment faults.
• Pass the required coherent flag when clearing CMA pages so zeroed data is flushed.

Diagram

graph TD
  CMA["CMA allocator"] --> Clear["DMA page clear"] --> Map["Write-combined mapping"] --> MMB["MMZ buffer"] --> VPSS["VPSS frame delivery"] --> VENC["VENC bind read"]

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High-Level Assessment

Use the PR's targeted ARM mapping change: it matches the working carve-out allocator without changing other families or the closed VENC object. Correcting the DMA helper call at the same boundary also removes an undefined cache-flush decision.

Files changed (1) +16 / -3

Bug fix (1) +16 / -3

mmz_arm.hCorrect ARM CMA buffer attributes and DMA clearing +16/-3

Correct ARM CMA buffer attributes and DMA clearing

• Changes non-cached ARM MMZ mappings from strongly-ordered to write-combined memory, preventing alignment faults when bound VENC reads descriptors. Passes an explicit zero coherent flag to the OpenIPC 4.9 kernel's three-argument __dma_clear_buffer() so cleared pages are flushed.

kernel/osal/gk7205v500/mmz_arm.h

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Code Review by Qodo

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