Project Overview

A custom System-on-Chip(SoC) metal detection soft microcontroller implemented on an Artix-7 Basys3 Board. The objective was to excercise hardware-firmware co-design, bridging the gap between deterministic hardware and the development speed/flexibiity of firmware. By partitioning the workload, the system processes data in real time, achieving a flawless 15/15 detection rate during live demos

Hardware Architecture

Note: To see the specs, check the hardware design folder

The core sensing logic was implemented in HDL (see the tech stack). Rather than relying on a standard hard-core processor for real time signal processing, the physical logic gates of the FPGA are configured into a soft-core MicroBlaze processor to detect the inductance changes from an external metal detection circuit caused by passing metal.

Firmware Design

Note: To see the Finite State Machine, check the WP folder

The implementation of a mealy-type Finite State Machine programmed on Vitis Unified IDE, the application handles state management, filtering via an EMA Filter, debouncing via lockout counter and handling edge cases so no false readings are read.

Tech Stack:

• Target Hardware:
• Hardware Description Languages:
• Software Programming Languages: Embedded
• Electronic Design Automation Tools:

Team Members:

• Nicolas Rampelotto
• Andrew Liu