Avoid trailing_zeros in the strided reduction's offset decode

[maleadt]

Reductions over several non-contiguous dims decode the reduced offset with trailing_zeros(sz) for power-of-two extents. That lowers to SPIR-V's ctz, which spirv2clc can't translate ("UNIMPLEMENTED extended instruction 152"), so on OpenCL.jl's OpenCL C path these reductions fail to compile:

using pocl_jll, OpenCL; import AcceleratedKernels as AK
OpenCL.program_backend!(:opencl)
x = CLArray(rand(Float32, 4, 3, 8, 5))
AK.reduce(+, x; dims=(1, 3), init=0f0)   # Failed to translate SPIR-V to OpenCL C

For a power of two, count_ones(sz - 1) is the same shift, and ispow2 already uses count_ones, which translates. With this change dims=(1,3), (2,4) and (1,3,4) compile and match Base on pocl's OpenCL C path. Found by OpenCL.jl's poclc test target, running the GPUArrays 12 testsuite (mean and mapreduce with several dims).

(The trailing_zeros calls in the bitonic sort are on compile-time constants and fold away.)

[maleadt]

Fixing this in spirv2clc instead (JuliaGPU/spirv2clc#6), which translates ctz rather than working around it here.