fp: trace GPU vs CPU row-reduce dispatch (fp::rr)

ext/crates/fp/Cargo.toml

@@ -17,6 +17,8 @@ paste = "1.0.15"
 proptest = { version = "1.7", optional = true }
 serde = { version = "1.0.219", features = ["derive"] }
 serde_json = "1.0.141"
+# Only used for the GPU row-reduce dispatch instrumentation; pulled in by `gpu`.
+tracing = { version = "0.1.41", optional = true }
 
 maybe-rayon = { path = "../maybe-rayon" }
 query = { path = "../query" }
@@ -45,7 +47,7 @@ default = ["odd-primes"]
 concurrent = ["maybe-rayon/concurrent"]
 odd-primes = []
 # Dispatch large p=2 matrix products to the Hopper GPU backend (`fp-cuda`).
-gpu = ["dep:fp-cuda"]
+gpu = ["dep:fp-cuda", "dep:tracing"]
 
 [[bench]]
 name = "mul"

ext/crates/fp/src/blas/cuda.rs

@@ -14,12 +14,26 @@
 //!   CPU path is used. Defaults to 2048; the GPU only wins once the kernel work
 //!   dwarfs the H2D/D2H + TMA-layout marshalling, which dominates small sizes.
 
-use std::sync::{Mutex, OnceLock};
+use std::sync::{Mutex, OnceLock, RwLock};
 
 use fp_cuda::GpuContext;
 
 use crate::{matrix::Matrix, prime::TWO};
 
+/// Serializes the fp-cuda **cooperative** row-reduce (raw cudarc) against the algebra
+/// **cubecl** Milnor multiply, which share the one physical GPU from different CUDA
+/// runtimes. The row-reduce's `cuLaunchCooperativeKernel` (panel_factor_coop's grid-wide
+/// spin barrier) needs *all* its CTAs co-resident; a cubecl multiply kernel occupying SMs
+/// at that moment prevents co-residency, so the missing CTAs never reach the barrier and
+/// the resident ones spin forever (flat sm=100% — the intermittent stem-150 wedge).
+///
+/// Contract: the cooperative row-reduce takes the **write** lock (exclusive GPU) around its
+/// launch+download; every cubecl multiply takes a **read** lock held from launch through its
+/// readback (so releasing means that kernel has actually completed, not merely enqueued).
+/// Readers run concurrently with each other; a pending row-reduce drains them, runs alone,
+/// then lets them resume. See `algebra::algebra::milnor_gpu` for the read side.
+pub static GPU_EXCLUSIVE: RwLock<()> = RwLock::new(());
+
 /// Smallest `min(m, k, n)` for which we attempt the GPU matmul. Below this the
 /// host marshalling (bit-repack into TMA tiles + copies) costs more than it saves.
 const DEFAULT_THRESHOLD: usize = 2048;
@@ -127,7 +141,11 @@ pub(crate) fn try_row_reduce(m: &mut Matrix) -> Option<usize> {
     let stride = cols.div_ceil(64);
     let limbs = to_limbs(m);
 
+    // Exclusive GPU for the cooperative reduce: block new cubecl multiplies and wait for
+    // in-flight ones to complete, so panel_factor_coop's grid-wide barrier can co-reside all
+    // its CTAs (see [`GPU_EXCLUSIVE`]). Held across launch + download; ordered before ctx.lock.
     let (dev_limbs, perm, r, pivot_cols) = {
+        let _exclusive = GPU_EXCLUSIVE.write().unwrap_or_else(|e| e.into_inner());
         let gpu = ctx.lock().ok()?;
         let mut dm = gpu.upload(&limbs, rows, cols).ok()?;
         let (perm, r, pivot_cols) = gpu.row_reduce_dev(&mut dm).ok()?;

ext/crates/fp/src/lib.rs

@@ -12,6 +12,12 @@ pub mod vector;
 
 pub mod blas;
 
+/// Cross-runtime GPU serialization lock (cubecl multiply vs. cooperative fp-cuda row-reduce).
+/// Re-exported so `algebra`'s Milnor-multiply GPU path can take the read side. See
+/// [`blas::cuda::GPU_EXCLUSIVE`].
+#[cfg(feature = "gpu")]
+pub use blas::cuda::GPU_EXCLUSIVE;
+
 pub(crate) mod simd;
 
 // This is useful for traits that want to implement `Arbitrary`. This lets us specify that they

ext/crates/fp/src/matrix/matrix_inner.rs

@@ -677,11 +677,53 @@ impl Matrix {
         // For large p = 2 matrices, try the device-resident GPU reduction; it
         // produces the identical canonical RREF + pivots. Falls back to the CPU
         // M4RI path below when the GPU is unavailable or below threshold.
+        //
+        // Instrumentation: for every p=2 reduction of a non-trivial matrix
+        // (min(rows,cols) >= 1024) we emit a `fp::rr` tracing event recording the
+        // dimensions and whether the GPU path was taken (`path="gpu"`) or it fell
+        // back to CPU M4RI (`path="cpu"` — either below the 8192 threshold or a
+        // launch failure; the logged dims disambiguate). The event inherits the
+        // active nassau span, so it carries the bidegree/signature context.
         #[cfg(feature = "gpu")]
-        if p == 2
-            && let Some(rank) = crate::blas::cuda::try_row_reduce(self)
-        {
-            return rank;
+        if p == 2 {
+            let (rr_rows, rr_cols) = (self.rows(), self.columns());
+            let rr_big = rr_rows.min(rr_cols) >= 1024;
+            // Wrap the GPU reduce in an ENTERED span (not just a completion event) so a wedge
+            // *inside* `try_row_reduce` leaves an open `gpu_row_reduce` span with no `close` in the
+            // log — distinguishing an RREF hang from a milnor-multiply hang. Inherits the active
+            // nassau step span, so it carries the bidegree/signature. Dropped on return/fallthrough.
+            let _rr_span = rr_big.then(|| {
+                tracing::info_span!(target: "fp::rr", "gpu_row_reduce", rows = rr_rows, cols = rr_cols)
+                    .entered()
+            });
+            match crate::blas::cuda::try_row_reduce(self) {
+                Some(rank) => {
+                    if rr_big {
+                        tracing::info!(
+                            target: "fp::rr",
+                            rows = rr_rows,
+                            cols = rr_cols,
+                            min = rr_rows.min(rr_cols),
+                            path = "gpu",
+                            rank,
+                            "row_reduce"
+                        );
+                    }
+                    return rank;
+                }
+                None => {
+                    if rr_big {
+                        tracing::info!(
+                            target: "fp::rr",
+                            rows = rr_rows,
+                            cols = rr_cols,
+                            min = rr_rows.min(rr_cols),
+                            path = "cpu",
+                            "row_reduce"
+                        );
+                    }
+                }
+            }
         }
 
         self.initialize_pivots();