AVAJA

AVAJA is a compact USB debug probe for RISC-V softcores and FPGA development boards. It combines a CMSIS-DAP v2 JTAG adapter, a target UART bridge, voltage translation, and adapter diagnostics on a single PMOD-sized board.

Features

• WCH CH32V307RCT6 RISC-V MCU running at 144 MHz from an 8 MHz crystal.
• USB-C device connection with USB data-line ESD protection.
• CMSIS-DAP v2 JTAG transport for OpenOCD.
• USB CDC bridge to the target UART.
• Separate USB CDC interfaces for adapter logs and a future embedded GDB server.
• Target-powered SN74LVC8T245 level translators for JTAG and UART signals.
• Automatic target VREF detection; PMOD outputs remain disabled without a valid target supply.
• PMOD-compatible 2x6 target connector.
• USB ROM bootloader and WCH-Link programming paths.
• Power, run, USB, UART, JTAG, target and error indicators.

Architecture

Host PC
  |
  | USB-C / USB full speed
  v
CH32V307RCT6
  |-- CMSIS-DAP v2 ------> GPIO JTAG engine
  |-- Target UART CDC ---> USART2
  |-- Debug Log CDC
  `-- Reserved GDB CDC
          |
          v
  VREF-controlled level translators
          |
          v
     2x6 PMOD target

The current JTAG engine is GPIO-based and accepts requested clocks from 1 kHz to 2 MHz. JTAG ownership is arbitrated so CMSIS-DAP and the future embedded GDB server cannot drive the interface simultaneously.

USB Interfaces

The development firmware enumerates with VID 0xCAFE and PID 0x4013:

Function	Interfaces	Endpoints
Target UART CDC	0, 1	0x81, 0x02, 0x82
Reserved GDB CDC	2, 3	0x83, 0x04, 0x84
Debug Log CDC	4, 5	0x85, 0x06, 0x86
CMSIS-DAP v2	6	0x07, 0x87

The VID/PID values are for development only and must be replaced before distributing hardware as a finished product.

Target Connector

J5 is the PMOD-facing 2x6 connector:

Pin	Direction at AVAJA	Signal
1, 2	Input/reference	VREF_PMOD
3, 4	Power	GND
5	Output	JTAG TCK
6	Input/control	UART RTS / auxiliary input
7	Input	JTAG TDO
8	Output	UART RX at target
9	Output	JTAG TDI
10	Input	UART TX from target
11	Output	JTAG TMS
12	Output/control	UART CTS

VREF_PMOD powers only the target side of the level translators and is sensed through a high-impedance divider. AVAJA does not power the target through this pin. Rev A has no dedicated target reset signal.

See hardware/pinout.md and firmware/pin-map.md for the complete connector and MCU maps.

Build Firmware

Requirements

• A bare-metal RISC-V GCC toolchain available as riscv64-elf-gcc.
• wchisp for USB ROM bootloader flashing or wlink for WCH-Link flashing.
• Git submodule support for TinyUSB and the WCH CH32V307 device library.

After cloning the repository, initialize the dependencies:

git submodule update --init --recursive

Build the firmware with:

make -C firmware

The build produces avaja.elf, avaja.hex, and avaja.bin under firmware/build/.

Flash

Enter the CH32V307 USB bootloader with the BOOT and reset controls, then run:

make -C firmware flash-isp

For WCH-Link:

make -C firmware flash-wlink

Test

On macOS, the three CDC interfaces appear as /dev/cu.usbmodem*. The log monitor reconnects automatically when the probe resets:

./scripts/monitor-usb-log.sh /dev/cu.usbmodemXXXX

To validate the complete CMSIS-DAP and electrical JTAG path without a target:

1. Apply 3.3 V to PMOD pin 1 or 2 (VREF_PMOD).
2. Short PMOD pin 9 (TDI) to pin 7 (TDO).
3. Run:

./scripts/test-cmsis-dap-loopback.sh

Expected result:

Product: AVAJA Debug Probe
TDI: 3c a5 69 96
TDO: 3c a5 69 96
CMSIS-DAP v2 JTAG loopback passed

Remove the TDI/TDO short before connecting a real target.

OpenOCD

A CMSIS-DAP adapter configuration is provided at firmware/openocd/avaja.cfg:

openocd \
  -f firmware/openocd/avaja.cfg \
  -f path/to/your-target.cfg

The target configuration must define the actual JTAG TAP and RISC-V target.

Repository Layout

assets/                 Project images
firmware/               CH32V307 firmware and build system
  lib/ch32v307/         Pinned WCH device library submodule
  lib/tinyusb/          Pinned TinyUSB submodule
  openocd/              Host adapter configuration
hardware/               KiCad sources and connector documentation
scripts/                USB log and CMSIS-DAP loopback tools

Future Work

• Implement the embedded GDB server over the reserved CDC interface.

The Name

AVAJA stands for A Very Advanced JTAG Adapter. Avaja (pronounced ah-VAH-yah) is also a Sicilian expression that can roughly be translated as "come on!" and felt appropriate for something used when hardware refuses to cooperate.