Lots of changes (see changelog), most notably the refactoring of the NR algorithms and lots of renaming - #137
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BDonnot wants to merge 93 commits into
Open
Lots of changes (see changelog), most notably the refactoring of the NR algorithms and lots of renaming#137BDonnot wants to merge 93 commits into
BDonnot wants to merge 93 commits into
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…libraries Signed-off-by: DONNOT Benjamin <benjamin.donnot@rte-france.com>
Signed-off-by: DONNOT Benjamin <benjamin.donnot@rte-france.com>
Signed-off-by: DONNOT Benjamin <benjamin.donnot@rte-france.com>
Signed-off-by: DONNOT Benjamin <benjamin.donnot@rte-france.com>
Signed-off-by: DONNOT Benjamin <benjamin.donnot@rte-france.com>
Signed-off-by: DONNOT Benjamin <benjamin.donnot@rte-france.com>
Signed-off-by: DONNOT Benjamin <benjamin.donnot@rte-france.com>
… ci] Signed-off-by: DONNOT Benjamin <benjamin.donnot@rte-france.com>
Signed-off-by: DONNOT Benjamin <benjamin.donnot@rte-france.com>
Signed-off-by: DONNOT Benjamin <benjamin.donnot@rte-france.com>
Signed-off-by: DONNOT Benjamin <benjamin.donnot@rte-france.com>
Signed-off-by: DONNOT Benjamin <benjamin.donnot@rte-france.com>
Signed-off-by: DONNOT Benjamin <benjamin.donnot@rte-france.com>
Signed-off-by: DONNOT Benjamin <benjamin.donnot@rte-france.com>
Signed-off-by: DONNOT Benjamin <benjamin.donnot@rte-france.com>
Signed-off-by: DONNOT Benjamin <benjamin.donnot@rte-france.com>
Signed-off-by: DONNOT Benjamin <benjamin.donnot@rte-france.com>
Signed-off-by: DONNOT Benjamin <benjamin.donnot@rte-france.com>
Signed-off-by: DONNOT Benjamin <benjamin.donnot@rte-france.com>
Signed-off-by: DONNOT Benjamin <benjamin.donnot@rte-france.com>
Signed-off-by: DONNOT Benjamin <benjamin.donnot@rte-france.com>
Signed-off-by: DONNOT Benjamin <benjamin.donnot@rte-france.com>
… the future Signed-off-by: DONNOT Benjamin <benjamin.donnot@rte-france.com>
Signed-off-by: DONNOT Benjamin <benjamin.donnot@rte-france.com>
Signed-off-by: DONNOT Benjamin <benjamin.donnot@rte-france.com>
Signed-off-by: DONNOT Benjamin <benjamin.donnot@rte-france.com>
…[skip ci] Signed-off-by: DONNOT Benjamin <benjamin.donnot@rte-france.com>
Signed-off-by: DONNOT Benjamin <benjamin.donnot@rte-france.com>
Signed-off-by: DONNOT Benjamin <benjamin.donnot@rte-france.com>
Signed-off-by: DONNOT Benjamin <benjamin.donnot@rte-france.com>
Signed-off-by: Benjamin DONNOT <benjamin.donnot@gmail.com>
Signed-off-by: Benjamin DONNOT <benjamin.donnot@gmail.com>
…ar solver API between initialize, now initialize and factorize Signed-off-by: DONNOT Benjamin <benjamin.donnot@rte-france.com>
Signed-off-by: DONNOT Benjamin <benjamin.donnot@rte-france.com>
… running the benchmarks Signed-off-by: DONNOT Benjamin <benjamin.donnot@rte-france.com>
Signed-off-by: DONNOT Benjamin <benjamin.donnot@rte-france.com>
Signed-off-by: DONNOT Benjamin <benjamin.donnot@rte-france.com>
Signed-off-by: DONNOT Benjamin <benjamin.donnot@rte-france.com>
Signed-off-by: Benjamin DONNOT <benjamin.donnot@gmail.com>
Signed-off-by: DONNOT Benjamin <benjamin.donnot@rte-france.com>
Documented probe scripts that pin, against PowSyBl OpenLoadFlow, the conventions the bordered VoltageControl extension must match: - SVC slope sign/units: Vm(reg) = vset - s_pu*Q (generator injection), s_pu = slope_kV/MVar * sn_mva / vn_kv(reg bus) - N>1 reactive sharing: Q_EQUAL_PROPORTION, w_i = qmax_i - qmin_i - degenerate configs that v1 rejects rather than reclassifying buses Co-Authored-By: Claude Opus 4.8 <noreply@anthropic.com> Signed-off-by: DONNOT Benjamin <benjamin.donnot@rte-france.com>
Add the composable VoltageControl extension that implements remote voltage control and SVCs with a single bordered formulation: per control group it claims N reactive-injection columns, one voltage-constraint row and N-1 reactive-sharing rows in the NRLedger, leaving every bus an ordinary PQ bus (no reclassification, no PQV type, no Q-limit outer loop). Jacobian feature entries are declared unconditionally so the KLU symbolic factorization is reused. With zero control groups the ledger / J sparsity / results are bit-identical to before. - VoltageControlData.hpp: flat solver-side struct (controllers + groups) - NRSystem.hpp: VoltageControl extension + controller_q/kind/elem_id accessors; aliases become NRSystem<Base[,MultiSlack],VoltageControl,Hvdc> - NRSystemVoltageControl.cpp: out-of-line update_state - BaseAlgo/NRAlgo/AlgorithmSelector: get_controller_q/kind/elem_id plumbing Co-Authored-By: Claude Opus 4.8 <noreply@anthropic.com> Signed-off-by: DONNOT Benjamin <benjamin.donnot@rte-france.com>
Thread remote voltage control and the new SVC element through the grid model and into the VoltageControl extension. - GeneratorContainer: regulated_bus_id_ (remote control), fillpv/set_vm/ get_vm_for_dc/init_q_vector adjusted, StateRes regulated-bus slot - SvcContainer (new): VOLTAGE (local/remote, optional slope), REACTIVE_POWER, OFF; b_min/b_max stored but never enforced - LSGrid: svcs_ member + wiring (fillSbus/compute_results/reset_results/ set_vm/state), fill_voltage_control_solver_data with v1 validation (controller on PV/slack, conflicting v_set, SVC sharing a bus), AC result write-back, SVC-aware check_solution - fix: guard el_id range in GeneratorContainer/SvcContainer::_change_bus, which the caller runs before _generic_change_bus validates the id; the previously added regulated_bus_id_ write was an out-of-bounds write (heap corruption) for out-of-range element ids - integration tests for remote gen + SVC (case14 through LSGrid) Co-Authored-By: Claude Opus 4.8 <noreply@anthropic.com> Signed-off-by: DONNOT Benjamin <benjamin.donnot@rte-france.com>
- pybind11: SvcContainer/SvcInfo/get_svcs/init_svcs, SVC topology API + pickle, GenInfo.regulated_bus_id, set_gen_regulated_bus - from_pypowsybl: thread the generator regulated bus and import SVCs (regulation mode, target_v->pu at the regulated bus, slope kV/MVar->pu, target_q negated to the generator-injection convention). Remote targets are resolved generically (busbar section, load, generator, ...) to their terminal bus, matching OpenLoadFlow. A grid with no remote control and no SVC stays byte-identical. Co-Authored-By: Claude Opus 4.8 <noreply@anthropic.com> Signed-off-by: DONNOT Benjamin <benjamin.donnot@rte-france.com>
12 reference tests validating remote generator voltage control + SVC against PowSyBl OpenLoadFlow through the pypowsybl converter to 1e-6: remote gen (single + N>1 reactive sharing), SVC local/remote voltage, slope, REACTIVE_POWER, OFF, v1 rejections, backward-compat and DC. OLF's slack is pinned by NAME to the lightsim2grid slack so the angle reference matches. Remote-SVC-with-slope is underspecified in OLF (it holds the regulated bus at exactly vset), so that case checks our own Vm(reg)=vset-s*Q law instead. Co-Authored-By: Claude Opus 4.8 <noreply@anthropic.com> Signed-off-by: DONNOT Benjamin <benjamin.donnot@rte-france.com>
Signed-off-by: DONNOT Benjamin <benjamin.donnot@rte-france.com>
Signed-off-by: DONNOT Benjamin <benjamin.donnot@rte-france.com>
Signed-off-by: DONNOT Benjamin <benjamin.donnot@rte-france.com>
Signed-off-by: DONNOT Benjamin <benjamin.donnot@rte-france.com>
improve dc computation Signed-off-by: DONNOT Benjamin <benjamin.donnot@rte-france.com>
Signed-off-by: DONNOT Benjamin <benjamin.donnot@rte-france.com>
Signed-off-by: DONNOT Benjamin <benjamin.donnot@rte-france.com>
Signed-off-by: DONNOT Benjamin <benjamin.donnot@rte-france.com>
Signed-off-by: DONNOT Benjamin <benjamin.donnot@rte-france.com>
Signed-off-by: DONNOT Benjamin <benjamin.donnot@rte-france.com>
Signed-off-by: DONNOT Benjamin <benjamin.donnot@rte-france.com>
Signed-off-by: DONNOT Benjamin <benjamin.donnot@rte-france.com>
Refacto nr 2 Signed-off-by: DONNOT Benjamin <benjamin.donnot@rte-france.com>
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