diff --git a/README.md b/README.md index ea71b1b46..2c2e459b1 100644 --- a/README.md +++ b/README.md @@ -50,7 +50,7 @@ The following SIMD instruction set extensions are supported: Architecture | Instruction set extensions -------------|----------------------------------------------------- x86 | SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2, FMA3+SSE, FMA3+AVX, FMA3+AVX2 -x86 | AVX512BW, AVX512CD, AVX512DQ, AVX512F (gcc7 and higher) +x86 | AVX512BW, AVX512CD, AVX512DQ, AVX512F, AVX512VL (gcc7 and higher) x86 AMD | FMA4 ARM | NEON, NEON64, SVE128/256/512 (fixed vector size) WebAssembly | WASM diff --git a/docs/Doxyfile b/docs/Doxyfile index 72cd9c32e..c574a8579 100644 --- a/docs/Doxyfile +++ b/docs/Doxyfile @@ -15,6 +15,7 @@ INPUT = ../include/xsimd/types/xsimd_api.hpp \ ../include/xsimd/types/xsimd_avx512cd_register.hpp \ ../include/xsimd/types/xsimd_avx512dq_register.hpp \ ../include/xsimd/types/xsimd_avx512f_register.hpp \ + ../include/xsimd/types/xsimd_avx512vl_register.hpp \ ../include/xsimd/types/xsimd_avx_register.hpp \ ../include/xsimd/types/xsimd_fma3_avx_register.hpp \ ../include/xsimd/types/xsimd_fma3_avx2_register.hpp \ diff --git a/include/xsimd/arch/xsimd_avx512vl.hpp b/include/xsimd/arch/xsimd_avx512vl.hpp new file mode 100644 index 000000000..d47b0df40 --- /dev/null +++ b/include/xsimd/arch/xsimd_avx512vl.hpp @@ -0,0 +1,19 @@ +/*************************************************************************** + * Copyright (c) Johan Mabille, Sylvain Corlay, Wolf Vollprecht and * + * Martin Renou * + * Copyright (c) QuantStack * + * Copyright (c) Serge Guelton * + * * + * Distributed under the terms of the BSD 3-Clause License. * + * * + * The full license is in the file LICENSE, distributed with this software. * + ****************************************************************************/ + +#ifndef XSIMD_AVX512VL_HPP +#define XSIMD_AVX512VL_HPP + +#include "../types/xsimd_avx512vl_register.hpp" + +// no 512-bit operation with avx512-vl, it only provides 128 et 256 bits ones. + +#endif diff --git a/include/xsimd/arch/xsimd_isa.hpp b/include/xsimd/arch/xsimd_isa.hpp index 7975988aa..6beaa5273 100644 --- a/include/xsimd/arch/xsimd_isa.hpp +++ b/include/xsimd/arch/xsimd_isa.hpp @@ -73,6 +73,10 @@ #include "./xsimd_avx512f.hpp" #endif +#if XSIMD_WITH_AVX512VL +#include "./xsimd_avx512vl.hpp" +#endif + #if XSIMD_WITH_AVX512DQ #include "./xsimd_avx512dq.hpp" #endif @@ -89,6 +93,10 @@ #include "./xsimd_avx512pf.hpp" #endif +#if XSIMD_WITH_AVX512VL +#include "./xsimd_avx512pf.hpp" +#endif + #if XSIMD_WITH_AVX512IFMA #include "./xsimd_avx512ifma.hpp" #endif diff --git a/include/xsimd/config/xsimd_arch.hpp b/include/xsimd/config/xsimd_arch.hpp index 85b7eebf1..e1f1e60fa 100644 --- a/include/xsimd/config/xsimd_arch.hpp +++ b/include/xsimd/config/xsimd_arch.hpp @@ -162,7 +162,7 @@ namespace xsimd } // namespace detail using all_x86_architectures = arch_list< - avx512vnni, avx512vbmi2, avx512vbmi, avx512ifma, avx512pf, avx512vnni, avx512bw, avx512er, avx512dq, avx512cd, avx512f, + avx512vnni, avx512vbmi2, avx512vbmi, avx512ifma, avx512pf, avx512vnni, avx512bw, avx512er, avx512dq, avx512vl, avx512cd, avx512f, avxvnni, fma3, avx2, fma3, avx, avx2_128, avx_128, fma4, fma3, sse4_2, sse4_1, /*sse4a,*/ ssse3, sse3, sse2>; diff --git a/include/xsimd/config/xsimd_config.hpp b/include/xsimd/config/xsimd_config.hpp index 58458f5bf..e3887c276 100644 --- a/include/xsimd/config/xsimd_config.hpp +++ b/include/xsimd/config/xsimd_config.hpp @@ -307,6 +307,17 @@ #define XSIMD_WITH_AVX512CD 0 #endif +/** + * @ingroup xsimd_config_macro + * + * Set to 1 if AVX512VL is available at compile-time, to 0 otherwise. + */ +#ifdef __AVX512VL__ +#define XSIMD_WITH_AVX512VL XSIMD_WITH_AVX512CD +#else +#define XSIMD_WITH_AVX512VL 0 +#endif + /** * @ingroup xsimd_config_macro * @@ -615,7 +626,7 @@ #endif -#if !XSIMD_WITH_SSE2 && !XSIMD_WITH_SSE3 && !XSIMD_WITH_SSSE3 && !XSIMD_WITH_SSE4_1 && !XSIMD_WITH_SSE4_2 && !XSIMD_WITH_AVX && !XSIMD_WITH_AVX2 && !XSIMD_WITH_AVXVNNI && !XSIMD_WITH_FMA3_SSE && !XSIMD_WITH_FMA4 && !XSIMD_WITH_FMA3_AVX && !XSIMD_WITH_FMA3_AVX2 && !XSIMD_WITH_AVX512F && !XSIMD_WITH_AVX512CD && !XSIMD_WITH_AVX512DQ && !XSIMD_WITH_AVX512BW && !XSIMD_WITH_AVX512ER && !XSIMD_WITH_AVX512PF && !XSIMD_WITH_AVX512IFMA && !XSIMD_WITH_AVX512VBMI && !XSIMD_WITH_AVX512VBMI2 && !XSIMD_WITH_NEON && !XSIMD_WITH_NEON64 && !XSIMD_WITH_SVE && !XSIMD_WITH_RVV && !XSIMD_WITH_WASM && !XSIMD_WITH_VSX && !XSIMD_WITH_EMULATED && !XSIMD_WITH_VXE +#if !XSIMD_WITH_SSE2 && !XSIMD_WITH_SSE3 && !XSIMD_WITH_SSSE3 && !XSIMD_WITH_SSE4_1 && !XSIMD_WITH_SSE4_2 && !XSIMD_WITH_AVX && !XSIMD_WITH_AVX2 && !XSIMD_WITH_AVXVNNI && !XSIMD_WITH_FMA3_SSE && !XSIMD_WITH_FMA4 && !XSIMD_WITH_FMA3_AVX && !XSIMD_WITH_FMA3_AVX2 && !XSIMD_WITH_AVX512F && !XSIMD_WITH_AVX512CD && !XSIMD_WITH_AVX512VL && !XSIMD_WITH_AVX512DQ && !XSIMD_WITH_AVX512BW && !XSIMD_WITH_AVX512ER && !XSIMD_WITH_AVX512PF && !XSIMD_WITH_AVX512IFMA && !XSIMD_WITH_AVX512VBMI && !XSIMD_WITH_AVX512VBMI2 && !XSIMD_WITH_NEON && !XSIMD_WITH_NEON64 && !XSIMD_WITH_SVE && !XSIMD_WITH_RVV && !XSIMD_WITH_WASM && !XSIMD_WITH_VSX && !XSIMD_WITH_EMULATED && !XSIMD_WITH_VXE #define XSIMD_NO_SUPPORTED_ARCHITECTURE #endif diff --git a/include/xsimd/config/xsimd_cpuid.hpp b/include/xsimd/config/xsimd_cpuid.hpp index 8c167be4a..7466cd5f8 100644 --- a/include/xsimd/config/xsimd_cpuid.hpp +++ b/include/xsimd/config/xsimd_cpuid.hpp @@ -49,6 +49,7 @@ namespace xsimd ARCH_FIELD_EX(fma3<::xsimd::avx2>, fma3_avx2) ARCH_FIELD(avx512f) ARCH_FIELD(avx512cd) + ARCH_FIELD(avx512vl) ARCH_FIELD(avx512dq) ARCH_FIELD(avx512bw) ARCH_FIELD(avx512er) @@ -121,6 +122,7 @@ namespace xsimd avx512f = cpu.avx512f(); avx512cd = cpu.avx512cd(); + avx512vl = cpu.avx512vl(); avx512dq = cpu.avx512dq(); avx512bw = cpu.avx512bw(); avx512er = cpu.avx512er(); diff --git a/include/xsimd/types/xsimd_all_registers.hpp b/include/xsimd/types/xsimd_all_registers.hpp index df7149d1c..eb058f9b7 100644 --- a/include/xsimd/types/xsimd_all_registers.hpp +++ b/include/xsimd/types/xsimd_all_registers.hpp @@ -19,6 +19,7 @@ #include "./xsimd_avx512pf_register.hpp" #include "./xsimd_avx512vbmi2_register.hpp" #include "./xsimd_avx512vbmi_register.hpp" +#include "./xsimd_avx512vl_register.hpp" #include "./xsimd_avx512vnni_avx512bw_register.hpp" #include "./xsimd_avx512vnni_avx512vbmi2_register.hpp" #include "./xsimd_avx_register.hpp" diff --git a/include/xsimd/types/xsimd_avx512vl_register.hpp b/include/xsimd/types/xsimd_avx512vl_register.hpp new file mode 100644 index 000000000..225590a6b --- /dev/null +++ b/include/xsimd/types/xsimd_avx512vl_register.hpp @@ -0,0 +1,51 @@ +/*************************************************************************** + * Copyright (c) Johan Mabille, Sylvain Corlay, Wolf Vollprecht and * + * Martin Renou * + * Copyright (c) QuantStack * + * Copyright (c) Serge Guelton * + * * + * Distributed under the terms of the BSD 3-Clause License. * + * * + * The full license is in the file LICENSE, distributed with this software. * + ****************************************************************************/ + +#ifndef XSIMD_AVX512VL_REGISTER_HPP +#define XSIMD_AVX512VL_REGISTER_HPP + +#include "./xsimd_avx512cd_register.hpp" + +namespace xsimd +{ + + /** + * @ingroup architectures + * + * AVX512DQ instructions + */ + struct avx512vl : avx512cd + { + static constexpr bool supported() noexcept { return XSIMD_WITH_AVX512VL; } + static constexpr bool available() noexcept { return true; } + static constexpr char const* name() noexcept { return "avx512vl"; } + }; + +#if XSIMD_WITH_AVX512VL + +#if !XSIMD_WITH_AVX512CD +#error "architecture inconsistency: avx512vl requires avx512cd" +#endif + + namespace types + { + template + struct get_bool_simd_register + { + using type = simd_avx512_bool_register; + }; + + XSIMD_DECLARE_SIMD_REGISTER_ALIAS(avx512vl, avx512cd); + + } +#endif +} +#endif diff --git a/test/test_cpu_features.cpp b/test/test_cpu_features.cpp index b0a7bc79f..05958a204 100644 --- a/test/test_cpu_features.cpp +++ b/test/test_cpu_features.cpp @@ -66,8 +66,9 @@ TEST_CASE("[cpu_features] x86 implication chains") CHECK_IMPLICATION(cpu.fma4(), cpu.avx()); CHECK_IMPLICATION(cpu.fma3(), cpu.avx()); - // AVX-512 iplication chain + // AVX-512 implication chain CHECK_IMPLICATION(cpu.avx512f(), cpu.avx2()); + CHECK_IMPLICATION(cpu.avx512vl(), cpu.avx512cd()); CHECK_IMPLICATION(cpu.avx512dq(), cpu.avx512f()); CHECK_IMPLICATION(cpu.avx512ifma(), cpu.avx512f()); CHECK_IMPLICATION(cpu.avx512pf(), cpu.avx512f()); @@ -132,6 +133,7 @@ TEST_CASE("[cpu_features] x86 features from environment") CHECK_ENV_FEATURE("XSIMD_TEST_CPU_ASSUME_AVX512F", cpu.avx512f()); CHECK_ENV_FEATURE("XSIMD_TEST_CPU_ASSUME_AVX512BW", cpu.avx512bw()); CHECK_ENV_FEATURE("XSIMD_TEST_CPU_ASSUME_AVX512CD", cpu.avx512cd()); + CHECK_ENV_FEATURE("XSIMD_TEST_CPU_ASSUME_AVX512VL", cpu.avx512vl()); CHECK_ENV_FEATURE("XSIMD_TEST_CPU_ASSUME_AVX512DQ", cpu.avx512dq()); CHECK_ENV_FEATURE("XSIMD_TEST_CPU_ASSUME_AVXVNNI", cpu.avxvnni()); }