parse.txt

AAA
ASCII Adjust After Addition
./AAA.html

AAD
ASCII Adjust AX Before Division
./AAD.html

AAM
ASCII Adjust AX After Multiply
./AAM.html

AAS
ASCII Adjust AL After Subtraction
./AAS.html

ADC
Add with Carry
./ADC.html

ADCX
Unsigned Integer Addition of Two Operands with Carry Flag
./ADCX.html

ADD
Add
./ADD.html

ADDPD
Add Packed Double-Precision Floating-Point Values
./ADDPD.html

ADDPS
Add Packed Single-Precision Floating-Point Values
./ADDPS.html

ADDSD
Add Scalar Double-Precision Floating-Point Values
./ADDSD.html

ADDSS
Add Scalar Single-Precision Floating-Point Values
./ADDSS.html

ADDSUBPD
Packed Double-FP Add/Subtract
./ADDSUBPD.html

ADDSUBPS
Packed Single-FP Add/Subtract
./ADDSUBPS.html

ADOX
Unsigned Integer Addition of Two Operands with Overflow Flag
./ADOX.html

AESDEC
Perform One Round of an AES Decryption Flow
./AESDEC.html

AESDECLAST
Perform Last Round of an AES Decryption Flow
./AESDECLAST.html

AESENC
Perform One Round of an AES Encryption Flow
./AESENC.html

AESENCLAST
Perform Last Round of an AES Encryption Flow
./AESENCLAST.html

AESIMC
Perform the AES InvMixColumn Transformation
./AESIMC.html

AESKEYGENASSIST
AES Round Key Generation Assist
./AESKEYGENASSIST.html

AND
Logical AND
./AND.html

ANDN
Logical AND NOT
./ANDN.html

ANDNPD
Bitwise Logical AND NOT of Packed Double Precision Floating-Point Values
./ANDNPD.html

ANDNPS
Bitwise Logical AND NOT of Packed Single Precision Floating-Point Values
./ANDNPS.html

ANDPD
Bitwise Logical AND of Packed Double Precision Floating-Point Values
./ANDPD.html

ANDPS
Bitwise Logical AND of Packed Single Precision Floating-Point Values
./ANDPS.html

ARPL
Adjust RPL Field of Segment Selector
./ARPL.html

BEXTR
Bit Field Extract
./BEXTR.html

BLENDPD
Blend Packed Double Precision Floating-Point Values
./BLENDPD.html

BLENDPS
Blend Packed Single Precision Floating-Point Values
./BLENDPS.html

BLENDVPD
Variable Blend Packed Double Precision Floating-Point Values
./BLENDVPD.html

BLENDVPS
Variable Blend Packed Single Precision Floating-Point Values
./BLENDVPS.html

BLSI
Extract Lowest Set Isolated Bit
./BLSI.html

BLSMSK
Get Mask Up to Lowest Set Bit
./BLSMSK.html

BLSR
Reset Lowest Set Bit
./BLSR.html

BNDCL
Check Lower Bound
./BNDCL.html

BNDCN
Check Upper Bound
./BNDCU:BNDCN.html

BNDCU
Check Upper Bound
./BNDCU:BNDCN.html

BNDLDX
Load Extended Bounds Using Address Translation
./BNDLDX.html

BNDMK
Make Bounds
./BNDMK.html

BNDMOV
Move Bounds
./BNDMOV.html

BNDSTX
Store Extended Bounds Using Address Translation
./BNDSTX.html

BOUND
Check Array Index Against Bounds
./BOUND.html

BSF
Bit Scan Forward
./BSF.html

BSR
Bit Scan Reverse
./BSR.html

BSWAP
Byte Swap
./BSWAP.html

BT
Bit Test
./BT.html

BTC
Bit Test and Complement
./BTC.html

BTR
Bit Test and Reset
./BTR.html

BTS
Bit Test and Set
./BTS.html

BZHI
Zero High Bits Starting with Specified Bit Position
./BZHI.html

CALL
Call Procedure
./CALL.html

CBW
Convert Byte to Word/Convert Word to Doubleword/Convert Doubleword to Quadword
./CBW:CWDE:CDQE.html

CDQ
Convert Word to Doubleword/Convert Doubleword to Quadword
./CWD:CDQ:CQO.html

CDQE
Convert Byte to Word/Convert Word to Doubleword/Convert Doubleword to Quadword
./CBW:CWDE:CDQE.html

CLAC
Clear AC Flag in EFLAGS Register
./CLAC.html

CLC
Clear Carry Flag
./CLC.html

CLD
Clear Direction Flag
./CLD.html

CLFLUSH
Flush Cache Line
./CLFLUSH.html

CLFLUSHOPT
Flush Cache Line Optimized
./CLFLUSHOPT.html

CLI
Clear Interrupt Flag
./CLI.html

CLTS
Clear Task-Switched Flag in CR0
./CLTS.html

CLWB
Cache Line Write Back
./CLWB.html

CMC
Complement Carry Flag
./CMC.html

CMOVcc
Conditional Move
./CMOVcc.html

CMP
Compare Two Operands
./CMP.html

CMPPD
Compare Packed Double-Precision Floating-Point Values
./CMPPD.html

CMPPS
Compare Packed Single-Precision Floating-Point Values
./CMPPS.html

CMPS
Compare String Operands
./CMPS:CMPSB:CMPSW:CMPSD:CMPSQ.html

CMPSB
Compare String Operands
./CMPS:CMPSB:CMPSW:CMPSD:CMPSQ.html

CMPSD
Compare String Operands
./CMPS:CMPSB:CMPSW:CMPSD:CMPSQ.html

CMPSD (1)
Compare Scalar Double-Precision Floating-Point Value
./CMPSD.html

CMPSQ
Compare String Operands
./CMPS:CMPSB:CMPSW:CMPSD:CMPSQ.html

CMPSS
Compare Scalar Single-Precision Floating-Point Value
./CMPSS.html

CMPSW
Compare String Operands
./CMPS:CMPSB:CMPSW:CMPSD:CMPSQ.html

CMPXCHG
Compare and Exchange
./CMPXCHG.html

CMPXCHG16B
Compare and Exchange Bytes
./CMPXCHG8B:CMPXCHG16B.html

CMPXCHG8B
Compare and Exchange Bytes
./CMPXCHG8B:CMPXCHG16B.html

COMISD
Compare Scalar Ordered Double-Precision Floating-Point Values and Set EFLAGS
./COMISD.html

COMISS
Compare Scalar Ordered Single-Precision Floating-Point Values and Set EFLAGS
./COMISS.html

CPUID
CPU Identification
./CPUID.html

CQO
Convert Word to Doubleword/Convert Doubleword to Quadword
./CWD:CDQ:CQO.html

CRC32
Accumulate CRC32 Value
./CRC32.html

CVTDQ2PD
Convert Packed Doubleword Integers to Packed Double-Precision Floating-Point Values
./CVTDQ2PD.html

CVTDQ2PS
Convert Packed Doubleword Integers to Packed Single-Precision Floating-Point Values
./CVTDQ2PS.html

CVTPD2DQ
Convert Packed Double-Precision Floating-Point Values to Packed Doubleword Integers
./CVTPD2DQ.html

CVTPD2PI
Convert Packed Double-Precision FP Values to Packed Dword Integers
./CVTPD2PI.html

CVTPD2PS
Convert Packed Double-Precision Floating-Point Values to Packed Single-Precision Floating-Point Values
./CVTPD2PS.html

CVTPI2PD
Convert Packed Dword Integers to Packed Double-Precision FP Values
./CVTPI2PD.html

CVTPI2PS
Convert Packed Dword Integers to Packed Single-Precision FP Values
./CVTPI2PS.html

CVTPS2DQ
Convert Packed Single-Precision Floating-Point Values to Packed Signed Doubleword Integer Values
./CVTPS2DQ.html

CVTPS2PD
Convert Packed Single-Precision Floating-Point Values to Packed Double-Precision Floating-Point Values
./CVTPS2PD.html

CVTPS2PI
Convert Packed Single-Precision FP Values to Packed Dword Integers
./CVTPS2PI.html

CVTSD2SI
Convert Scalar Double-Precision Floating-Point Value to Doubleword Integer
./CVTSD2SI.html

CVTSD2SS
Convert Scalar Double-Precision Floating-Point Value to Scalar Single-Precision Floating-Point Value
./CVTSD2SS.html

CVTSI2SD
Convert Doubleword Integer to Scalar Double-Precision Floating-Point Value
./CVTSI2SD.html

CVTSI2SS
Convert Doubleword Integer to Scalar Single-Precision Floating-Point Value
./CVTSI2SS.html

CVTSS2SD
Convert Scalar Single-Precision Floating-Point Value to Scalar Double-Precision Floating-Point Value
./CVTSS2SD.html

CVTSS2SI
Convert Scalar Single-Precision Floating-Point Value to Doubleword Integer
./CVTSS2SI.html

CVTTPD2DQ
Convert with Truncation Packed Double-Precision Floating-Point Values to Packed Doubleword Integers
./CVTTPD2DQ.html

CVTTPD2PI
Convert with Truncation Packed Double-Precision FP Values to Packed Dword Integers
./CVTTPD2PI.html

CVTTPS2DQ
Convert with Truncation Packed Single-Precision Floating-Point Values to Packed Signed Doubleword Integer Values
./CVTTPS2DQ.html

CVTTPS2PI
Convert with Truncation Packed Single-Precision FP Values to Packed Dword Integers
./CVTTPS2PI.html

CVTTSD2SI
Convert with Truncation Scalar Double-Precision Floating-Point Value to Signed Integer
./CVTTSD2SI.html

CVTTSS2SI
Convert with Truncation Scalar Single-Precision Floating-Point Value to Integer
./CVTTSS2SI.html

CWD
Convert Word to Doubleword/Convert Doubleword to Quadword
./CWD:CDQ:CQO.html

CWDE
Convert Byte to Word/Convert Word to Doubleword/Convert Doubleword to Quadword
./CBW:CWDE:CDQE.html

DAA
Decimal Adjust AL after Addition
./DAA.html

DAS
Decimal Adjust AL after Subtraction
./DAS.html

DEC
Decrement by 1
./DEC.html

DIV
Unsigned Divide
./DIV.html

DIVPD
Divide Packed Double-Precision Floating-Point Values
./DIVPD.html

DIVPS
Divide Packed Single-Precision Floating-Point Values
./DIVPS.html

DIVSD
Divide Scalar Double-Precision Floating-Point Value
./DIVSD.html

DIVSS
Divide Scalar Single-Precision Floating-Point Values
./DIVSS.html

DPPD
Dot Product of Packed Double Precision Floating-Point Values
./DPPD.html

DPPS
Dot Product of Packed Single Precision Floating-Point Values
./DPPS.html

EMMS
Empty MMX Technology State
./EMMS.html

ENTER
Make Stack Frame for Procedure Parameters
./ENTER.html

EXTRACTPS
Extract Packed Floating-Point Values
./EXTRACTPS.html

F2XM1
Compute 2x–1
./F2XM1.html

FABS
Absolute Value
./FABS.html

FADD
Add
./FADD:FADDP:FIADD.html

FADDP
Add
./FADD:FADDP:FIADD.html

FBLD
Load Binary Coded Decimal
./FBLD.html

FBSTP
Store BCD Integer and Pop
./FBSTP.html

FCHS
Change Sign
./FCHS.html

FCLEX
Clear Exceptions
./FCLEX:FNCLEX.html

FCMOVcc
Floating-Point Conditional Move
./FCMOVcc.html

FCOM
Compare Floating Point Values
./FCOM:FCOMP:FCOMPP.html

FCOMI
Compare Floating Point Values and Set EFLAGS
./FCOMI:FCOMIP:FUCOMI:FUCOMIP.html

FCOMIP
Compare Floating Point Values and Set EFLAGS
./FCOMI:FCOMIP:FUCOMI:FUCOMIP.html

FCOMP
Compare Floating Point Values
./FCOM:FCOMP:FCOMPP.html

FCOMPP
Compare Floating Point Values
./FCOM:FCOMP:FCOMPP.html

FCOS
Cosine
./FCOS.html

FDECSTP
Decrement Stack-Top Pointer
./FDECSTP.html

FDIV
Divide
./FDIV:FDIVP:FIDIV.html

FDIVP
Divide
./FDIV:FDIVP:FIDIV.html

FDIVR
Reverse Divide
./FDIVR:FDIVRP:FIDIVR.html

FDIVRP
Reverse Divide
./FDIVR:FDIVRP:FIDIVR.html

FFREE
Free Floating-Point Register
./FFREE.html

FIADD
Add
./FADD:FADDP:FIADD.html

FICOM
Compare Integer
./FICOM:FICOMP.html

FICOMP
Compare Integer
./FICOM:FICOMP.html

FIDIV
Divide
./FDIV:FDIVP:FIDIV.html

FIDIVR
Reverse Divide
./FDIVR:FDIVRP:FIDIVR.html

FILD
Load Integer
./FILD.html

FIMUL
Multiply
./FMUL:FMULP:FIMUL.html

FINCSTP
Increment Stack-Top Pointer
./FINCSTP.html

FINIT
Initialize Floating-Point Unit
./FINIT:FNINIT.html

FIST
Store Integer
./FIST:FISTP.html

FISTP
Store Integer
./FIST:FISTP.html

FISTTP
Store Integer with Truncation
./FISTTP.html

FISUB
Subtract
./FSUB:FSUBP:FISUB.html

FISUBR
Reverse Subtract
./FSUBR:FSUBRP:FISUBR.html

FLD
Load Floating Point Value
./FLD.html

FLD1
Load Constant
./FLD1:FLDL2T:FLDL2E:FLDPI:FLDLG2:FLDLN2:FLDZ.html

FLDCW
Load x87 FPU Control Word
./FLDCW.html

FLDENV
Load x87 FPU Environment
./FLDENV.html

FLDL2E
Load Constant
./FLD1:FLDL2T:FLDL2E:FLDPI:FLDLG2:FLDLN2:FLDZ.html

FLDL2T
Load Constant
./FLD1:FLDL2T:FLDL2E:FLDPI:FLDLG2:FLDLN2:FLDZ.html

FLDLG2
Load Constant
./FLD1:FLDL2T:FLDL2E:FLDPI:FLDLG2:FLDLN2:FLDZ.html

FLDLN2
Load Constant
./FLD1:FLDL2T:FLDL2E:FLDPI:FLDLG2:FLDLN2:FLDZ.html

FLDPI
Load Constant
./FLD1:FLDL2T:FLDL2E:FLDPI:FLDLG2:FLDLN2:FLDZ.html

FLDZ
Load Constant
./FLD1:FLDL2T:FLDL2E:FLDPI:FLDLG2:FLDLN2:FLDZ.html

FMUL
Multiply
./FMUL:FMULP:FIMUL.html

FMULP
Multiply
./FMUL:FMULP:FIMUL.html

FNCLEX
Clear Exceptions
./FCLEX:FNCLEX.html

FNINIT
Initialize Floating-Point Unit
./FINIT:FNINIT.html

FNOP
No Operation
./FNOP.html

FNSAVE
Store x87 FPU State
./FSAVE:FNSAVE.html

FNSTCW
Store x87 FPU Control Word
./FSTCW:FNSTCW.html

FNSTENV
Store x87 FPU Environment
./FSTENV:FNSTENV.html

FNSTSW
Store x87 FPU Status Word
./FSTSW:FNSTSW.html

FPATAN
Partial Arctangent
./FPATAN.html

FPREM
Partial Remainder
./FPREM.html

FPREM1
Partial Remainder
./FPREM1.html

FPTAN
Partial Tangent
./FPTAN.html

FRNDINT
Round to Integer
./FRNDINT.html

FRSTOR
Restore x87 FPU State
./FRSTOR.html

FSAVE
Store x87 FPU State
./FSAVE:FNSAVE.html

FSCALE
Scale
./FSCALE.html

FSIN
Sine
./FSIN.html

FSINCOS
Sine and Cosine
./FSINCOS.html

FSQRT
Square Root
./FSQRT.html

FST
Store Floating Point Value
./FST:FSTP.html

FSTCW
Store x87 FPU Control Word
./FSTCW:FNSTCW.html

FSTENV
Store x87 FPU Environment
./FSTENV:FNSTENV.html

FSTP
Store Floating Point Value
./FST:FSTP.html

FSTSW
Store x87 FPU Status Word
./FSTSW:FNSTSW.html

FSUB
Subtract
./FSUB:FSUBP:FISUB.html

FSUBP
Subtract
./FSUB:FSUBP:FISUB.html

FSUBR
Reverse Subtract
./FSUBR:FSUBRP:FISUBR.html

FSUBRP
Reverse Subtract
./FSUBR:FSUBRP:FISUBR.html

FTST
TEST
./FTST.html

FUCOM
Unordered Compare Floating Point Values
./FUCOM:FUCOMP:FUCOMPP.html

FUCOMI
Compare Floating Point Values and Set EFLAGS
./FCOMI:FCOMIP:FUCOMI:FUCOMIP.html

FUCOMIP
Compare Floating Point Values and Set EFLAGS
./FCOMI:FCOMIP:FUCOMI:FUCOMIP.html

FUCOMP
Unordered Compare Floating Point Values
./FUCOM:FUCOMP:FUCOMPP.html

FUCOMPP
Unordered Compare Floating Point Values
./FUCOM:FUCOMP:FUCOMPP.html

FWAIT
Wait
./WAIT:FWAIT.html

FXAM
Examine Floating-Point
./FXAM.html

FXCH
Exchange Register Contents
./FXCH.html

FXRSTOR
Restore x87 FPU, MMX, XMM, and MXCSR State
./FXRSTOR.html

FXSAVE
Save x87 FPU, MMX Technology, and SSE State
./FXSAVE.html

FXTRACT
Extract Exponent and Significand
./FXTRACT.html

FYL2X
Compute y * log2x
./FYL2X.html

FYL2XP1
Compute y * log2(x +1)
./FYL2XP1.html

HADDPD
Packed Double-FP Horizontal Add
./HADDPD.html

HADDPS
Packed Single-FP Horizontal Add
./HADDPS.html

HLT
Halt
./HLT.html

HSUBPD
Packed Double-FP Horizontal Subtract
./HSUBPD.html

HSUBPS
Packed Single-FP Horizontal Subtract
./HSUBPS.html

IDIV
Signed Divide
./IDIV.html

IMUL
Signed Multiply
./IMUL.html

IN
Input from Port
./IN.html

INC
Increment by 1
./INC.html

INS
Input from Port to String
./INS:INSB:INSW:INSD.html

INSB
Input from Port to String
./INS:INSB:INSW:INSD.html

INSD
Input from Port to String
./INS:INSB:INSW:INSD.html

INSERTPS
Insert Scalar Single-Precision Floating-Point Value
./INSERTPS.html

INSW
Input from Port to String
./INS:INSB:INSW:INSD.html

INT n
Call to Interrupt Procedure
./INTn:INTO:INT3:INT1.html

INT1
Call to Interrupt Procedure
./INTn:INTO:INT3:INT1.html

INT3
Call to Interrupt Procedure
./INTn:INTO:INT3:INT1.html

INTO
Call to Interrupt Procedure
./INTn:INTO:INT3:INT1.html

INVD
Invalidate Internal Caches
./INVD.html

INVLPG
Invalidate TLB Entries
./INVLPG.html

INVPCID
Invalidate Process-Context Identifier
./INVPCID.html

IRET
Interrupt Return
./IRET:IRETD.html

IRETD
Interrupt Return
./IRET:IRETD.html

JMP
Jump
./JMP.html

Jcc
Jump if Condition Is Met
./Jcc.html

KADDB
ADD Two Masks
./KADDW:KADDB:KADDQ:KADDD.html

KADDD
ADD Two Masks
./KADDW:KADDB:KADDQ:KADDD.html

KADDQ
ADD Two Masks
./KADDW:KADDB:KADDQ:KADDD.html

KADDW
ADD Two Masks
./KADDW:KADDB:KADDQ:KADDD.html

KANDB
Bitwise Logical AND Masks
./KANDW:KANDB:KANDQ:KANDD.html

KANDD
Bitwise Logical AND Masks
./KANDW:KANDB:KANDQ:KANDD.html

KANDNB
Bitwise Logical AND NOT Masks
./KANDNW:KANDNB:KANDNQ:KANDND.html

KANDND
Bitwise Logical AND NOT Masks
./KANDNW:KANDNB:KANDNQ:KANDND.html

KANDNQ
Bitwise Logical AND NOT Masks
./KANDNW:KANDNB:KANDNQ:KANDND.html

KANDNW
Bitwise Logical AND NOT Masks
./KANDNW:KANDNB:KANDNQ:KANDND.html

KANDQ
Bitwise Logical AND Masks
./KANDW:KANDB:KANDQ:KANDD.html

KANDW
Bitwise Logical AND Masks
./KANDW:KANDB:KANDQ:KANDD.html

KMOVB
Move from and to Mask Registers
./KMOVW:KMOVB:KMOVQ:KMOVD.html

KMOVD
Move from and to Mask Registers
./KMOVW:KMOVB:KMOVQ:KMOVD.html

KMOVQ
Move from and to Mask Registers
./KMOVW:KMOVB:KMOVQ:KMOVD.html

KMOVW
Move from and to Mask Registers
./KMOVW:KMOVB:KMOVQ:KMOVD.html

KNOTB
NOT Mask Register
./KNOTW:KNOTB:KNOTQ:KNOTD.html

KNOTD
NOT Mask Register
./KNOTW:KNOTB:KNOTQ:KNOTD.html

KNOTQ
NOT Mask Register
./KNOTW:KNOTB:KNOTQ:KNOTD.html

KNOTW
NOT Mask Register
./KNOTW:KNOTB:KNOTQ:KNOTD.html

KORB
Bitwise Logical OR Masks
./KORW:KORB:KORQ:KORD.html

KORD
Bitwise Logical OR Masks
./KORW:KORB:KORQ:KORD.html

KORQ
Bitwise Logical OR Masks
./KORW:KORB:KORQ:KORD.html

KORTESTB
OR Masks And Set Flags
./KORTESTW:KORTESTB:KORTESTQ:KORTESTD.html

KORTESTD
OR Masks And Set Flags
./KORTESTW:KORTESTB:KORTESTQ:KORTESTD.html

KORTESTQ
OR Masks And Set Flags
./KORTESTW:KORTESTB:KORTESTQ:KORTESTD.html

KORTESTW
OR Masks And Set Flags
./KORTESTW:KORTESTB:KORTESTQ:KORTESTD.html

KORW
Bitwise Logical OR Masks
./KORW:KORB:KORQ:KORD.html

KSHIFTLB
Shift Left Mask Registers
./KSHIFTLW:KSHIFTLB:KSHIFTLQ:KSHIFTLD.html

KSHIFTLD
Shift Left Mask Registers
./KSHIFTLW:KSHIFTLB:KSHIFTLQ:KSHIFTLD.html

KSHIFTLQ
Shift Left Mask Registers
./KSHIFTLW:KSHIFTLB:KSHIFTLQ:KSHIFTLD.html

KSHIFTLW
Shift Left Mask Registers
./KSHIFTLW:KSHIFTLB:KSHIFTLQ:KSHIFTLD.html

KSHIFTRB
Shift Right Mask Registers
./KSHIFTRW:KSHIFTRB:KSHIFTRQ:KSHIFTRD.html

KSHIFTRD
Shift Right Mask Registers
./KSHIFTRW:KSHIFTRB:KSHIFTRQ:KSHIFTRD.html

KSHIFTRQ
Shift Right Mask Registers
./KSHIFTRW:KSHIFTRB:KSHIFTRQ:KSHIFTRD.html

KSHIFTRW
Shift Right Mask Registers
./KSHIFTRW:KSHIFTRB:KSHIFTRQ:KSHIFTRD.html

KTESTB
Packed Bit Test Masks and Set Flags
./KTESTW:KTESTB:KTESTQ:KTESTD.html

KTESTD
Packed Bit Test Masks and Set Flags
./KTESTW:KTESTB:KTESTQ:KTESTD.html

KTESTQ
Packed Bit Test Masks and Set Flags
./KTESTW:KTESTB:KTESTQ:KTESTD.html

KTESTW
Packed Bit Test Masks and Set Flags
./KTESTW:KTESTB:KTESTQ:KTESTD.html

KUNPCKBW
Unpack for Mask Registers
./KUNPCKBW:KUNPCKWD:KUNPCKDQ.html

KUNPCKDQ
Unpack for Mask Registers
./KUNPCKBW:KUNPCKWD:KUNPCKDQ.html

KUNPCKWD
Unpack for Mask Registers
./KUNPCKBW:KUNPCKWD:KUNPCKDQ.html

KXNORB
Bitwise Logical XNOR Masks
./KXNORW:KXNORB:KXNORQ:KXNORD.html

KXNORD
Bitwise Logical XNOR Masks
./KXNORW:KXNORB:KXNORQ:KXNORD.html

KXNORQ
Bitwise Logical XNOR Masks
./KXNORW:KXNORB:KXNORQ:KXNORD.html

KXNORW
Bitwise Logical XNOR Masks
./KXNORW:KXNORB:KXNORQ:KXNORD.html

KXORB
Bitwise Logical XOR Masks
./KXORW:KXORB:KXORQ:KXORD.html

KXORD
Bitwise Logical XOR Masks
./KXORW:KXORB:KXORQ:KXORD.html

KXORQ
Bitwise Logical XOR Masks
./KXORW:KXORB:KXORQ:KXORD.html

KXORW
Bitwise Logical XOR Masks
./KXORW:KXORB:KXORQ:KXORD.html

LAHF
Load Status Flags into AH Register
./LAHF.html

LAR
Load Access Rights Byte
./LAR.html

LDDQU
Load Unaligned Integer 128 Bits
./LDDQU.html

LDMXCSR
Load MXCSR Register
./LDMXCSR.html

LDS
Load Far Pointer
./LDS:LES:LFS:LGS:LSS.html

LEA
Load Effective Address
./LEA.html

LEAVE
High Level Procedure Exit
./LEAVE.html

LES
Load Far Pointer
./LDS:LES:LFS:LGS:LSS.html

LFENCE
Load Fence
./LFENCE.html

LFS
Load Far Pointer
./LDS:LES:LFS:LGS:LSS.html

LGDT
Load Global/Interrupt Descriptor Table Register
./LGDT:LIDT.html

LGS
Load Far Pointer
./LDS:LES:LFS:LGS:LSS.html

LIDT
Load Global/Interrupt Descriptor Table Register
./LGDT:LIDT.html

LLDT
Load Local Descriptor Table Register
./LLDT.html

LMSW
Load Machine Status Word
./LMSW.html

LOCK
Assert LOCK# Signal Prefix
./LOCK.html

LODS
Load String
./LODS:LODSB:LODSW:LODSD:LODSQ.html

LODSB
Load String
./LODS:LODSB:LODSW:LODSD:LODSQ.html

LODSD
Load String
./LODS:LODSB:LODSW:LODSD:LODSQ.html

LODSQ
Load String
./LODS:LODSB:LODSW:LODSD:LODSQ.html

LODSW
Load String
./LODS:LODSB:LODSW:LODSD:LODSQ.html

LOOP
Loop According to ECX Counter
./LOOP:LOOPcc.html

LOOPcc
Loop According to ECX Counter
./LOOP:LOOPcc.html

LSL
Load Segment Limit
./LSL.html

LSS
Load Far Pointer
./LDS:LES:LFS:LGS:LSS.html

LTR
Load Task Register
./LTR.html

LZCNT
Count the Number of Leading Zero Bits
./LZCNT.html

MASKMOVDQU
Store Selected Bytes of Double Quadword
./MASKMOVDQU.html

MASKMOVQ
Store Selected Bytes of Quadword
./MASKMOVQ.html

MAXPD
Maximum of Packed Double-Precision Floating-Point Values
./MAXPD.html

MAXPS
Maximum of Packed Single-Precision Floating-Point Values
./MAXPS.html

MAXSD
Return Maximum Scalar Double-Precision Floating-Point Value
./MAXSD.html

MAXSS
Return Maximum Scalar Single-Precision Floating-Point Value
./MAXSS.html

MFENCE
Memory Fence
./MFENCE.html

MINPD
Minimum of Packed Double-Precision Floating-Point Values
./MINPD.html

MINPS
Minimum of Packed Single-Precision Floating-Point Values
./MINPS.html

MINSD
Return Minimum Scalar Double-Precision Floating-Point Value
./MINSD.html

MINSS
Return Minimum Scalar Single-Precision Floating-Point Value
./MINSS.html

MONITOR
Set Up Monitor Address
./MONITOR.html

MOV
Move
./MOV.html

MOV (1)
Move to/from Control Registers
./MOV-1.html

MOV (2)
Move to/from Debug Registers
./MOV-2.html

MOVAPD
Move Aligned Packed Double-Precision Floating-Point Values
./MOVAPD.html

MOVAPS
Move Aligned Packed Single-Precision Floating-Point Values
./MOVAPS.html

MOVBE
Move Data After Swapping Bytes
./MOVBE.html

MOVD
Move Doubleword/Move Quadword
./MOVD:MOVQ.html

MOVDDUP
Replicate Double FP Values
./MOVDDUP.html

MOVDQ2Q
Move Quadword from XMM to MMX Technology Register
./MOVDQ2Q.html

MOVDQA
Move Aligned Packed Integer Values
./MOVDQA:VMOVDQA32:VMOVDQA64.html

MOVDQU
Move Unaligned Packed Integer Values
./MOVDQU:VMOVDQU8:VMOVDQU16:VMOVDQU32:VMOVDQU64.html

MOVHLPS
Move Packed Single-Precision Floating-Point Values High to Low
./MOVHLPS.html

MOVHPD
Move High Packed Double-Precision Floating-Point Value
./MOVHPD.html

MOVHPS
Move High Packed Single-Precision Floating-Point Values
./MOVHPS.html

MOVLHPS
Move Packed Single-Precision Floating-Point Values Low to High
./MOVLHPS.html

MOVLPD
Move Low Packed Double-Precision Floating-Point Value
./MOVLPD.html

MOVLPS
Move Low Packed Single-Precision Floating-Point Values
./MOVLPS.html

MOVMSKPD
Extract Packed Double-Precision Floating-Point Sign Mask
./MOVMSKPD.html

MOVMSKPS
Extract Packed Single-Precision Floating-Point Sign Mask
./MOVMSKPS.html

MOVNTDQ
Store Packed Integers Using Non-Temporal Hint
./MOVNTDQ.html

MOVNTDQA
Load Double Quadword Non-Temporal Aligned Hint
./MOVNTDQA.html

MOVNTI
Store Doubleword Using Non-Temporal Hint
./MOVNTI.html

MOVNTPD
Store Packed Double-Precision Floating-Point Values Using Non-Temporal Hint
./MOVNTPD.html

MOVNTPS
Store Packed Single-Precision Floating-Point Values Using Non-Temporal Hint
./MOVNTPS.html

MOVNTQ
Store of Quadword Using Non-Temporal Hint
./MOVNTQ.html

MOVQ
Move Doubleword/Move Quadword
./MOVD:MOVQ.html

MOVQ (1)
Move Quadword
./MOVQ.html

MOVQ2DQ
Move Quadword from MMX Technology to XMM Register
./MOVQ2DQ.html

MOVS
Move Data from String to String
./MOVS:MOVSB:MOVSW:MOVSD:MOVSQ.html

MOVSB
Move Data from String to String
./MOVS:MOVSB:MOVSW:MOVSD:MOVSQ.html

MOVSD
Move Data from String to String
./MOVS:MOVSB:MOVSW:MOVSD:MOVSQ.html

MOVSD (1)
Move or Merge Scalar Double-Precision Floating-Point Value
./MOVSD.html

MOVSHDUP
Replicate Single FP Values
./MOVSHDUP.html

MOVSLDUP
Replicate Single FP Values
./MOVSLDUP.html

MOVSQ
Move Data from String to String
./MOVS:MOVSB:MOVSW:MOVSD:MOVSQ.html

MOVSS
Move or Merge Scalar Single-Precision Floating-Point Value
./MOVSS.html

MOVSW
Move Data from String to String
./MOVS:MOVSB:MOVSW:MOVSD:MOVSQ.html

MOVSX
Move with Sign-Extension
./MOVSX:MOVSXD.html

MOVSXD
Move with Sign-Extension
./MOVSX:MOVSXD.html

MOVUPD
Move Unaligned Packed Double-Precision Floating-Point Values
./MOVUPD.html

MOVUPS
Move Unaligned Packed Single-Precision Floating-Point Values
./MOVUPS.html

MOVZX
Move with Zero-Extend
./MOVZX.html

MPSADBW
Compute Multiple Packed Sums of Absolute Difference
./MPSADBW.html

MUL
Unsigned Multiply
./MUL.html

MULPD
Multiply Packed Double-Precision Floating-Point Values
./MULPD.html

MULPS
Multiply Packed Single-Precision Floating-Point Values
./MULPS.html

MULSD
Multiply Scalar Double-Precision Floating-Point Value
./MULSD.html

MULSS
Multiply Scalar Single-Precision Floating-Point Values
./MULSS.html

MULX
Unsigned Multiply Without Affecting Flags
./MULX.html

MWAIT
Monitor Wait
./MWAIT.html

NEG
Two's Complement Negation
./NEG.html

NOP
No Operation
./NOP.html

NOT
One's Complement Negation
./NOT.html

OR
Logical Inclusive OR
./OR.html

ORPD
Bitwise Logical OR of Packed Double Precision Floating-Point Values
./ORPD.html

ORPS
Bitwise Logical OR of Packed Single Precision Floating-Point Values
./ORPS.html

OUT
Output to Port
./OUT.html

OUTS
Output String to Port
./OUTS:OUTSB:OUTSW:OUTSD.html

OUTSB
Output String to Port
./OUTS:OUTSB:OUTSW:OUTSD.html

OUTSD
Output String to Port
./OUTS:OUTSB:OUTSW:OUTSD.html

OUTSW
Output String to Port
./OUTS:OUTSB:OUTSW:OUTSD.html

PABSB
Packed Absolute Value
./PABSB:PABSW:PABSD:PABSQ.html

PABSD
Packed Absolute Value
./PABSB:PABSW:PABSD:PABSQ.html

PABSQ
Packed Absolute Value
./PABSB:PABSW:PABSD:PABSQ.html

PABSW
Packed Absolute Value
./PABSB:PABSW:PABSD:PABSQ.html

PACKSSDW
Pack with Signed Saturation
./PACKSSWB:PACKSSDW.html

PACKSSWB
Pack with Signed Saturation
./PACKSSWB:PACKSSDW.html

PACKUSDW
Pack with Unsigned Saturation
./PACKUSDW.html

PACKUSWB
Pack with Unsigned Saturation
./PACKUSWB.html

PADDB
Add Packed Integers
./PADDB:PADDW:PADDD:PADDQ.html

PADDD
Add Packed Integers
./PADDB:PADDW:PADDD:PADDQ.html

PADDQ
Add Packed Integers
./PADDB:PADDW:PADDD:PADDQ.html

PADDSB
Add Packed Signed Integers with Signed Saturation
./PADDSB:PADDSW.html

PADDSW
Add Packed Signed Integers with Signed Saturation
./PADDSB:PADDSW.html

PADDUSB
Add Packed Unsigned Integers with Unsigned Saturation
./PADDUSB:PADDUSW.html

PADDUSW
Add Packed Unsigned Integers with Unsigned Saturation
./PADDUSB:PADDUSW.html

PADDW
Add Packed Integers
./PADDB:PADDW:PADDD:PADDQ.html

PALIGNR
Packed Align Right
./PALIGNR.html

PAND
Logical AND
./PAND.html

PANDN
Logical AND NOT
./PANDN.html

PAUSE
Spin Loop Hint
./PAUSE.html

PAVGB
Average Packed Integers
./PAVGB:PAVGW.html

PAVGW
Average Packed Integers
./PAVGB:PAVGW.html

PBLENDVB
Variable Blend Packed Bytes
./PBLENDVB.html

PBLENDW
Blend Packed Words
./PBLENDW.html

PCLMULQDQ
Carry-Less Multiplication Quadword
./PCLMULQDQ.html

PCMPEQB
Compare Packed Data for Equal
./PCMPEQB:PCMPEQW:PCMPEQD.html

PCMPEQD
Compare Packed Data for Equal
./PCMPEQB:PCMPEQW:PCMPEQD.html

PCMPEQQ
Compare Packed Qword Data for Equal
./PCMPEQQ.html

PCMPEQW
Compare Packed Data for Equal
./PCMPEQB:PCMPEQW:PCMPEQD.html

PCMPESTRI
Packed Compare Explicit Length Strings, Return Index
./PCMPESTRI.html

PCMPESTRM
Packed Compare Explicit Length Strings, Return Mask
./PCMPESTRM.html

PCMPGTB
Compare Packed Signed Integers for Greater Than
./PCMPGTB:PCMPGTW:PCMPGTD.html

PCMPGTD
Compare Packed Signed Integers for Greater Than
./PCMPGTB:PCMPGTW:PCMPGTD.html

PCMPGTQ
Compare Packed Data for Greater Than
./PCMPGTQ.html

PCMPGTW
Compare Packed Signed Integers for Greater Than
./PCMPGTB:PCMPGTW:PCMPGTD.html

PCMPISTRI
Packed Compare Implicit Length Strings, Return Index
./PCMPISTRI.html

PCMPISTRM
Packed Compare Implicit Length Strings, Return Mask
./PCMPISTRM.html

PDEP
Parallel Bits Deposit
./PDEP.html

PEXT
Parallel Bits Extract
./PEXT.html

PEXTRB
Extract Byte/Dword/Qword
./PEXTRB:PEXTRD:PEXTRQ.html

PEXTRD
Extract Byte/Dword/Qword
./PEXTRB:PEXTRD:PEXTRQ.html

PEXTRQ
Extract Byte/Dword/Qword
./PEXTRB:PEXTRD:PEXTRQ.html

PEXTRW
Extract Word
./PEXTRW.html

PHADDD
Packed Horizontal Add
./PHADDW:PHADDD.html

PHADDSW
Packed Horizontal Add and Saturate
./PHADDSW.html

PHADDW
Packed Horizontal Add
./PHADDW:PHADDD.html

PHMINPOSUW
Packed Horizontal Word Minimum
./PHMINPOSUW.html

PHSUBD
Packed Horizontal Subtract
./PHSUBW:PHSUBD.html

PHSUBSW
Packed Horizontal Subtract and Saturate
./PHSUBSW.html

PHSUBW
Packed Horizontal Subtract
./PHSUBW:PHSUBD.html

PINSRB
Insert Byte/Dword/Qword
./PINSRB:PINSRD:PINSRQ.html

PINSRD
Insert Byte/Dword/Qword
./PINSRB:PINSRD:PINSRQ.html

PINSRQ
Insert Byte/Dword/Qword
./PINSRB:PINSRD:PINSRQ.html

PINSRW
Insert Word
./PINSRW.html

PMADDUBSW
Multiply and Add Packed Signed and Unsigned Bytes
./PMADDUBSW.html

PMADDWD
Multiply and Add Packed Integers
./PMADDWD.html

PMAXSB
Maximum of Packed Signed Integers
./PMAXSB:PMAXSW:PMAXSD:PMAXSQ.html

PMAXSD
Maximum of Packed Signed Integers
./PMAXSB:PMAXSW:PMAXSD:PMAXSQ.html

PMAXSQ
Maximum of Packed Signed Integers
./PMAXSB:PMAXSW:PMAXSD:PMAXSQ.html

PMAXSW
Maximum of Packed Signed Integers
./PMAXSB:PMAXSW:PMAXSD:PMAXSQ.html

PMAXUB
Maximum of Packed Unsigned Integers
./PMAXUB:PMAXUW.html

PMAXUD
Maximum of Packed Unsigned Integers
./PMAXUD:PMAXUQ.html

PMAXUQ
Maximum of Packed Unsigned Integers
./PMAXUD:PMAXUQ.html

PMAXUW
Maximum of Packed Unsigned Integers
./PMAXUB:PMAXUW.html

PMINSB
Minimum of Packed Signed Integers
./PMINSB:PMINSW.html

PMINSD
Minimum of Packed Signed Integers
./PMINSD:PMINSQ.html

PMINSQ
Minimum of Packed Signed Integers
./PMINSD:PMINSQ.html

PMINSW
Minimum of Packed Signed Integers
./PMINSB:PMINSW.html

PMINUB
Minimum of Packed Unsigned Integers
./PMINUB:PMINUW.html

PMINUD
Minimum of Packed Unsigned Integers
./PMINUD:PMINUQ.html

PMINUQ
Minimum of Packed Unsigned Integers
./PMINUD:PMINUQ.html

PMINUW
Minimum of Packed Unsigned Integers
./PMINUB:PMINUW.html

PMOVMSKB
Move Byte Mask
./PMOVMSKB.html

PMOVSX
Packed Move with Sign Extend
./PMOVSX.html

PMOVZX
Packed Move with Zero Extend
./PMOVZX.html

PMULDQ
Multiply Packed Doubleword Integers
./PMULDQ.html

PMULHRSW
Packed Multiply High with Round and Scale
./PMULHRSW.html

PMULHUW
Multiply Packed Unsigned Integers and Store High Result
./PMULHUW.html

PMULHW
Multiply Packed Signed Integers and Store High Result
./PMULHW.html

PMULLD
Multiply Packed Integers and Store Low Result
./PMULLD:PMULLQ.html

PMULLQ
Multiply Packed Integers and Store Low Result
./PMULLD:PMULLQ.html

PMULLW
Multiply Packed Signed Integers and Store Low Result
./PMULLW.html

PMULUDQ
Multiply Packed Unsigned Doubleword Integers
./PMULUDQ.html

POP
Pop a Value from the Stack
./POP.html

POPA
Pop All General-Purpose Registers
./POPA:POPAD.html

POPAD
Pop All General-Purpose Registers
./POPA:POPAD.html

POPCNT
Return the Count of Number of Bits Set to 1
./POPCNT.html

POPF
Pop Stack into EFLAGS Register
./POPF:POPFD:POPFQ.html

POPFD
Pop Stack into EFLAGS Register
./POPF:POPFD:POPFQ.html

POPFQ
Pop Stack into EFLAGS Register
./POPF:POPFD:POPFQ.html

POR
Bitwise Logical OR
./POR.html

PREFETCHW
Prefetch Data into Caches in Anticipation of a Write
./PREFETCHW.html

PREFETCHh
Prefetch Data Into Caches
./PREFETCHh.html

PSADBW
Compute Sum of Absolute Differences
./PSADBW.html

PSHUFB
Packed Shuffle Bytes
./PSHUFB.html

PSHUFD
Shuffle Packed Doublewords
./PSHUFD.html

PSHUFHW
Shuffle Packed High Words
./PSHUFHW.html

PSHUFLW
Shuffle Packed Low Words
./PSHUFLW.html

PSHUFW
Shuffle Packed Words
./PSHUFW.html

PSIGNB
Packed SIGN
./PSIGNB:PSIGNW:PSIGND.html

PSIGND
Packed SIGN
./PSIGNB:PSIGNW:PSIGND.html

PSIGNW
Packed SIGN
./PSIGNB:PSIGNW:PSIGND.html

PSLLD
Shift Packed Data Left Logical
./PSLLW:PSLLD:PSLLQ.html

PSLLDQ
Shift Double Quadword Left Logical
./PSLLDQ.html

PSLLQ
Shift Packed Data Left Logical
./PSLLW:PSLLD:PSLLQ.html

PSLLW
Shift Packed Data Left Logical
./PSLLW:PSLLD:PSLLQ.html

PSRAD
Shift Packed Data Right Arithmetic
./PSRAW:PSRAD:PSRAQ.html

PSRAQ
Shift Packed Data Right Arithmetic
./PSRAW:PSRAD:PSRAQ.html

PSRAW
Shift Packed Data Right Arithmetic
./PSRAW:PSRAD:PSRAQ.html

PSRLD
Shift Packed Data Right Logical
./PSRLW:PSRLD:PSRLQ.html

PSRLDQ
Shift Double Quadword Right Logical
./PSRLDQ.html

PSRLQ
Shift Packed Data Right Logical
./PSRLW:PSRLD:PSRLQ.html

PSRLW
Shift Packed Data Right Logical
./PSRLW:PSRLD:PSRLQ.html

PSUBB
Subtract Packed Integers
./PSUBB:PSUBW:PSUBD.html

PSUBD
Subtract Packed Integers
./PSUBB:PSUBW:PSUBD.html

PSUBQ
Subtract Packed Quadword Integers
./PSUBQ.html

PSUBSB
Subtract Packed Signed Integers with Signed Saturation
./PSUBSB:PSUBSW.html

PSUBSW
Subtract Packed Signed Integers with Signed Saturation
./PSUBSB:PSUBSW.html

PSUBUSB
Subtract Packed Unsigned Integers with Unsigned Saturation
./PSUBUSB:PSUBUSW.html

PSUBUSW
Subtract Packed Unsigned Integers with Unsigned Saturation
./PSUBUSB:PSUBUSW.html

PSUBW
Subtract Packed Integers
./PSUBB:PSUBW:PSUBD.html

PTEST
Logical Compare
./PTEST.html

PTWRITE
Write Data to a Processor Trace Packet
./PTWRITE.html

PUNPCKHBW
Unpack High Data
./PUNPCKHBW:PUNPCKHWD:PUNPCKHDQ:PUNPCKHQDQ.html

PUNPCKHDQ
Unpack High Data
./PUNPCKHBW:PUNPCKHWD:PUNPCKHDQ:PUNPCKHQDQ.html

PUNPCKHQDQ
Unpack High Data
./PUNPCKHBW:PUNPCKHWD:PUNPCKHDQ:PUNPCKHQDQ.html

PUNPCKHWD
Unpack High Data
./PUNPCKHBW:PUNPCKHWD:PUNPCKHDQ:PUNPCKHQDQ.html

PUNPCKLBW
Unpack Low Data
./PUNPCKLBW:PUNPCKLWD:PUNPCKLDQ:PUNPCKLQDQ.html

PUNPCKLDQ
Unpack Low Data
./PUNPCKLBW:PUNPCKLWD:PUNPCKLDQ:PUNPCKLQDQ.html

PUNPCKLQDQ
Unpack Low Data
./PUNPCKLBW:PUNPCKLWD:PUNPCKLDQ:PUNPCKLQDQ.html

PUNPCKLWD
Unpack Low Data
./PUNPCKLBW:PUNPCKLWD:PUNPCKLDQ:PUNPCKLQDQ.html

PUSH
Push Word, Doubleword or Quadword Onto the Stack
./PUSH.html

PUSHA
Push All General-Purpose Registers
./PUSHA:PUSHAD.html

PUSHAD
Push All General-Purpose Registers
./PUSHA:PUSHAD.html

PUSHF
Push EFLAGS Register onto the Stack
./PUSHF:PUSHFD:PUSHFQ.html

PUSHFD
Push EFLAGS Register onto the Stack
./PUSHF:PUSHFD:PUSHFQ.html

PUSHFQ
Push EFLAGS Register onto the Stack
./PUSHF:PUSHFD:PUSHFQ.html

PXOR
Logical Exclusive OR
./PXOR.html

RCL
Rotate
./RCL:RCR:ROL:ROR.html

RCPPS
Compute Reciprocals of Packed Single-Precision Floating-Point Values
./RCPPS.html

RCPSS
Compute Reciprocal of Scalar Single-Precision Floating-Point Values
./RCPSS.html

RCR
Rotate
./RCL:RCR:ROL:ROR.html

RDFSBASE
Read FS/GS Segment Base
./RDFSBASE:RDGSBASE.html

RDGSBASE
Read FS/GS Segment Base
./RDFSBASE:RDGSBASE.html

RDMSR
Read from Model Specific Register
./RDMSR.html

RDPID
Read Processor ID
./RDPID.html

RDPKRU
Read Protection Key Rights for User Pages
./RDPKRU.html

RDPMC
Read Performance-Monitoring Counters
./RDPMC.html

RDRAND
Read Random Number
./RDRAND.html

RDSEED
Read Random SEED
./RDSEED.html

RDTSC
Read Time-Stamp Counter
./RDTSC.html

RDTSCP
Read Time-Stamp Counter and Processor ID
./RDTSCP.html

REP
Repeat String Operation Prefix
./REP:REPE:REPZ:REPNE:REPNZ.html

REPE
Repeat String Operation Prefix
./REP:REPE:REPZ:REPNE:REPNZ.html

REPNE
Repeat String Operation Prefix
./REP:REPE:REPZ:REPNE:REPNZ.html

REPNZ
Repeat String Operation Prefix
./REP:REPE:REPZ:REPNE:REPNZ.html

REPZ
Repeat String Operation Prefix
./REP:REPE:REPZ:REPNE:REPNZ.html

RET
Return from Procedure
./RET.html

ROL
Rotate
./RCL:RCR:ROL:ROR.html

ROR
Rotate
./RCL:RCR:ROL:ROR.html

RORX
Rotate Right Logical Without Affecting Flags
./RORX.html

ROUNDPD
Round Packed Double Precision Floating-Point Values
./ROUNDPD.html

ROUNDPS
Round Packed Single Precision Floating-Point Values
./ROUNDPS.html

ROUNDSD
Round Scalar Double Precision Floating-Point Values
./ROUNDSD.html

ROUNDSS
Round Scalar Single Precision Floating-Point Values
./ROUNDSS.html

RSM
Resume from System Management Mode
./RSM.html

RSQRTPS
Compute Reciprocals of Square Roots of Packed Single-Precision Floating-Point Values
./RSQRTPS.html

RSQRTSS
Compute Reciprocal of Square Root of Scalar Single-Precision Floating-Point Value
./RSQRTSS.html

SAHF
Store AH into Flags
./SAHF.html

SAL
Shift
./SAL:SAR:SHL:SHR.html

SAR
Shift
./SAL:SAR:SHL:SHR.html

SARX
Shift Without Affecting Flags
./SARX:SHLX:SHRX.html

SBB
Integer Subtraction with Borrow
./SBB.html

SCAS
Scan String
./SCAS:SCASB:SCASW:SCASD.html

SCASB
Scan String
./SCAS:SCASB:SCASW:SCASD.html

SCASD
Scan String
./SCAS:SCASB:SCASW:SCASD.html

SCASW
Scan String
./SCAS:SCASB:SCASW:SCASD.html

SETcc
Set Byte on Condition
./SETcc.html

SFENCE
Store Fence
./SFENCE.html

SGDT
Store Global Descriptor Table Register
./SGDT.html

SHA1MSG1
Perform an Intermediate Calculation for the Next Four SHA1 Message Dwords
./SHA1MSG1.html

SHA1MSG2
Perform a Final Calculation for the Next Four SHA1 Message Dwords
./SHA1MSG2.html

SHA1NEXTE
Calculate SHA1 State Variable E after Four Rounds
./SHA1NEXTE.html

SHA1RNDS4
Perform Four Rounds of SHA1 Operation
./SHA1RNDS4.html

SHA256MSG1
Perform an Intermediate Calculation for the Next Four SHA256 Message Dwords
./SHA256MSG1.html

SHA256MSG2
Perform a Final Calculation for the Next Four SHA256 Message Dwords
./SHA256MSG2.html

SHA256RNDS2
Perform Two Rounds of SHA256 Operation
./SHA256RNDS2.html

SHL
Shift
./SAL:SAR:SHL:SHR.html

SHLD
Double Precision Shift Left
./SHLD.html

SHLX
Shift Without Affecting Flags
./SARX:SHLX:SHRX.html

SHR
Shift
./SAL:SAR:SHL:SHR.html

SHRD
Double Precision Shift Right
./SHRD.html

SHRX
Shift Without Affecting Flags
./SARX:SHLX:SHRX.html

SHUFPD
Packed Interleave Shuffle of Pairs of Double-Precision Floating-Point Values
./SHUFPD.html

SHUFPS
Packed Interleave Shuffle of Quadruplets of Single-Precision Floating-Point Values
./SHUFPS.html

SIDT
Store Interrupt Descriptor Table Register
./SIDT.html

SLDT
Store Local Descriptor Table Register
./SLDT.html

SMSW
Store Machine Status Word
./SMSW.html

SQRTPD
Square Root of Double-Precision Floating-Point Values
./SQRTPD.html

SQRTPS
Square Root of Single-Precision Floating-Point Values
./SQRTPS.html

SQRTSD
Compute Square Root of Scalar Double-Precision Floating-Point Value
./SQRTSD.html

SQRTSS
Compute Square Root of Scalar Single-Precision Value
./SQRTSS.html

STAC
Set AC Flag in EFLAGS Register
./STAC.html

STC
Set Carry Flag
./STC.html

STD
Set Direction Flag
./STD.html

STI
Set Interrupt Flag
./STI.html

STMXCSR
Store MXCSR Register State
./STMXCSR.html

STOS
Store String
./STOS:STOSB:STOSW:STOSD:STOSQ.html

STOSB
Store String
./STOS:STOSB:STOSW:STOSD:STOSQ.html

STOSD
Store String
./STOS:STOSB:STOSW:STOSD:STOSQ.html

STOSQ
Store String
./STOS:STOSB:STOSW:STOSD:STOSQ.html

STOSW
Store String
./STOS:STOSB:STOSW:STOSD:STOSQ.html

STR
Store Task Register
./STR.html

SUB
Subtract
./SUB.html

SUBPD
Subtract Packed Double-Precision Floating-Point Values
./SUBPD.html

SUBPS
Subtract Packed Single-Precision Floating-Point Values
./SUBPS.html

SUBSD
Subtract Scalar Double-Precision Floating-Point Value
./SUBSD.html

SUBSS
Subtract Scalar Single-Precision Floating-Point Value
./SUBSS.html

SWAPGS
Swap GS Base Register
./SWAPGS.html

SYSCALL
Fast System Call
./SYSCALL.html

SYSENTER
Fast System Call
./SYSENTER.html

SYSEXIT
Fast Return from Fast System Call
./SYSEXIT.html

SYSRET
Return From Fast System Call
./SYSRET.html

TEST
Logical Compare
./TEST.html

TZCNT
Count the Number of Trailing Zero Bits
./TZCNT.html

UCOMISD
Unordered Compare Scalar Double-Precision Floating-Point Values and Set EFLAGS
./UCOMISD.html

UCOMISS
Unordered Compare Scalar Single-Precision Floating-Point Values and Set EFLAGS
./UCOMISS.html

UD
Undefined Instruction
./UD.html

UNPCKHPD
Unpack and Interleave High Packed Double-Precision Floating-Point Values
./UNPCKHPD.html

UNPCKHPS
Unpack and Interleave High Packed Single-Precision Floating-Point Values
./UNPCKHPS.html

UNPCKLPD
Unpack and Interleave Low Packed Double-Precision Floating-Point Values
./UNPCKLPD.html

UNPCKLPS
Unpack and Interleave Low Packed Single-Precision Floating-Point Values
./UNPCKLPS.html

VALIGND
Align Doubleword/Quadword Vectors
./VALIGND:VALIGNQ.html

VALIGNQ
Align Doubleword/Quadword Vectors
./VALIGND:VALIGNQ.html

VBLENDMPD
Blend Float64/Float32 Vectors Using an OpMask Control
./VBLENDMPD:VBLENDMPS.html

VBLENDMPS
Blend Float64/Float32 Vectors Using an OpMask Control
./VBLENDMPD:VBLENDMPS.html

VBROADCAST
Load with Broadcast Floating-Point Data
./VBROADCAST.html

VCOMPRESSPD
Store Sparse Packed Double-Precision Floating-Point Values into Dense Memory
./VCOMPRESSPD.html

VCOMPRESSPS
Store Sparse Packed Single-Precision Floating-Point Values into Dense Memory
./VCOMPRESSPS.html

VCVTPD2QQ
Convert Packed Double-Precision Floating-Point Values to Packed Quadword Integers
./VCVTPD2QQ.html

VCVTPD2UDQ
Convert Packed Double-Precision Floating-Point Values to Packed Unsigned Doubleword Integers
./VCVTPD2UDQ.html

VCVTPD2UQQ
Convert Packed Double-Precision Floating-Point Values to Packed Unsigned Quadword Integers
./VCVTPD2UQQ.html

VCVTPH2PS
Convert 16-bit FP values to Single-Precision FP values
./VCVTPH2PS.html

VCVTPS2PH
Convert Single-Precision FP value to 16-bit FP value
./VCVTPS2PH.html

VCVTPS2QQ
Convert Packed Single Precision Floating-Point Values to Packed Singed Quadword Integer Values
./VCVTPS2QQ.html

VCVTPS2UDQ
Convert Packed Single-Precision Floating-Point Values to Packed Unsigned Doubleword Integer Values
./VCVTPS2UDQ.html

VCVTPS2UQQ
Convert Packed Single Precision Floating-Point Values to Packed Unsigned Quadword Integer Values
./VCVTPS2UQQ.html

VCVTQQ2PD
Convert Packed Quadword Integers to Packed Double-Precision Floating-Point Values
./VCVTQQ2PD.html

VCVTQQ2PS
Convert Packed Quadword Integers to Packed Single-Precision Floating-Point Values
./VCVTQQ2PS.html

VCVTSD2USI
Convert Scalar Double-Precision Floating-Point Value to Unsigned Doubleword Integer
./VCVTSD2USI.html

VCVTSS2USI
Convert Scalar Single-Precision Floating-Point Value to Unsigned Doubleword Integer
./VCVTSS2USI.html

VCVTTPD2QQ
Convert with Truncation Packed Double-Precision Floating-Point Values to Packed Quadword Integers
./VCVTTPD2QQ.html

VCVTTPD2UDQ
Convert with Truncation Packed Double-Precision Floating-Point Values to Packed Unsigned Doubleword Integers
./VCVTTPD2UDQ.html

VCVTTPD2UQQ
Convert with Truncation Packed Double-Precision Floating-Point Values to Packed Unsigned Quadword Integers
./VCVTTPD2UQQ.html

VCVTTPS2QQ
Convert with Truncation Packed Single Precision Floating-Point Values to Packed Singed Quadword Integer Values
./VCVTTPS2QQ.html

VCVTTPS2UDQ
Convert with Truncation Packed Single-Precision Floating-Point Values to Packed Unsigned Doubleword Integer Values
./VCVTTPS2UDQ.html

VCVTTPS2UQQ
Convert with Truncation Packed Single Precision Floating-Point Values to Packed Unsigned Quadword Integer Values
./VCVTTPS2UQQ.html

VCVTTSD2USI
Convert with Truncation Scalar Double-Precision Floating-Point Value to Unsigned Integer
./VCVTTSD2USI.html

VCVTTSS2USI
Convert with Truncation Scalar Single-Precision Floating-Point Value to Unsigned Integer
./VCVTTSS2USI.html

VCVTUDQ2PD
Convert Packed Unsigned Doubleword Integers to Packed Double-Precision Floating-Point Values
./VCVTUDQ2PD.html

VCVTUDQ2PS
Convert Packed Unsigned Doubleword Integers to Packed Single-Precision Floating-Point Values
./VCVTUDQ2PS.html

VCVTUQQ2PD
Convert Packed Unsigned Quadword Integers to Packed Double-Precision Floating-Point Values
./VCVTUQQ2PD.html

VCVTUQQ2PS
Convert Packed Unsigned Quadword Integers to Packed Single-Precision Floating-Point Values
./VCVTUQQ2PS.html

VCVTUSI2SD
Convert Unsigned Integer to Scalar Double-Precision Floating-Point Value
./VCVTUSI2SD.html

VCVTUSI2SS
Convert Unsigned Integer to Scalar Single-Precision Floating-Point Value
./VCVTUSI2SS.html

VDBPSADBW
Double Block Packed Sum-Absolute-Differences (SAD) on Unsigned Bytes
./VDBPSADBW.html

VERR
Verify a Segment for Reading or Writing
./VERR:VERW.html

VERW
Verify a Segment for Reading or Writing
./VERR:VERW.html

VEXPANDPD
Load Sparse Packed Double-Precision Floating-Point Values from Dense Memory
./VEXPANDPD.html

VEXPANDPS
Load Sparse Packed Single-Precision Floating-Point Values from Dense Memory
./VEXPANDPS.html

VEXTRACTF128
Extra ct Packed Floating-Point Values
./VEXTRACTF128:VEXTRACTF32x4:VEXTRACTF64x2:VEXTRACTF32x8:VEXTRACTF64x4.html

VEXTRACTF32x4
Extra ct Packed Floating-Point Values
./VEXTRACTF128:VEXTRACTF32x4:VEXTRACTF64x2:VEXTRACTF32x8:VEXTRACTF64x4.html

VEXTRACTF32x8
Extra ct Packed Floating-Point Values
./VEXTRACTF128:VEXTRACTF32x4:VEXTRACTF64x2:VEXTRACTF32x8:VEXTRACTF64x4.html

VEXTRACTF64x2
Extra ct Packed Floating-Point Values
./VEXTRACTF128:VEXTRACTF32x4:VEXTRACTF64x2:VEXTRACTF32x8:VEXTRACTF64x4.html

VEXTRACTF64x4
Extra ct Packed Floating-Point Values
./VEXTRACTF128:VEXTRACTF32x4:VEXTRACTF64x2:VEXTRACTF32x8:VEXTRACTF64x4.html

VEXTRACTI128
Extract packed Integer Values
./VEXTRACTI128:VEXTRACTI32x4:VEXTRACTI64x2:VEXTRACTI32x8:VEXTRACTI64x4.html

VEXTRACTI32x4
Extract packed Integer Values
./VEXTRACTI128:VEXTRACTI32x4:VEXTRACTI64x2:VEXTRACTI32x8:VEXTRACTI64x4.html

VEXTRACTI32x8
Extract packed Integer Values
./VEXTRACTI128:VEXTRACTI32x4:VEXTRACTI64x2:VEXTRACTI32x8:VEXTRACTI64x4.html

VEXTRACTI64x2
Extract packed Integer Values
./VEXTRACTI128:VEXTRACTI32x4:VEXTRACTI64x2:VEXTRACTI32x8:VEXTRACTI64x4.html

VEXTRACTI64x4
Extract packed Integer Values
./VEXTRACTI128:VEXTRACTI32x4:VEXTRACTI64x2:VEXTRACTI32x8:VEXTRACTI64x4.html

VFIXUPIMMPD
Fix Up Special Packed Float64 Values
./VFIXUPIMMPD.html

VFIXUPIMMPS
Fix Up Special Packed Float32 Values
./VFIXUPIMMPS.html

VFIXUPIMMSD
Fix Up Special Scalar Float64 Value
./VFIXUPIMMSD.html

VFIXUPIMMSS
Fix Up Special Scalar Float32 Value
./VFIXUPIMMSS.html

VFMADD132PD
Fused Multiply-Add of Packed Double- Precision Floating-Point Values
./VFMADD132PD:VFMADD213PD:VFMADD231PD.html

VFMADD132PS
Fused Multiply-Add of Packed Single- Precision Floating-Point Values
./VFMADD132PS:VFMADD213PS:VFMADD231PS.html

VFMADD132SD
Fused Multiply-Add of Scalar Double- Precision Floating-Point Values
./VFMADD132SD:VFMADD213SD:VFMADD231SD.html

VFMADD132SS
Fused Multiply-Add of Scalar Single-Precision Floating-Point Values
./VFMADD132SS:VFMADD213SS:VFMADD231SS.html

VFMADD213PD
Fused Multiply-Add of Packed Double- Precision Floating-Point Values
./VFMADD132PD:VFMADD213PD:VFMADD231PD.html

VFMADD213PS
Fused Multiply-Add of Packed Single- Precision Floating-Point Values
./VFMADD132PS:VFMADD213PS:VFMADD231PS.html

VFMADD213SD
Fused Multiply-Add of Scalar Double- Precision Floating-Point Values
./VFMADD132SD:VFMADD213SD:VFMADD231SD.html

VFMADD213SS
Fused Multiply-Add of Scalar Single-Precision Floating-Point Values
./VFMADD132SS:VFMADD213SS:VFMADD231SS.html

VFMADD231PD
Fused Multiply-Add of Packed Double- Precision Floating-Point Values
./VFMADD132PD:VFMADD213PD:VFMADD231PD.html

VFMADD231PS
Fused Multiply-Add of Packed Single- Precision Floating-Point Values
./VFMADD132PS:VFMADD213PS:VFMADD231PS.html

VFMADD231SD
Fused Multiply-Add of Scalar Double- Precision Floating-Point Values
./VFMADD132SD:VFMADD213SD:VFMADD231SD.html

VFMADD231SS
Fused Multiply-Add of Scalar Single-Precision Floating-Point Values
./VFMADD132SS:VFMADD213SS:VFMADD231SS.html

VFMADDSUB132PD
Fused Multiply-Alternating Add/Subtract of Packed Double-Precision Floating-Point Values
./VFMADDSUB132PD:VFMADDSUB213PD:VFMADDSUB231PD.html

VFMADDSUB132PS
Fused Multiply-Alternating Add/Subtract of Packed Single-Precision Floating-Point Values
./VFMADDSUB132PS:VFMADDSUB213PS:VFMADDSUB231PS.html

VFMADDSUB213PD
Fused Multiply-Alternating Add/Subtract of Packed Double-Precision Floating-Point Values
./VFMADDSUB132PD:VFMADDSUB213PD:VFMADDSUB231PD.html

VFMADDSUB213PS
Fused Multiply-Alternating Add/Subtract of Packed Single-Precision Floating-Point Values
./VFMADDSUB132PS:VFMADDSUB213PS:VFMADDSUB231PS.html

VFMADDSUB231PD
Fused Multiply-Alternating Add/Subtract of Packed Double-Precision Floating-Point Values
./VFMADDSUB132PD:VFMADDSUB213PD:VFMADDSUB231PD.html

VFMADDSUB231PS
Fused Multiply-Alternating Add/Subtract of Packed Single-Precision Floating-Point Values
./VFMADDSUB132PS:VFMADDSUB213PS:VFMADDSUB231PS.html

VFMSUB132PD
Fused Multiply-Subtract of Packed Double- Precision Floating-Point Values
./VFMSUB132PD:VFMSUB213PD:VFMSUB231PD.html

VFMSUB132PS
Fused Multiply-Subtract of Packed Single- Precision Floating-Point Values
./VFMSUB132PS:VFMSUB213PS:VFMSUB231PS.html

VFMSUB132SD
Fused Multiply-Subtract of Scalar Double- Precision Floating-Point Values
./VFMSUB132SD:VFMSUB213SD:VFMSUB231SD.html

VFMSUB132SS
Fused Multiply-Subtract of Scalar Single- Precision Floating-Point Values
./VFMSUB132SS:VFMSUB213SS:VFMSUB231SS.html

VFMSUB213PD
Fused Multiply-Subtract of Packed Double- Precision Floating-Point Values
./VFMSUB132PD:VFMSUB213PD:VFMSUB231PD.html

VFMSUB213PS
Fused Multiply-Subtract of Packed Single- Precision Floating-Point Values
./VFMSUB132PS:VFMSUB213PS:VFMSUB231PS.html

VFMSUB213SD
Fused Multiply-Subtract of Scalar Double- Precision Floating-Point Values
./VFMSUB132SD:VFMSUB213SD:VFMSUB231SD.html

VFMSUB213SS
Fused Multiply-Subtract of Scalar Single- Precision Floating-Point Values
./VFMSUB132SS:VFMSUB213SS:VFMSUB231SS.html

VFMSUB231PD
Fused Multiply-Subtract of Packed Double- Precision Floating-Point Values
./VFMSUB132PD:VFMSUB213PD:VFMSUB231PD.html

VFMSUB231PS
Fused Multiply-Subtract of Packed Single- Precision Floating-Point Values
./VFMSUB132PS:VFMSUB213PS:VFMSUB231PS.html

VFMSUB231SD
Fused Multiply-Subtract of Scalar Double- Precision Floating-Point Values
./VFMSUB132SD:VFMSUB213SD:VFMSUB231SD.html

VFMSUB231SS
Fused Multiply-Subtract of Scalar Single- Precision Floating-Point Values
./VFMSUB132SS:VFMSUB213SS:VFMSUB231SS.html

VFMSUBADD132PD
Fused Multiply-Alternating Subtract/Add of Packed Double-Precision Floating-Point Values
./VFMSUBADD132PD:VFMSUBADD213PD:VFMSUBADD231PD.html

VFMSUBADD132PS
Fused Multiply-Alternating Subtract/Add of Packed Single-Precision Floating-Point Values
./VFMSUBADD132PS:VFMSUBADD213PS:VFMSUBADD231PS.html

VFMSUBADD213PD
Fused Multiply-Alternating Subtract/Add of Packed Double-Precision Floating-Point Values
./VFMSUBADD132PD:VFMSUBADD213PD:VFMSUBADD231PD.html

VFMSUBADD213PS
Fused Multiply-Alternating Subtract/Add of Packed Single-Precision Floating-Point Values
./VFMSUBADD132PS:VFMSUBADD213PS:VFMSUBADD231PS.html

VFMSUBADD231PD
Fused Multiply-Alternating Subtract/Add of Packed Double-Precision Floating-Point Values
./VFMSUBADD132PD:VFMSUBADD213PD:VFMSUBADD231PD.html

VFMSUBADD231PS
Fused Multiply-Alternating Subtract/Add of Packed Single-Precision Floating-Point Values
./VFMSUBADD132PS:VFMSUBADD213PS:VFMSUBADD231PS.html

VFNMADD132PD
Fused Negative Multiply-Add of Packed Double-Precision Floating-Point Values
./VFNMADD132PD:VFNMADD213PD:VFNMADD231PD.html

VFNMADD132PS
Fused Negative Multiply-Add of Packed Single-Precision Floating-Point Values
./VFNMADD132PS:VFNMADD213PS:VFNMADD231PS.html

VFNMADD132SD
Fused Negative Multiply-Add of Scalar Double-Precision Floating-Point Values
./VFNMADD132SD:VFNMADD213SD:VFNMADD231SD.html

VFNMADD132SS
Fused Negative Multiply-Add of Scalar Single-Precision Floating-Point Values
./VFNMADD132SS:VFNMADD213SS:VFNMADD231SS.html

VFNMADD213PD
Fused Negative Multiply-Add of Packed Double-Precision Floating-Point Values
./VFNMADD132PD:VFNMADD213PD:VFNMADD231PD.html

VFNMADD213PS
Fused Negative Multiply-Add of Packed Single-Precision Floating-Point Values
./VFNMADD132PS:VFNMADD213PS:VFNMADD231PS.html

VFNMADD213SD
Fused Negative Multiply-Add of Scalar Double-Precision Floating-Point Values
./VFNMADD132SD:VFNMADD213SD:VFNMADD231SD.html

VFNMADD213SS
Fused Negative Multiply-Add of Scalar Single-Precision Floating-Point Values
./VFNMADD132SS:VFNMADD213SS:VFNMADD231SS.html

VFNMADD231PD
Fused Negative Multiply-Add of Packed Double-Precision Floating-Point Values
./VFNMADD132PD:VFNMADD213PD:VFNMADD231PD.html

VFNMADD231PS
Fused Negative Multiply-Add of Packed Single-Precision Floating-Point Values
./VFNMADD132PS:VFNMADD213PS:VFNMADD231PS.html

VFNMADD231SD
Fused Negative Multiply-Add of Scalar Double-Precision Floating-Point Values
./VFNMADD132SD:VFNMADD213SD:VFNMADD231SD.html

VFNMADD231SS
Fused Negative Multiply-Add of Scalar Single-Precision Floating-Point Values
./VFNMADD132SS:VFNMADD213SS:VFNMADD231SS.html

VFNMSUB132PD
Fused Negative Multiply-Subtract of Packed Double-Precision Floating-Point Values
./VFNMSUB132PD:VFNMSUB213PD:VFNMSUB231PD.html

VFNMSUB132PS
Fused Negative Multiply-Subtract of Packed Single-Precision Floating-Point Values
./VFNMSUB132PS:VFNMSUB213PS:VFNMSUB231PS.html

VFNMSUB132SD
Fused Negative Multiply-Subtract of Scalar Double-Precision Floating-Point Values
./VFNMSUB132SD:VFNMSUB213SD:VFNMSUB231SD.html

VFNMSUB132SS
Fused Negative Multiply-Subtract of Scalar Single-Precision Floating-Point Values
./VFNMSUB132SS:VFNMSUB213SS:VFNMSUB231SS.html

VFNMSUB213PD
Fused Negative Multiply-Subtract of Packed Double-Precision Floating-Point Values
./VFNMSUB132PD:VFNMSUB213PD:VFNMSUB231PD.html

VFNMSUB213PS
Fused Negative Multiply-Subtract of Packed Single-Precision Floating-Point Values
./VFNMSUB132PS:VFNMSUB213PS:VFNMSUB231PS.html

VFNMSUB213SD
Fused Negative Multiply-Subtract of Scalar Double-Precision Floating-Point Values
./VFNMSUB132SD:VFNMSUB213SD:VFNMSUB231SD.html

VFNMSUB213SS
Fused Negative Multiply-Subtract of Scalar Single-Precision Floating-Point Values
./VFNMSUB132SS:VFNMSUB213SS:VFNMSUB231SS.html

VFNMSUB231PD
Fused Negative Multiply-Subtract of Packed Double-Precision Floating-Point Values
./VFNMSUB132PD:VFNMSUB213PD:VFNMSUB231PD.html

VFNMSUB231PS
Fused Negative Multiply-Subtract of Packed Single-Precision Floating-Point Values
./VFNMSUB132PS:VFNMSUB213PS:VFNMSUB231PS.html

VFNMSUB231SD
Fused Negative Multiply-Subtract of Scalar Double-Precision Floating-Point Values
./VFNMSUB132SD:VFNMSUB213SD:VFNMSUB231SD.html

VFNMSUB231SS
Fused Negative Multiply-Subtract of Scalar Single-Precision Floating-Point Values
./VFNMSUB132SS:VFNMSUB213SS:VFNMSUB231SS.html

VFPCLASSPD
Tests Types Of a Packed Float64 Values
./VFPCLASSPD.html

VFPCLASSPS
Tests Types Of a Packed Float32 Values
./VFPCLASSPS.html

VFPCLASSSD
Tests Types Of a Scalar Float64 Values
./VFPCLASSSD.html

VFPCLASSSS
Tests Types Of a Scalar Float32 Values
./VFPCLASSSS.html

VGATHERDPD
Gather Packed DP FP Values Using Signed Dword/Qword Indices
./VGATHERDPD:VGATHERQPD.html

VGATHERDPD (1)
Gather Packed Single, Packed Double with Signed Dword
./VGATHERDPS:VGATHERDPD.html

VGATHERDPS
Gather Packed SP FP values Using Signed Dword/Qword Indices
./VGATHERDPS:VGATHERQPS.html

VGATHERDPS (1)
Gather Packed Single, Packed Double with Signed Dword
./VGATHERDPS:VGATHERDPD.html

VGATHERQPD
Gather Packed DP FP Values Using Signed Dword/Qword Indices
./VGATHERDPD:VGATHERQPD.html

VGATHERQPD (1)
Gather Packed Single, Packed Double with Signed Qword Indices
./VGATHERQPS:VGATHERQPD.html

VGATHERQPS
Gather Packed SP FP values Using Signed Dword/Qword Indices
./VGATHERDPS:VGATHERQPS.html

VGATHERQPS (1)
Gather Packed Single, Packed Double with Signed Qword Indices
./VGATHERQPS:VGATHERQPD.html

VGETEXPPD
Convert Exponents of Packed DP FP Values to DP FP Values
./VGETEXPPD.html

VGETEXPPS
Convert Exponents of Packed SP FP Values to SP FP Values
./VGETEXPPS.html

VGETEXPSD
Convert Exponents of Scalar DP FP Values to DP FP Value
./VGETEXPSD.html

VGETEXPSS
Convert Exponents of Scalar SP FP Values to SP FP Value
./VGETEXPSS.html

VGETMANTPD
Extract Float64 Vector of Normalized Mantissas from Float64 Vector
./VGETMANTPD.html

VGETMANTPS
Extract Float32 Vector of Normalized Mantissas from Float32 Vector
./VGETMANTPS.html

VGETMANTSD
Extract Float64 of Normalized Mantissas from Float64 Scalar
./VGETMANTSD.html

VGETMANTSS
Extract Float32 Vector of Normalized Mantissa from Float32 Vector
./VGETMANTSS.html

VINSERTF128
Insert Packed Floating-Point Values
./VINSERTF128:VINSERTF32x4:VINSERTF64x2:VINSERTF32x8:VINSERTF64x4.html

VINSERTF32x4
Insert Packed Floating-Point Values
./VINSERTF128:VINSERTF32x4:VINSERTF64x2:VINSERTF32x8:VINSERTF64x4.html

VINSERTF32x8
Insert Packed Floating-Point Values
./VINSERTF128:VINSERTF32x4:VINSERTF64x2:VINSERTF32x8:VINSERTF64x4.html

VINSERTF64x2
Insert Packed Floating-Point Values
./VINSERTF128:VINSERTF32x4:VINSERTF64x2:VINSERTF32x8:VINSERTF64x4.html

VINSERTF64x4
Insert Packed Floating-Point Values
./VINSERTF128:VINSERTF32x4:VINSERTF64x2:VINSERTF32x8:VINSERTF64x4.html

VINSERTI128
Insert Packed Integer Values
./VINSERTI128:VINSERTI32x4:VINSERTI64x2:VINSERTI32x8:VINSERTI64x4.html

VINSERTI32x4
Insert Packed Integer Values
./VINSERTI128:VINSERTI32x4:VINSERTI64x2:VINSERTI32x8:VINSERTI64x4.html

VINSERTI32x8
Insert Packed Integer Values
./VINSERTI128:VINSERTI32x4:VINSERTI64x2:VINSERTI32x8:VINSERTI64x4.html

VINSERTI64x2
Insert Packed Integer Values
./VINSERTI128:VINSERTI32x4:VINSERTI64x2:VINSERTI32x8:VINSERTI64x4.html

VINSERTI64x4
Insert Packed Integer Values
./VINSERTI128:VINSERTI32x4:VINSERTI64x2:VINSERTI32x8:VINSERTI64x4.html

VMASKMOV
Conditional SIMD Packed Loads and Stores
./VMASKMOV.html

VMOVDQA32
Move Aligned Packed Integer Values
./MOVDQA:VMOVDQA32:VMOVDQA64.html

VMOVDQA64
Move Aligned Packed Integer Values
./MOVDQA:VMOVDQA32:VMOVDQA64.html

VMOVDQU16
Move Unaligned Packed Integer Values
./MOVDQU:VMOVDQU8:VMOVDQU16:VMOVDQU32:VMOVDQU64.html

VMOVDQU32
Move Unaligned Packed Integer Values
./MOVDQU:VMOVDQU8:VMOVDQU16:VMOVDQU32:VMOVDQU64.html

VMOVDQU64
Move Unaligned Packed Integer Values
./MOVDQU:VMOVDQU8:VMOVDQU16:VMOVDQU32:VMOVDQU64.html

VMOVDQU8
Move Unaligned Packed Integer Values
./MOVDQU:VMOVDQU8:VMOVDQU16:VMOVDQU32:VMOVDQU64.html

VPBLENDD
Blend Packed Dwords
./VPBLENDD.html

VPBLENDMB
Blend Byte/Word Vectors Using an Opmask Control
./VPBLENDMB:VPBLENDMW.html

VPBLENDMD
Blend Int32/Int64 Vectors Using an OpMask Control
./VPBLENDMD:VPBLENDMQ.html

VPBLENDMQ
Blend Int32/Int64 Vectors Using an OpMask Control
./VPBLENDMD:VPBLENDMQ.html

VPBLENDMW
Blend Byte/Word Vectors Using an Opmask Control
./VPBLENDMB:VPBLENDMW.html

VPBROADCAST
Load Integer and Broadcast
./VPBROADCAST.html

VPBROADCASTB
Load with Broadcast Integer Data from General Purpose Register
./VPBROADCASTB:VPBROADCASTW:VPBROADCASTD:VPBROADCASTQ.html

VPBROADCASTD
Load with Broadcast Integer Data from General Purpose Register
./VPBROADCASTB:VPBROADCASTW:VPBROADCASTD:VPBROADCASTQ.html

VPBROADCASTM
Broadcast Mask to Vector Register
./VPBROADCASTM.html

VPBROADCASTQ
Load with Broadcast Integer Data from General Purpose Register
./VPBROADCASTB:VPBROADCASTW:VPBROADCASTD:VPBROADCASTQ.html

VPBROADCASTW
Load with Broadcast Integer Data from General Purpose Register
./VPBROADCASTB:VPBROADCASTW:VPBROADCASTD:VPBROADCASTQ.html

VPCMPB
Compare Packed Byte Values Into Mask
./VPCMPB:VPCMPUB.html

VPCMPD
Compare Packed Integer Values into Mask
./VPCMPD:VPCMPUD.html

VPCMPQ
Compare Packed Integer Values into Mask
./VPCMPQ:VPCMPUQ.html

VPCMPUB
Compare Packed Byte Values Into Mask
./VPCMPB:VPCMPUB.html

VPCMPUD
Compare Packed Integer Values into Mask
./VPCMPD:VPCMPUD.html

VPCMPUQ
Compare Packed Integer Values into Mask
./VPCMPQ:VPCMPUQ.html

VPCMPUW
Compare Packed Word Values Into Mask
./VPCMPW:VPCMPUW.html

VPCMPW
Compare Packed Word Values Into Mask
./VPCMPW:VPCMPUW.html

VPCOMPRESSD
Store Sparse Packed Doubleword Integer Values into Dense Memory/Register
./VPCOMPRESSD.html

VPCOMPRESSQ
Store Sparse Packed Quadword Integer Values into Dense Memory/Register
./VPCOMPRESSQ.html

VPCONFLICTD
Detect Conflicts Within a Vector of Packed Dword/Qword Values into Dense Memory/ Register
./VPCONFLICTD:VPCONFLICTQ.html

VPCONFLICTQ
Detect Conflicts Within a Vector of Packed Dword/Qword Values into Dense Memory/ Register
./VPCONFLICTD:VPCONFLICTQ.html

VPERM2F128
Permute Floating-Point Values
./VPERM2F128.html

VPERM2I128
Permute Integer Values
./VPERM2I128.html

VPERMB
Permute Packed Bytes Elements
./VPERMB.html

VPERMD
Permute Packed Doublewords/Words Elements
./VPERMD:VPERMW.html

VPERMI2B
Full Permute of Bytes from Two Tables Overwriting the Index
./VPERMI2B.html

VPERMI2D
Full Permute From Two Tables Overwriting the Index
./VPERMI2W:VPERMI2D:VPERMI2Q:VPERMI2PS:VPERMI2PD.html

VPERMI2PD
Full Permute From Two Tables Overwriting the Index
./VPERMI2W:VPERMI2D:VPERMI2Q:VPERMI2PS:VPERMI2PD.html

VPERMI2PS
Full Permute From Two Tables Overwriting the Index
./VPERMI2W:VPERMI2D:VPERMI2Q:VPERMI2PS:VPERMI2PD.html

VPERMI2Q
Full Permute From Two Tables Overwriting the Index
./VPERMI2W:VPERMI2D:VPERMI2Q:VPERMI2PS:VPERMI2PD.html

VPERMI2W
Full Permute From Two Tables Overwriting the Index
./VPERMI2W:VPERMI2D:VPERMI2Q:VPERMI2PS:VPERMI2PD.html

VPERMILPD
Permute In-Lane of Pairs of Double-Precision Floating-Point Values
./VPERMILPD.html

VPERMILPS
Permute In-Lane of Quadruples of Single-Precision Floating-Point Values
./VPERMILPS.html

VPERMPD
Permute Double-Precision Floating-Point Elements
./VPERMPD.html

VPERMPS
Permute Single-Precision Floating-Point Elements
./VPERMPS.html

VPERMQ
Qwords Element Permutation
./VPERMQ.html

VPERMT2B
Full Permute of Bytes from Two Tables Overwriting a Table
./VPERMT2B.html

VPERMT2D
Full Permute from Two Tables Overwriting one Table
./VPERMT2W:VPERMT2D:VPERMT2Q:VPERMT2PS:VPERMT2PD.html

VPERMT2PD
Full Permute from Two Tables Overwriting one Table
./VPERMT2W:VPERMT2D:VPERMT2Q:VPERMT2PS:VPERMT2PD.html

VPERMT2PS
Full Permute from Two Tables Overwriting one Table
./VPERMT2W:VPERMT2D:VPERMT2Q:VPERMT2PS:VPERMT2PD.html

VPERMT2Q
Full Permute from Two Tables Overwriting one Table
./VPERMT2W:VPERMT2D:VPERMT2Q:VPERMT2PS:VPERMT2PD.html

VPERMT2W
Full Permute from Two Tables Overwriting one Table
./VPERMT2W:VPERMT2D:VPERMT2Q:VPERMT2PS:VPERMT2PD.html

VPERMW
Permute Packed Doublewords/Words Elements
./VPERMD:VPERMW.html

VPEXPANDD
Load Sparse Packed Doubleword Integer Values from Dense Memory / Register
./VPEXPANDD.html

VPEXPANDQ
Load Sparse Packed Quadword Integer Values from Dense Memory / Register
./VPEXPANDQ.html

VPGATHERDD
Gather Packed Dword Values Using Signed Dword/Qword Indices
./VPGATHERDD:VPGATHERQD.html

VPGATHERDD (1)
Gather Packed Dword, Packed Qword with Signed Dword Indices
./VPGATHERDD:VPGATHERDQ.html

VPGATHERDQ
Gather Packed Dword, Packed Qword with Signed Dword Indices
./VPGATHERDD:VPGATHERDQ.html

VPGATHERDQ (1)
Gather Packed Qword Values Using Signed Dword/Qword Indices
./VPGATHERDQ:VPGATHERQQ.html

VPGATHERQD
Gather Packed Dword Values Using Signed Dword/Qword Indices
./VPGATHERDD:VPGATHERQD.html

VPGATHERQD (1)
Gather Packed Dword, Packed Qword with Signed Qword Indices
./VPGATHERQD:VPGATHERQQ.html

VPGATHERQQ
Gather Packed Qword Values Using Signed Dword/Qword Indices
./VPGATHERDQ:VPGATHERQQ.html

VPGATHERQQ (1)
Gather Packed Dword, Packed Qword with Signed Qword Indices
./VPGATHERQD:VPGATHERQQ.html

VPLZCNTD
Count the Number of Leading Zero Bits for Packed Dword, Packed Qword Values
./VPLZCNTD:VPLZCNTQ.html

VPLZCNTQ
Count the Number of Leading Zero Bits for Packed Dword, Packed Qword Values
./VPLZCNTD:VPLZCNTQ.html

VPMADD52HUQ
Packed Multiply of Unsigned 52-bit Unsigned Integers and Add High 52-bit Products to 64-bit Accumulators
./VPMADD52HUQ.html

VPMADD52LUQ
Packed Multiply of Unsigned 52-bit Integers and Add the Low 52-bit Products to Qword Accumulators
./VPMADD52LUQ.html

VPMASKMOV
Conditional SIMD Integer Packed Loads and Stores
./VPMASKMOV.html

VPMOVB2M
Convert a Vector Register to a Mask
./VPMOVB2M:VPMOVW2M:VPMOVD2M:VPMOVQ2M.html

VPMOVD2M
Convert a Vector Register to a Mask
./VPMOVB2M:VPMOVW2M:VPMOVD2M:VPMOVQ2M.html

VPMOVDB
Down Convert DWord to Byte
./VPMOVDB:VPMOVSDB:VPMOVUSDB.html

VPMOVDW
Down Convert DWord to Word
./VPMOVDW:VPMOVSDW:VPMOVUSDW.html

VPMOVM2B
Convert a Mask Register to a Vector Register
./VPMOVM2B:VPMOVM2W:VPMOVM2D:VPMOVM2Q.html

VPMOVM2D
Convert a Mask Register to a Vector Register
./VPMOVM2B:VPMOVM2W:VPMOVM2D:VPMOVM2Q.html

VPMOVM2Q
Convert a Mask Register to a Vector Register
./VPMOVM2B:VPMOVM2W:VPMOVM2D:VPMOVM2Q.html

VPMOVM2W
Convert a Mask Register to a Vector Register
./VPMOVM2B:VPMOVM2W:VPMOVM2D:VPMOVM2Q.html

VPMOVQ2M
Convert a Vector Register to a Mask
./VPMOVB2M:VPMOVW2M:VPMOVD2M:VPMOVQ2M.html

VPMOVQB
Down Convert QWord to Byte
./VPMOVQB:VPMOVSQB:VPMOVUSQB.html

VPMOVQD
Down Convert QWord to DWord
./VPMOVQD:VPMOVSQD:VPMOVUSQD.html

VPMOVQW
Down Convert QWord to Word
./VPMOVQW:VPMOVSQW:VPMOVUSQW.html

VPMOVSDB
Down Convert DWord to Byte
./VPMOVDB:VPMOVSDB:VPMOVUSDB.html

VPMOVSDW
Down Convert DWord to Word
./VPMOVDW:VPMOVSDW:VPMOVUSDW.html

VPMOVSQB
Down Convert QWord to Byte
./VPMOVQB:VPMOVSQB:VPMOVUSQB.html

VPMOVSQD
Down Convert QWord to DWord
./VPMOVQD:VPMOVSQD:VPMOVUSQD.html

VPMOVSQW
Down Convert QWord to Word
./VPMOVQW:VPMOVSQW:VPMOVUSQW.html

VPMOVSWB
Down Convert Word to Byte
./VPMOVWB:VPMOVSWB:VPMOVUSWB.html

VPMOVUSDB
Down Convert DWord to Byte
./VPMOVDB:VPMOVSDB:VPMOVUSDB.html

VPMOVUSDW
Down Convert DWord to Word
./VPMOVDW:VPMOVSDW:VPMOVUSDW.html

VPMOVUSQB
Down Convert QWord to Byte
./VPMOVQB:VPMOVSQB:VPMOVUSQB.html

VPMOVUSQD
Down Convert QWord to DWord
./VPMOVQD:VPMOVSQD:VPMOVUSQD.html

VPMOVUSQW
Down Convert QWord to Word
./VPMOVQW:VPMOVSQW:VPMOVUSQW.html

VPMOVUSWB
Down Convert Word to Byte
./VPMOVWB:VPMOVSWB:VPMOVUSWB.html

VPMOVW2M
Convert a Vector Register to a Mask
./VPMOVB2M:VPMOVW2M:VPMOVD2M:VPMOVQ2M.html

VPMOVWB
Down Convert Word to Byte
./VPMOVWB:VPMOVSWB:VPMOVUSWB.html

VPMULTISHIFTQB
Select Packed Unaligned Bytes from Quadword Sources
./VPMULTISHIFTQB.html

VPROLD
Bit Rotate Left
./VPROLD:VPROLVD:VPROLQ:VPROLVQ.html

VPROLQ
Bit Rotate Left
./VPROLD:VPROLVD:VPROLQ:VPROLVQ.html

VPROLVD
Bit Rotate Left
./VPROLD:VPROLVD:VPROLQ:VPROLVQ.html

VPROLVQ
Bit Rotate Left
./VPROLD:VPROLVD:VPROLQ:VPROLVQ.html

VPRORD
Bit Rotate Right
./VPRORD:VPRORVD:VPRORQ:VPRORVQ.html

VPRORQ
Bit Rotate Right
./VPRORD:VPRORVD:VPRORQ:VPRORVQ.html

VPRORVD
Bit Rotate Right
./VPRORD:VPRORVD:VPRORQ:VPRORVQ.html

VPRORVQ
Bit Rotate Right
./VPRORD:VPRORVD:VPRORQ:VPRORVQ.html

VPSCATTERDD
Scatter Packed Dword, Packed Qword with Signed Dword, Signed Qword Indices
./VPSCATTERDD:VPSCATTERDQ:VPSCATTERQD:VPSCATTERQQ.html

VPSCATTERDQ
Scatter Packed Dword, Packed Qword with Signed Dword, Signed Qword Indices
./VPSCATTERDD:VPSCATTERDQ:VPSCATTERQD:VPSCATTERQQ.html

VPSCATTERQD
Scatter Packed Dword, Packed Qword with Signed Dword, Signed Qword Indices
./VPSCATTERDD:VPSCATTERDQ:VPSCATTERQD:VPSCATTERQQ.html

VPSCATTERQQ
Scatter Packed Dword, Packed Qword with Signed Dword, Signed Qword Indices
./VPSCATTERDD:VPSCATTERDQ:VPSCATTERQD:VPSCATTERQQ.html

VPSLLVD
Variable Bit Shift Left Logical
./VPSLLVW:VPSLLVD:VPSLLVQ.html

VPSLLVQ
Variable Bit Shift Left Logical
./VPSLLVW:VPSLLVD:VPSLLVQ.html

VPSLLVW
Variable Bit Shift Left Logical
./VPSLLVW:VPSLLVD:VPSLLVQ.html

VPSRAVD
Variable Bit Shift Right Arithmetic
./VPSRAVW:VPSRAVD:VPSRAVQ.html

VPSRAVQ
Variable Bit Shift Right Arithmetic
./VPSRAVW:VPSRAVD:VPSRAVQ.html

VPSRAVW
Variable Bit Shift Right Arithmetic
./VPSRAVW:VPSRAVD:VPSRAVQ.html

VPSRLVD
Variable Bit Shift Right Logical
./VPSRLVW:VPSRLVD:VPSRLVQ.html

VPSRLVQ
Variable Bit Shift Right Logical
./VPSRLVW:VPSRLVD:VPSRLVQ.html

VPSRLVW
Variable Bit Shift Right Logical
./VPSRLVW:VPSRLVD:VPSRLVQ.html

VPTERNLOGD
Bitwise Ternary Logic
./VPTERNLOGD:VPTERNLOGQ.html

VPTERNLOGQ
Bitwise Ternary Logic
./VPTERNLOGD:VPTERNLOGQ.html

VPTESTMB
Logical AND and Set Mask
./VPTESTMB:VPTESTMW:VPTESTMD:VPTESTMQ.html

VPTESTMD
Logical AND and Set Mask
./VPTESTMB:VPTESTMW:VPTESTMD:VPTESTMQ.html

VPTESTMQ
Logical AND and Set Mask
./VPTESTMB:VPTESTMW:VPTESTMD:VPTESTMQ.html

VPTESTMW
Logical AND and Set Mask
./VPTESTMB:VPTESTMW:VPTESTMD:VPTESTMQ.html

VPTESTNMB
Logical NAND and Set
./VPTESTNMB:VPTESTNMW:VPTESTNMD:VPTESTNMQ.html

VPTESTNMD
Logical NAND and Set
./VPTESTNMB:VPTESTNMW:VPTESTNMD:VPTESTNMQ.html

VPTESTNMQ
Logical NAND and Set
./VPTESTNMB:VPTESTNMW:VPTESTNMD:VPTESTNMQ.html

VPTESTNMW
Logical NAND and Set
./VPTESTNMB:VPTESTNMW:VPTESTNMD:VPTESTNMQ.html

VRANGEPD
Range Restriction Calculation For Packed Pairs of Float64 Values
./VRANGEPD.html

VRANGEPS
Range Restriction Calculation For Packed Pairs of Float32 Values
./VRANGEPS.html

VRANGESD
Range Restriction Calculation From a pair of Scalar Float64 Values
./VRANGESD.html

VRANGESS
Range Restriction Calculation From a Pair of Scalar Float32 Values
./VRANGESS.html

VRCP14PD
Compute Approximate Reciprocals of Packed Float64 Values
./VRCP14PD.html

VRCP14PS
Compute Approximate Reciprocals of Packed Float32 Values
./VRCP14PS.html

VRCP14SD
Compute Approximate Reciprocal of Scalar Float64 Value
./VRCP14SD.html

VRCP14SS
Compute Approximate Reciprocal of Scalar Float32 Value
./VRCP14SS.html

VREDUCEPD
Perform Reduction Transformation on Packed Float64 Values
./VREDUCEPD.html

VREDUCEPS
Perform Reduction Transformation on Packed Float32 Values
./VREDUCEPS.html

VREDUCESD
Perform a Reduction Transformation on a Scalar Float64 Value
./VREDUCESD.html

VREDUCESS
Perform a Reduction Transformation on a Scalar Float32 Value
./VREDUCESS.html

VRNDSCALEPD
Round Packed Float64 Values To Include A Given Number Of Fraction Bits
./VRNDSCALEPD.html

VRNDSCALEPS
Round Packed Float32 Values To Include A Given Number Of Fraction Bits
./VRNDSCALEPS.html

VRNDSCALESD
Round Scalar Float64 Value To Include A Given Number Of Fraction Bits
./VRNDSCALESD.html

VRNDSCALESS
Round Scalar Float32 Value To Include A Given Number Of Fraction Bits
./VRNDSCALESS.html

VRSQRT14PD
Compute Approximate Reciprocals of Square Roots of Packed Float64 Values
./VRSQRT14PD.html

VRSQRT14PS
Compute Approximate Reciprocals of Square Roots of Packed Float32 Values
./VRSQRT14PS.html

VRSQRT14SD
Compute Approximate Reciprocal of Square Root of Scalar Float64 Value
./VRSQRT14SD.html

VRSQRT14SS
Compute Approximate Reciprocal of Square Root of Scalar Float32 Value
./VRSQRT14SS.html

VSCALEFPD
Scale Packed Float64 Values With Float64 Values
./VSCALEFPD.html

VSCALEFPS
Scale Packed Float32 Values With Float32 Values
./VSCALEFPS.html

VSCALEFSD
Scale Scalar Float64 Values With Float64 Values
./VSCALEFSD.html

VSCALEFSS
Scale Scalar Float32 Value With Float32 Value
./VSCALEFSS.html

VSCATTERDPD
Scatter Packed Single, Packed Double with Signed Dword and Qword Indices
./VSCATTERDPS:VSCATTERDPD:VSCATTERQPS:VSCATTERQPD.html

VSCATTERDPS
Scatter Packed Single, Packed Double with Signed Dword and Qword Indices
./VSCATTERDPS:VSCATTERDPD:VSCATTERQPS:VSCATTERQPD.html

VSCATTERQPD
Scatter Packed Single, Packed Double with Signed Dword and Qword Indices
./VSCATTERDPS:VSCATTERDPD:VSCATTERQPS:VSCATTERQPD.html

VSCATTERQPS
Scatter Packed Single, Packed Double with Signed Dword and Qword Indices
./VSCATTERDPS:VSCATTERDPD:VSCATTERQPS:VSCATTERQPD.html

VSHUFF32x4
Shuffle Packed Values at 128-bit Granularity
./VSHUFF32x4:VSHUFF64x2:VSHUFI32x4:VSHUFI64x2.html

VSHUFF64x2
Shuffle Packed Values at 128-bit Granularity
./VSHUFF32x4:VSHUFF64x2:VSHUFI32x4:VSHUFI64x2.html

VSHUFI32x4
Shuffle Packed Values at 128-bit Granularity
./VSHUFF32x4:VSHUFF64x2:VSHUFI32x4:VSHUFI64x2.html

VSHUFI64x2
Shuffle Packed Values at 128-bit Granularity
./VSHUFF32x4:VSHUFF64x2:VSHUFI32x4:VSHUFI64x2.html

VTESTPD
Packed Bit Test
./VTESTPD:VTESTPS.html

VTESTPS
Packed Bit Test
./VTESTPD:VTESTPS.html

VZEROALL
Zero All YMM Registers
./VZEROALL.html

VZEROUPPER
Zero Upper Bits of YMM Registers
./VZEROUPPER.html

WAIT
Wait
./WAIT:FWAIT.html

WBINVD
Write Back and Invalidate Cache
./WBINVD.html

WRFSBASE
Write FS/GS Segment Base
./WRFSBASE:WRGSBASE.html

WRGSBASE
Write FS/GS Segment Base
./WRFSBASE:WRGSBASE.html

WRMSR
Write to Model Specific Register
./WRMSR.html

WRPKRU
Write Data to User Page Key Register
./WRPKRU.html

XABORT
Transactional Abort
./XABORT.html

XACQUIRE
Hardware Lock Elision Prefix Hints
./XACQUIRE:XRELEASE.html

XADD
Exchange and Add
./XADD.html

XBEGIN
Transactional Begin
./XBEGIN.html

XCHG
Exchange Register/Memory with Register
./XCHG.html

XEND
Transactional End
./XEND.html

XGETBV
Get Value of Extended Control Register
./XGETBV.html

XLAT
Table Look-up Translation
./XLAT:XLATB.html

XLATB
Table Look-up Translation
./XLAT:XLATB.html

XOR
Logical Exclusive OR
./XOR.html

XORPD
Bitwise Logical XOR of Packed Double Precision Floating-Point Values
./XORPD.html

XORPS
Bitwise Logical XOR of Packed Single Precision Floating-Point Values
./XORPS.html

XRELEASE
Hardware Lock Elision Prefix Hints
./XACQUIRE:XRELEASE.html

XRSTOR
Restore Processor Extended States
./XRSTOR.html

XRSTORS
Restore Processor Extended States Supervisor
./XRSTORS.html

XSAVE
Save Processor Extended States
./XSAVE.html

XSAVEC
Save Processor Extended States with Compaction
./XSAVEC.html

XSAVEOPT
Save Processor Extended States Optimized
./XSAVEOPT.html

XSAVES
Save Processor Extended States Supervisor
./XSAVES.html

XSETBV
Set Extended Control Register
./XSETBV.html

XTEST
Test If In Transactional Execution
./XTEST.html

EACCEPT
Accept Changes to an EPC Page
./EACCEPT.html

EACCEPTCOPY
Initialize a Pending Page
./EACCEPTCOPY.html

EADD
Add a Page to an Uninitialized Enclave
./EADD.html

EAUG
Add a Page to an Initialized Enclave
./EAUG.html

EBLOCK
Mark a page in EPC as Blocked
./EBLOCK.html

ECREATE
Create an SECS page in the Enclave Page Cache
./ECREATE.html

EDBGRD
Read From a Debug Enclave
./EDBGRD.html

EDBGWR
Write to a Debug Enclave
./EDBGWR.html

EDECVIRTCHILD
Decrement VIRTCHILDCNT in SECS
./EDECVIRTCHILD.html

EENTER
Enters an Enclave
./EENTER.html

EEXIT
Exits an Enclave
./EEXIT.html

EEXTEND
Extend Uninitialized Enclave Measurement by 256 Bytes
./EEXTEND.html

EGETKEY
Retrieves a Cryptographic Key
./EGETKEY.html

EINCVIRTCHILD
Increment VIRTCHILDCNT in SECS
./EINCVIRTCHILD.html

EINIT
Initialize an Enclave for Execution
./EINIT.html

ELBUC
Load an EPC Page and Mark its State
./ELDB:ELDU:ELDBC:ELBUC.html

ELDB
Load an EPC Page and Mark its State
./ELDB:ELDU:ELDBC:ELBUC.html

ELDBC
Load an EPC Page and Mark its State
./ELDB:ELDU:ELDBC:ELBUC.html

ELDU
Load an EPC Page and Mark its State
./ELDB:ELDU:ELDBC:ELBUC.html

EMODPE
Extend an EPC Page Permissions
./EMODPE.html

EMODPR
Restrict the Permissions of an EPC Page
./EMODPR.html

EMODT
Change the Type of an EPC Page
./EMODT.html

ENCLS
Execute an Enclave System Function of Specified Leaf Number
./ENCLS.html

ENCLU
Execute an Enclave User Function of Specified Leaf Number
./ENCLU.html

ENCLV
Execute an Enclave VMM Function of Specified Leaf Number
./ENCLV.html

EPA
Add Version Array
./EPA.html

ERDINFO
Read Type and Status Information About an EPC Page
./ERDINFO.html

EREMOVE
Remove a page from the EPC
./EREMOVE.html

EREPORT
Create a Cryptographic Report of the Enclave
./EREPORT.html

ERESUME
Re-Enters an Enclave
./ERESUME.html

ESETCONTEXT
Set the ENCLAVECONTEXT Field in SECS
./ESETCONTEXT.html

ETRACK
Activates EBLOCK Checks
./ETRACK.html

ETRACKC
Activates EBLOCK Checks
./ETRACKC.html

EWB
Invalidate an EPC Page and Write out to Main Memory
./EWB.html

INVEPT
Invalidate Translations Derived from EPT
./INVEPT.html

INVVPID
Invalidate Translations Based on VPID
./INVVPID.html

VMCALL
Call to VM Monitor
./VMCALL.html

VMCLEAR
Clear Virtual-Machine Control Structure
./VMCLEAR.html

VMFUNC
Invoke VM function
./VMFUNC.html

VMLAUNCH
Launch/Resume Virtual Machine
./VMLAUNCH:VMRESUME.html

VMPTRLD
Load Pointer to Virtual-Machine Control Structure
./VMPTRLD.html

VMPTRST
Store Pointer to Virtual-Machine Control Structure
./VMPTRST.html

VMREAD
Read Field from Virtual-Machine Control Structure
./VMREAD.html

VMRESUME
Launch/Resume Virtual Machine
./VMLAUNCH:VMRESUME.html

VMRESUME (1)
Resume Virtual Machine
./VMRESUME.html

VMWRITE
Write Field to Virtual-Machine Control Structure
./VMWRITE.html

VMXOFF
Leave VMX Operation
./VMXOFF.html

VMXON
Enter VMX Operation
./VMXON.html

PREFETCHWT1
Prefetch Vector Data Into Caches with Intent to Write and T1 Hint
./PREFETCHWT1.html

V4FMADDPS
Packed Single-Precision Floating-Point Fused Multiply-Add (4-iterations)
./V4FMADDPS:V4FNMADDPS.html

V4FMADDSS
Scalar Single-Precision Floating-Point Fused Multiply-Add (4-iterations)
./V4FMADDSS:V4FNMADDSS.html

V4FNMADDPS
Packed Single-Precision Floating-Point Fused Multiply-Add (4-iterations)
./V4FMADDPS:V4FNMADDPS.html

V4FNMADDSS
Scalar Single-Precision Floating-Point Fused Multiply-Add (4-iterations)
./V4FMADDSS:V4FNMADDSS.html

VEXP2PD
Approximation to the Exponential 2^x of Packed Double-Precision Floating-Point Values with Less Than 2^-23 Relative Error
./VEXP2PD.html

VEXP2PS
Approximation to the Exponential 2^x of Packed Single-Precision Floating-Point Values with Less Than 2^-23 Relative Error
./VEXP2PS.html

VGATHERPF0DPD
Sparse Prefetch Packed SP/DP Data Values with Signed Dword, Signed Qword Indices Using T0 Hint
./VGATHERPF0DPS:VGATHERPF0QPS:VGATHERPF0DPD:VGATHERPF0QPD.html

VGATHERPF0DPS
Sparse Prefetch Packed SP/DP Data Values with Signed Dword, Signed Qword Indices Using T0 Hint
./VGATHERPF0DPS:VGATHERPF0QPS:VGATHERPF0DPD:VGATHERPF0QPD.html

VGATHERPF0QPD
Sparse Prefetch Packed SP/DP Data Values with Signed Dword, Signed Qword Indices Using T0 Hint
./VGATHERPF0DPS:VGATHERPF0QPS:VGATHERPF0DPD:VGATHERPF0QPD.html

VGATHERPF0QPS
Sparse Prefetch Packed SP/DP Data Values with Signed Dword, Signed Qword Indices Using T0 Hint
./VGATHERPF0DPS:VGATHERPF0QPS:VGATHERPF0DPD:VGATHERPF0QPD.html

VGATHERPF1DPD
Sparse Prefetch Packed SP/DP Data Values with Signed Dword, Signed Qword Indices Using T1 Hint
./VGATHERPF1DPS:VGATHERPF1QPS:VGATHERPF1DPD:VGATHERPF1QPD.html

VGATHERPF1DPS
Sparse Prefetch Packed SP/DP Data Values with Signed Dword, Signed Qword Indices Using T1 Hint
./VGATHERPF1DPS:VGATHERPF1QPS:VGATHERPF1DPD:VGATHERPF1QPD.html

VGATHERPF1QPD
Sparse Prefetch Packed SP/DP Data Values with Signed Dword, Signed Qword Indices Using T1 Hint
./VGATHERPF1DPS:VGATHERPF1QPS:VGATHERPF1DPD:VGATHERPF1QPD.html

VGATHERPF1QPS
Sparse Prefetch Packed SP/DP Data Values with Signed Dword, Signed Qword Indices Using T1 Hint
./VGATHERPF1DPS:VGATHERPF1QPS:VGATHERPF1DPD:VGATHERPF1QPD.html

VP4DPWSSD
Dot Product of Signed Words with Dword Accumulation (4-iterations)
./VP4DPWSSD.html

VP4DPWSSDS
Dot Product of Signed Words with Dword Accumulation and Saturation (4-iterations)
./VP4DPWSSDS.html

VRCP28PD
Approximation to the Reciprocal of Packed Double-Precision Floating-Point Values with Less Than 2^-28 Relative Error
./VRCP28PD.html

VRCP28PS
Approximation to the Reciprocal of Packed Single-Precision Floating-Point Values with Less Than 2^-28 Relative Error
./VRCP28PS.html

VRCP28SD
Approximation to the Reciprocal of Scalar Double-Precision Floating-Point Value with Less Than 2^-28 Relative Error
./VRCP28SD.html

VRCP28SS
Approximation to the Reciprocal of Scalar Single-Precision Floating-Point Value with Less Than 2^-28 Relative Error
./VRCP28SS.html

VRSQRT28PD
Approximation to the Reciprocal Square Root of Packed Double-Precision Floating-Point Values with Less Than 2^-28 Relative Error
./VRSQRT28PD.html

VRSQRT28PS
Approximation to the Reciprocal Square Root of Packed Single-Precision Floating-Point Values with Less Than 2^-28 Relative Error
./VRSQRT28PS.html

VRSQRT28SD
Approximation to the Reciprocal Square Root of Scalar Double-Precision Floating-Point Value with Less Than 2^-28 Relative Error
./VRSQRT28SD.html

VRSQRT28SS
Approximation to the Reciprocal Square Root of Scalar Single-Precision Floating- Point Value with Less Than 2^-28 Relative Error
./VRSQRT28SS.html

VSCATTERPF0DPD
Sparse Prefetch Packed SP/DP Data Values with Signed Dword, Signed Qword Indices Using T0 Hint with Intent to Write
./VSCATTERPF0DPS:VSCATTERPF0QPS:VSCATTERPF0DPD:VSCATTERPF0QPD.html

VSCATTERPF0DPS
Sparse Prefetch Packed SP/DP Data Values with Signed Dword, Signed Qword Indices Using T0 Hint with Intent to Write
./VSCATTERPF0DPS:VSCATTERPF0QPS:VSCATTERPF0DPD:VSCATTERPF0QPD.html

VSCATTERPF0QPD
Sparse Prefetch Packed SP/DP Data Values with Signed Dword, Signed Qword Indices Using T0 Hint with Intent to Write
./VSCATTERPF0DPS:VSCATTERPF0QPS:VSCATTERPF0DPD:VSCATTERPF0QPD.html

VSCATTERPF0QPS
Sparse Prefetch Packed SP/DP Data Values with Signed Dword, Signed Qword Indices Using T0 Hint with Intent to Write
./VSCATTERPF0DPS:VSCATTERPF0QPS:VSCATTERPF0DPD:VSCATTERPF0QPD.html

VSCATTERPF1DPD
Sparse Prefetch Packed SP/DP Data Values with Signed Dword, Signed Qword Indices Using T1 Hint with Intent to Write
./VSCATTERPF1DPS:VSCATTERPF1QPS:VSCATTERPF1DPD:VSCATTERPF1QPD.html

VSCATTERPF1DPS
Sparse Prefetch Packed SP/DP Data Values with Signed Dword, Signed Qword Indices Using T1 Hint with Intent to Write
./VSCATTERPF1DPS:VSCATTERPF1QPS:VSCATTERPF1DPD:VSCATTERPF1QPD.html

VSCATTERPF1QPD
Sparse Prefetch Packed SP/DP Data Values with Signed Dword, Signed Qword Indices Using T1 Hint with Intent to Write
./VSCATTERPF1DPS:VSCATTERPF1QPS:VSCATTERPF1DPD:VSCATTERPF1QPD.html

VSCATTERPF1QPS
Sparse Prefetch Packed SP/DP Data Values with Signed Dword, Signed Qword Indices Using T1 Hint with Intent to Write
./VSCATTERPF1DPS:VSCATTERPF1QPS:VSCATTERPF1DPD:VSCATTERPF1QPD.html