Merge pull request #1831 from seijikun/mr-pci-device_paths

uefi: Add device path generation for discovered devices in a PciTree

Author: phip1611

uefi-test-runner/src/proto/pci/root_bridge.rs

@@ -1,9 +1,14 @@
 // SPDX-License-Identifier: MIT OR Apache-2.0
 
+use alloc::collections::btree_set::BTreeSet;
+use alloc::string::ToString;
 use uefi::Handle;
 use uefi::boot::{OpenProtocolAttributes, OpenProtocolParams, ScopedProtocol, image_handle};
 use uefi::proto::ProtocolPointer;
+use uefi::proto::device_path::DevicePath;
+use uefi::proto::device_path::text::{AllowShortcuts, DisplayOnly};
 use uefi::proto::pci::root_bridge::PciRootBridgeIo;
+use uefi::proto::scsi::pass_thru::ExtScsiPassThru;
 
 const RED_HAT_PCI_VENDOR_ID: u16 = 0x1AF4;
 const MASS_STORAGE_CTRL_CLASS_CODE: u8 = 0x1;
@@ -14,55 +19,73 @@ const REG_SIZE: u8 = size_of::<u32>() as u8;
 pub fn test() {
     let pci_handles = uefi::boot::find_handles::<PciRootBridgeIo>().unwrap();
 
+    let mut sata_ctrl_cnt = 0;
     let mut red_hat_dev_cnt = 0;
     let mut mass_storage_ctrl_cnt = 0;
-    let mut sata_ctrl_cnt = 0;
+    let mut mass_storage_dev_paths = BTreeSet::new();
 
     for pci_handle in pci_handles {
         let mut pci_proto = get_open_protocol::<PciRootBridgeIo>(pci_handle);
+        let root_device_path = get_open_protocol::<DevicePath>(pci_handle);
 
         let pci_tree = pci_proto.enumerate().unwrap();
         for addr in pci_tree.iter().cloned() {
-            let Ok(reg0) = pci_proto.pci().read_one::<u32>(addr.with_register(0)) else {
-                continue;
-            };
-            if reg0 == 0xFFFFFFFF {
-                continue; // not a valid device
-            }
+            let reg0 = pci_proto
+                .pci()
+                .read_one::<u32>(addr.with_register(0))
+                .unwrap();
             let reg1 = pci_proto
                 .pci()
                 .read_one::<u32>(addr.with_register(2 * REG_SIZE))
                 .unwrap();
 
             let vendor_id = (reg0 & 0xFFFF) as u16;
             let device_id = (reg0 >> 16) as u16;
+            let class_code = (reg1 >> 24) as u8;
+            let subclass_code = ((reg1 >> 16) & 0xFF) as u8;
+            let device_path = pci_tree.device_path(&root_device_path, addr).unwrap();
+            let device_path_str = device_path
+                .to_string(DisplayOnly(false), AllowShortcuts(false))
+                .unwrap()
+                .to_string();
+
             if vendor_id == RED_HAT_PCI_VENDOR_ID {
                 red_hat_dev_cnt += 1;
             }
-
-            let class_code = (reg1 >> 24) as u8;
-            let subclass_code = ((reg1 >> 16) & 0xFF) as u8;
             if class_code == MASS_STORAGE_CTRL_CLASS_CODE {
                 mass_storage_ctrl_cnt += 1;
-
                 if subclass_code == SATA_CTRL_SUBCLASS_CODE {
                     sata_ctrl_cnt += 1;
                 }
+                mass_storage_dev_paths.insert(device_path_str.clone());
             }
 
             let (bus, dev, fun) = (addr.bus, addr.dev, addr.fun);
             log::info!(
-                "PCI Device: [{bus:02x}, {dev:02x}, {fun:02x}]: vendor={vendor_id:04X}, device={device_id:04X}, class={class_code:02X}, subclass={subclass_code:02X}"
+                "PCI Device: [{bus:02x}, {dev:02x}, {fun:02x}]: vendor={vendor_id:04X}, device={device_id:04X}, class={class_code:02X}, subclass={subclass_code:02X} - {}",
+                device_path_str
             );
             for child_bus in pci_tree.child_bus_of_iter(addr) {
-                log::info!(" |- Bus: {child_bus:02x}");
+                log::info!(" \\- Bus: {child_bus:02x}");
             }
         }
     }
 
+    assert!(sata_ctrl_cnt > 0);
     assert!(red_hat_dev_cnt > 0);
     assert!(mass_storage_ctrl_cnt > 0);
-    assert!(sata_ctrl_cnt > 0);
+    assert_eq!(mass_storage_ctrl_cnt, mass_storage_dev_paths.len());
+
+    // Check that all `ExtScsiPassThru` instances' device paths have been found
+    let scsi_handles = uefi::boot::find_handles::<ExtScsiPassThru>().unwrap();
+    for scsi_handle in scsi_handles {
+        let device_path = get_open_protocol::<DevicePath>(scsi_handle);
+        let device_path = device_path
+            .to_string(DisplayOnly(false), AllowShortcuts(false))
+            .unwrap()
+            .to_string();
+        assert!(mass_storage_dev_paths.contains(&device_path));
+    }
 }
 
 fn get_open_protocol<P: ProtocolPointer + ?Sized>(handle: Handle) -> ScopedProtocol<P> {

uefi/CHANGELOG.md

@@ -7,6 +7,9 @@
 - Added `proto::pci::root_bridge::PciRootBridgeIo::enumerate()`.
 - Added `proto::nvme::pass_thru::NvmePassThru::broadcast()`.
 - Added `proto::media::block::BlockIO2`.
+- Added `proto::device_path::DevicePath::to_pool()`.
+- Added `proto::device_path::DevicePathUtilities::duplicate_path()`.
+- Added `proto::pci::enumeration::PciTree::device_path()`.
 
 ## Changed
 - export all `text::{input, output}::*` types

uefi/src/proto/device_path/mod.rs

@@ -590,6 +590,14 @@ impl DevicePath {
         unsafe { mem::transmute(data) }
     }
 
+    /// Returns an owned pool copy of this path.
+    #[cfg(feature = "alloc")]
+    pub fn to_pool(&self) -> Result<PoolDevicePath, DevicePathUtilitiesError> {
+        open_utility_protocol()?
+            .duplicate_path(self)
+            .map_err(|_| DevicePathUtilitiesError::OutOfMemory)
+    }
+
     /// Transforms the device path to its string representation using the
     /// [`DevicePathToText`] protocol.
     #[cfg(feature = "alloc")]

uefi/src/proto/device_path/util.rs

@@ -29,6 +29,22 @@ impl DevicePathUtilities {
         unsafe { (self.0.get_device_path_size)(device_path.as_ffi_ptr().cast()) }
     }
 
+    /// Create a new device path by cloning the given `path` into newly allocated memory.
+    ///
+    /// # Arguments
+    /// - `path`: A reference to the device path to clone.
+    ///
+    /// # Returns
+    /// A [`PoolDevicePath`] instance created by cloning the given `path`.
+    pub fn duplicate_path(&self, path: &DevicePath) -> crate::Result<PoolDevicePath> {
+        unsafe {
+            let ptr = (self.0.duplicate_device_path)(path.as_ffi_ptr().cast());
+            NonNull::new(ptr.cast_mut())
+                .map(|p| PoolDevicePath(PoolAllocation::new(p.cast())))
+                .ok_or_else(|| Status::OUT_OF_RESOURCES.into())
+        }
+    }
+
     /// Creates a new device path by appending the second device path to the first.
     ///
     /// # Arguments

uefi/src/proto/pci/enumeration.rs

@@ -2,10 +2,15 @@
 
 //! PCI Bus device function and bridge enumeration.
 
-use core::mem;
+use core::fmt::{Display, Formatter};
+use core::mem::{self, MaybeUninit};
 
 use alloc::collections::btree_map::BTreeMap;
 use alloc::collections::btree_set::{self, BTreeSet};
+use alloc::fmt;
+
+use crate::proto::device_path::build::{BuildError, DevicePathBuilder};
+use crate::proto::device_path::{self, DevicePath, DevicePathUtilitiesError, PoolDevicePath};
 
 use super::PciIoAddress;
 use super::root_bridge::PciRootBridgeIo;
@@ -58,6 +63,45 @@ fn read_device_register_u32<T: Sized + Copy>(
 
 // ##########################################################################################
 
+/// Error type used by the device path construction of [`PciTree`].
+#[derive(Debug)]
+pub enum PciDevicePathBuildError {
+    /// The given [`PciIoAddress`] was invalid or not path of the enumeration.
+    InvalidAddress,
+    /// Error while constructing the pci device DevicePath.
+    PathBuildError(BuildError),
+    /// Error while
+    DevicePathUtilitiesError(DevicePathUtilitiesError),
+}
+impl From<BuildError> for PciDevicePathBuildError {
+    fn from(value: BuildError) -> Self {
+        Self::PathBuildError(value)
+    }
+}
+impl From<DevicePathUtilitiesError> for PciDevicePathBuildError {
+    fn from(value: DevicePathUtilitiesError) -> Self {
+        Self::DevicePathUtilitiesError(value)
+    }
+}
+
+impl Display for PciDevicePathBuildError {
+    fn fmt(&self, f: &mut Formatter<'_>) -> fmt::Result {
+        write!(f, "{self:?}")
+    }
+}
+
+impl core::error::Error for PciDevicePathBuildError {
+    fn source(&self) -> Option<&(dyn core::error::Error + 'static)> {
+        match self {
+            Self::PathBuildError(e) => Some(e),
+            Self::DevicePathUtilitiesError(e) => Some(e),
+            _ => None,
+        }
+    }
+}
+
+// ------------------------------------------------------------------------------------------
+
 /// Struct representing the tree structure of PCI devices.
 ///
 /// This allows iterating over all valid PCI device addresses in a tree, as well as querying
@@ -125,6 +169,54 @@ impl PciTree {
             .map(|(bus, _)| bus)
             .cloned()
     }
+
+    /// Construct a device path for the given PCI `addr` and append it to the given `root_path`.
+    ///
+    /// # Arguments
+    /// - `root_path`: The [`DevicePath`] instance corresponding to the [`PciRootBridgeIo`] instance that
+    ///   produced this [`PciTree`]. This path is prepended to the generated device paths.
+    /// - `addr`: [`PciIoAddress`] of the device
+    pub fn device_path(
+        &self,
+        root_path: &DevicePath,
+        addr: PciIoAddress,
+    ) -> Result<PoolDevicePath, PciDevicePathBuildError> {
+        use device_path::build;
+
+        if !self.devices.contains(&addr) {
+            return Err(PciDevicePathBuildError::InvalidAddress);
+        }
+
+        // A PCI [`DevicePath`] can have max. 255 PCI segments, each of which is 6 bytes in size.
+        // These are prepended by the given `root_path`. A construction buffer of 2048 bytes
+        // should thus suffice for all realistic scenarios.
+        let mut bfr = [MaybeUninit::uninit(); 2048];
+        let mut builder = DevicePathBuilder::with_buf(&mut bfr);
+        for node in root_path.node_iter() {
+            builder = builder.push(&node)?;
+        }
+
+        // A pci device path is built by appending segments of `dev` and `fun` address byte pairs
+        // starting from a pci root bus to the specified address. Since the child <-> parent
+        // relationship is stored from child to parent, we start at the address and recurse back
+        // to the parent for path generation.
+        fn inner<'a>(
+            root: &PciTree,
+            mut builder: DevicePathBuilder<'a>,
+            addr: PciIoAddress,
+        ) -> Result<DevicePathBuilder<'a>, BuildError> {
+            if let Some(parent) = root.parent_for(addr) {
+                builder = inner(root, builder, parent)?;
+            }
+            builder.push(&build::hardware::Pci {
+                function: addr.fun,
+                device: addr.dev,
+            })
+        }
+
+        builder = inner(self, builder, addr)?;
+        Ok(builder.finalize()?.to_pool()?)
+    }
 }
 impl IntoIterator for PciTree {
     type Item = PciIoAddress;