Summary
Build the mips64eb (and mips64el) IGLOO/Penguin kernel without CONFIG_CPU_CAVIUM_OCTEON — i.e. a device-generic mips64 kernel. The current 6.13 mips64eb kernel is built with it, which makes it hang silently when run on an Octeon CPU model under the generic malta machine. The 4.10 mips64eb kernel (built without it) boots Octeon CPUs fine.
Why (root cause, source-confirmed)
Penguin runs mips64 guests on the QEMU malta machine. To rehost real Cavium Octeon firmware (EdgeRouter / UniFi / OpenWrt-octeon, whose userland uses Octeon ISA extensions), the CPU model must be Octeon68XX so those instructions decode. But:
- A kernel built with
CONFIG_CPU_CAVIUM_OCTEON compiles arch/mips/mm/c-octeon.c. At boot, cpu_cache_init() detects the Cavium Octeon CPU and dispatches cache setup to octeon_cache_init(), which touches Octeon SoC-only facilities — custom CP0 regs read/write_octeon_c0_icacheerr/dcacheerr, cvmx_get_core_num(), and installs the except_vec2_octeon cache-error vector. The Octeon68XX CPU model emulates Octeon instructions but not the Octeon SoC, and there is no Octeon machine in the qemu fork (hw/mips/ is malta/boston/jazz/fuloong2e/loongson3/cps). This runs in setup_arch before earlycon, so the guest hangs with zero console output.
- A kernel built without
CONFIG_CPU_CAVIUM_OCTEON routes the Octeon CPU through generic r4k_cache_init() (standard MIPS64r2 cache ops the CPU model supports) and boots, treating Octeon as a MIPS64r2 superset.
Evidence
- Two mips64eb kernels in the image:
/igloo_static/kernels/4.10/vmlinux.mips64eb (no octeon_cache symbol) and /igloo_static/kernels/6.13/vmlinux.mips64eb (has octeon_cache = octeon_cache_init).
- Real OpenWrt-octeon firmware (Cavium Octeon II, n64) under
core.cpu: Octeon68XX:
- 6.13 kernel → silent console, 0 output (hang in octeon cache init).
- 4.10 kernel → boots (
CPU0 ... Cavium Octeon II, machine is mti,malta), 0 SIGILL/panic, binds dropbear:22 / uhttpd:80,443 / dnsmasq:53.
- Full writeup: rehosting/rehostings#74.
Ask
Add # CONFIG_CPU_CAVIUM_OCTEON is not set to the mips64eb (and mips64el) kernel config so the shipped mips64 kernel is device-generic and boots any mips64 CPU model (incl. Octeon68XX) via the generic cache path. (Octeon-native cache perf is irrelevant under emulation; correctness/booting matters.) Pairs with the Penguin-side CPU-model auto-selection (rehosting/penguin issue).
Summary
Build the mips64eb (and mips64el) IGLOO/Penguin kernel without
CONFIG_CPU_CAVIUM_OCTEON— i.e. a device-generic mips64 kernel. The current 6.13 mips64eb kernel is built with it, which makes it hang silently when run on an Octeon CPU model under the genericmaltamachine. The 4.10 mips64eb kernel (built without it) boots Octeon CPUs fine.Why (root cause, source-confirmed)
Penguin runs mips64 guests on the QEMU
maltamachine. To rehost real Cavium Octeon firmware (EdgeRouter / UniFi / OpenWrt-octeon, whose userland uses Octeon ISA extensions), the CPU model must beOcteon68XXso those instructions decode. But:CONFIG_CPU_CAVIUM_OCTEONcompilesarch/mips/mm/c-octeon.c. At boot,cpu_cache_init()detects the Cavium Octeon CPU and dispatches cache setup toocteon_cache_init(), which touches Octeon SoC-only facilities — custom CP0 regsread/write_octeon_c0_icacheerr/dcacheerr,cvmx_get_core_num(), and installs theexcept_vec2_octeoncache-error vector. TheOcteon68XXCPU model emulates Octeon instructions but not the Octeon SoC, and there is no Octeon machine in the qemu fork (hw/mips/is malta/boston/jazz/fuloong2e/loongson3/cps). This runs insetup_archbefore earlycon, so the guest hangs with zero console output.CONFIG_CPU_CAVIUM_OCTEONroutes the Octeon CPU through genericr4k_cache_init()(standard MIPS64r2 cache ops the CPU model supports) and boots, treating Octeon as a MIPS64r2 superset.Evidence
/igloo_static/kernels/4.10/vmlinux.mips64eb(noocteon_cachesymbol) and/igloo_static/kernels/6.13/vmlinux.mips64eb(hasocteon_cache=octeon_cache_init).core.cpu: Octeon68XX:CPU0 ... Cavium Octeon II,machine is mti,malta), 0 SIGILL/panic, binds dropbear:22 / uhttpd:80,443 / dnsmasq:53.Ask
Add
# CONFIG_CPU_CAVIUM_OCTEON is not setto the mips64eb (and mips64el) kernel config so the shipped mips64 kernel is device-generic and boots any mips64 CPU model (incl.Octeon68XX) via the generic cache path. (Octeon-native cache perf is irrelevant under emulation; correctness/booting matters.) Pairs with the Penguin-side CPU-model auto-selection (rehosting/penguin issue).