From 500a48a9588a9c39722e6c9d57681753f5c2cb9c Mon Sep 17 00:00:00 2001 From: Frank Barchard Date: Tue, 28 Apr 2026 14:02:11 -0700 Subject: [PATCH 1/3] Add Apple M1/M2 Linux MIDR detection Fixes #380 by adding cpuinfo_arm_decode_vendor_uarch logic for Apple's implementer 'a' (0x61). --- src/arm/uarch.c | 29 +++++++++++++++++++++++++++++ 1 file changed, 29 insertions(+) diff --git a/src/arm/uarch.c b/src/arm/uarch.c index aab10010..7164b907 100644 --- a/src/arm/uarch.c +++ b/src/arm/uarch.c @@ -438,6 +438,35 @@ void cpuinfo_arm_decode_vendor_uarch( midr_get_part(midr)); } break; + case 'a': + *vendor = cpuinfo_vendor_apple; + switch (midr_get_part(midr)) { + case 0x022: + case 0x024: + case 0x028: + *uarch = cpuinfo_uarch_icestorm; + break; + case 0x023: + case 0x025: + case 0x029: + *uarch = cpuinfo_uarch_firestorm; + break; + case 0x032: + case 0x034: + case 0x038: + *uarch = cpuinfo_uarch_blizzard; + break; + case 0x033: + case 0x035: + case 0x039: + *uarch = cpuinfo_uarch_avalanche; + break; + default: + cpuinfo_log_warning( + "unknown Apple CPU part 0x%03" PRIx32 " ignored", + midr_get_part(midr)); + } + break; #if CPUINFO_ARCH_ARM case 'V': *vendor = cpuinfo_vendor_marvell; From de34b0da2791a70c0597d505e7cf0164950f5a7b Mon Sep 17 00:00:00 2001 From: Frank Barchard Date: Tue, 28 Apr 2026 14:30:10 -0700 Subject: [PATCH 2/3] Add Apple M3/M4 Linux MIDR detection --- src/arm/uarch.c | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/src/arm/uarch.c b/src/arm/uarch.c index 7164b907..c76a0e5e 100644 --- a/src/arm/uarch.c +++ b/src/arm/uarch.c @@ -461,6 +461,22 @@ void cpuinfo_arm_decode_vendor_uarch( case 0x039: *uarch = cpuinfo_uarch_avalanche; break; + case 0x042: + case 0x044: + case 0x048: + *uarch = cpuinfo_uarch_coll_sawtooth; + break; + case 0x043: + case 0x045: + case 0x049: + *uarch = cpuinfo_uarch_coll_everest; + break; + case 0x052: + *uarch = cpuinfo_uarch_donan_sawtooth; + break; + case 0x053: + *uarch = cpuinfo_uarch_donan_everest; + break; default: cpuinfo_log_warning( "unknown Apple CPU part 0x%03" PRIx32 " ignored", From f5a589d0b3c011c6961dcbc12d15a4e9980d0475 Mon Sep 17 00:00:00 2001 From: Frank Barchard Date: Tue, 26 May 2026 13:35:05 -0700 Subject: [PATCH 3/3] style: format src/arm/uarch.c with clang-format --- src/arm/uarch.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/src/arm/uarch.c b/src/arm/uarch.c index c76a0e5e..1301eefb 100644 --- a/src/arm/uarch.c +++ b/src/arm/uarch.c @@ -479,8 +479,7 @@ void cpuinfo_arm_decode_vendor_uarch( break; default: cpuinfo_log_warning( - "unknown Apple CPU part 0x%03" PRIx32 " ignored", - midr_get_part(midr)); + "unknown Apple CPU part 0x%03" PRIx32 " ignored", midr_get_part(midr)); } break; #if CPUINFO_ARCH_ARM