diff --git a/hw/top_chip/ip_autogen/alert_handler/dv/alert_handler_sim_cfg.hjson b/hw/top_chip/ip_autogen/alert_handler/dv/alert_handler_sim_cfg.hjson index aa3b03b63..93cdc6999 100644 --- a/hw/top_chip/ip_autogen/alert_handler/dv/alert_handler_sim_cfg.hjson +++ b/hw/top_chip/ip_autogen/alert_handler/dv/alert_handler_sim_cfg.hjson @@ -40,7 +40,7 @@ "sec_cm_prim_onehot_check_bind"] // Default iterations for all tests - each test entry can override this. - reseed: 50 + reseed: 10 overrides: [ { @@ -72,45 +72,53 @@ { name: alert_handler_random_classes uvm_test_seq: alert_handler_random_classes_vseq + reseed: 50 } { name: alert_handler_esc_intr_timeout uvm_test_seq: alert_handler_esc_intr_timeout_vseq + reseed: 50 } { name: alert_handler_esc_alert_accum uvm_test_seq: alert_handler_esc_alert_accum_vseq + reseed: 25 } { name: alert_handler_sig_int_fail uvm_test_seq: alert_handler_sig_int_fail_vseq + reseed: 50 } { name: alert_handler_entropy uvm_test_seq: alert_handler_entropy_vseq run_opts: ["+test_timeout_ns=1_000_000_000"] + reseed: 25 } { name: alert_handler_ping_timeout uvm_test_seq: alert_handler_ping_timeout_vseq run_opts: ["+test_timeout_ns=1_000_000_000"] + reseed: 50 } { name: alert_handler_lpg uvm_test_seq: alert_handler_lpg_vseq run_opts: ["+test_timeout_ns=1_000_000_000"] + reseed: 50 } { name: alert_handler_lpg_stub_clk uvm_test_seq: alert_handler_lpg_stub_clk_vseq run_opts: ["+test_timeout_ns=1_000_000_000"] + reseed: 50 } { @@ -125,6 +133,7 @@ { name: alert_handler_stress_all run_opts: ["+test_timeout_ns=15_000_000_000"] + reseed: 50 } { diff --git a/hw/top_chip/ip_autogen/alert_handler/dv/env/alert_handler_env.core b/hw/top_chip/ip_autogen/alert_handler/dv/env/alert_handler_env.core index 2cd2d01fc..daf1a3649 100644 --- a/hw/top_chip/ip_autogen/alert_handler/dv/env/alert_handler_env.core +++ b/hw/top_chip/ip_autogen/alert_handler/dv/env/alert_handler_env.core @@ -51,4 +51,4 @@ targets: filesets: - files_dv generate: - - ral + - "!chip_level ? (ral)" diff --git a/hw/top_chip/ip_autogen/clkmgr/dv/clkmgr_sim_cfg.hjson b/hw/top_chip/ip_autogen/clkmgr/dv/clkmgr_sim_cfg.hjson index 88395d721..879070e50 100644 --- a/hw/top_chip/ip_autogen/clkmgr/dv/clkmgr_sim_cfg.hjson +++ b/hw/top_chip/ip_autogen/clkmgr/dv/clkmgr_sim_cfg.hjson @@ -42,7 +42,7 @@ "sec_cm_prim_onehot_check_bind"] // Default iterations for all tests - each test entry can override this. - reseed: 50 + reseed: 10 // CLKMGR exclusion files. vcs_cov_excl_files: ["{self_dir}/cov/clkmgr_cov_manual_excl.el", diff --git a/hw/top_chip/ip_autogen/clkmgr/dv/env/clkmgr_env.core b/hw/top_chip/ip_autogen/clkmgr/dv/env/clkmgr_env.core index ef32e0bd6..034d79ac5 100644 --- a/hw/top_chip/ip_autogen/clkmgr/dv/env/clkmgr_env.core +++ b/hw/top_chip/ip_autogen/clkmgr/dv/env/clkmgr_env.core @@ -47,4 +47,4 @@ targets: filesets: - files_dv generate: - - ral + - "!chip_level ? (ral)" diff --git a/hw/top_chip/ip_autogen/gpio/dv/env/gpio_env.core b/hw/top_chip/ip_autogen/gpio/dv/env/gpio_env.core index 3162ed924..acd0eb5e2 100644 --- a/hw/top_chip/ip_autogen/gpio/dv/env/gpio_env.core +++ b/hw/top_chip/ip_autogen/gpio/dv/env/gpio_env.core @@ -45,4 +45,4 @@ targets: filesets: - files_dv generate: - - ral + - "!chip_level ? (ral)" diff --git a/hw/top_chip/ip_autogen/gpio/dv/gpio_sim_cfg.hjson b/hw/top_chip/ip_autogen/gpio/dv/gpio_sim_cfg.hjson index 86eb02ac6..80a3403be 100644 --- a/hw/top_chip/ip_autogen/gpio/dv/gpio_sim_cfg.hjson +++ b/hw/top_chip/ip_autogen/gpio/dv/gpio_sim_cfg.hjson @@ -39,7 +39,7 @@ sim_tops: ["gpio_bind", "sec_cm_prim_onehot_check_bind"] // Default iterations for all tests - each test entry can override this. - reseed: 50 + reseed: 10 // Default UVM test and seq class name. uvm_test: gpio_base_test diff --git a/hw/top_chip/ip_autogen/pwrmgr/dv/env/pwrmgr_env.core b/hw/top_chip/ip_autogen/pwrmgr/dv/env/pwrmgr_env.core index 6dd0d5503..539788480 100644 --- a/hw/top_chip/ip_autogen/pwrmgr/dv/env/pwrmgr_env.core +++ b/hw/top_chip/ip_autogen/pwrmgr/dv/env/pwrmgr_env.core @@ -55,4 +55,4 @@ targets: filesets: - files_dv generate: - - ral + - "!chip_level ? (ral)" diff --git a/hw/top_chip/ip_autogen/pwrmgr/dv/env/seq_lib/pwrmgr_glitch_vseq.sv b/hw/top_chip/ip_autogen/pwrmgr/dv/env/seq_lib/pwrmgr_glitch_vseq.sv index 1a21ff7d3..3162ac81f 100644 --- a/hw/top_chip/ip_autogen/pwrmgr/dv/env/seq_lib/pwrmgr_glitch_vseq.sv +++ b/hw/top_chip/ip_autogen/pwrmgr/dv/env/seq_lib/pwrmgr_glitch_vseq.sv @@ -30,11 +30,11 @@ class pwrmgr_glitch_vseq extends pwrmgr_base_vseq; cfg.clk_rst_vif.wait_clks(cycles_before_reset); `DV_SPINWAIT(wait(cfg.pwrmgr_vif.fast_state == pwrmgr_pkg::FastPwrStateResetPrep && - cfg.pwrmgr_vif.pwr_rst_req.rstreqs[pwrmgr_reg_pkg::ResetMainPwrIdx] == 1);, $sformatf( - "checker timeout : fast_state %s, pwr_rst_req 0x%x", - cfg.pwrmgr_vif.fast_state.name, - cfg.pwrmgr_vif.pwr_rst_req.rstreqs - ), 10000) + cfg.pwrmgr_vif.pwr_rst_req.rstreqs[pwrmgr_reg_pkg::ResetMainPwrIdx] == 1);, + $sformatf("checker timeout : fast_state %s, pwr_rst_req 0x%x", + cfg.pwrmgr_vif.fast_state.name, + cfg.pwrmgr_vif.pwr_rst_req.rstreqs[pwrmgr_reg_pkg::ResetMainPwrIdx]), + 10000) dut_init(); end diff --git a/hw/top_chip/ip_autogen/pwrmgr/dv/env/seq_lib/pwrmgr_repeat_wakeup_reset_vseq.sv b/hw/top_chip/ip_autogen/pwrmgr/dv/env/seq_lib/pwrmgr_repeat_wakeup_reset_vseq.sv index 894574879..755fe881c 100644 --- a/hw/top_chip/ip_autogen/pwrmgr/dv/env/seq_lib/pwrmgr_repeat_wakeup_reset_vseq.sv +++ b/hw/top_chip/ip_autogen/pwrmgr/dv/env/seq_lib/pwrmgr_repeat_wakeup_reset_vseq.sv @@ -11,9 +11,6 @@ class pwrmgr_repeat_wakeup_reset_vseq extends pwrmgr_wakeup_reset_vseq; bit [lc_ctrl_pkg::TxWidth-1:0] bad_lc_tx; - int cycles_from_reset; - int micros_to_release; - bit super_sequence_done; task body(); @@ -27,38 +24,58 @@ class pwrmgr_repeat_wakeup_reset_vseq extends pwrmgr_wakeup_reset_vseq; super.body(); super_sequence_done = 1; end - drv_stim(mubi_mode); + drv_stim(); join endtask : body - task drv_stim(pwrmgr_mubi_e mubi_mode); - if (mubi_mode == PwrmgrMubiLcCtrl) drv_lc_ctrl(); - endtask : drv_stim - - task drv_lc_ctrl(); - int delay; - - `DV_CHECK_STD_RANDOMIZE_WITH_FATAL(cycles_from_reset, cycles_from_reset inside {[2 : 8]};) - `DV_CHECK_STD_RANDOMIZE_WITH_FATAL(micros_to_release, micros_to_release inside {[2 : 4]};) + task drv_stim(); + int unsigned cycles_from_reset = $urandom_range(2, 8); + int unsigned micros_to_release = $urandom_range(2, 4); repeat (50) begin : repeat_50 wait(cfg.esc_clk_rst_vif.rst_n); cfg.clk_rst_vif.wait_clks(cycles_from_reset); - if (super_sequence_done) begin - `uvm_info(`gfn, "Break from drv_lc_ctrl", UVM_MEDIUM) - break; - end - `uvm_info(`gfn, "Injection to lc_hw_debug_en", UVM_MEDIUM) - cfg.pwrmgr_vif.lc_hw_debug_en = get_rand_lc_tx_val( - .t_weight(1), .f_weight(1), .other_weight(2) - ); + if (super_sequence_done) break; + + drive_inputs(1); #(micros_to_release * 1us); - `uvm_info(`gfn, "Injection to lc_dft_en", UVM_MEDIUM) if (super_sequence_done) break; - cfg.pwrmgr_vif.lc_dft_en = get_rand_lc_tx_val(.t_weight(1), .f_weight(1), .other_weight(2)); + + drive_inputs(0); #(micros_to_release * 1us); end : repeat_50 - `uvm_info(`gfn, "ended drv_lc_ctrl", UVM_MEDIUM) - endtask : drv_lc_ctrl + `uvm_info(`gfn, "ended drv_stim", UVM_MEDIUM) + endtask : drv_stim + + task drive_inputs(bit phase0); + case (mubi_mode) + PwrmgrMubiLcCtrl: drive_lc_ctrl_inputs(phase0); + PwrmgrMubiRomCtrl: drive_rom_ctrl_inputs(phase0); + default: `uvm_fatal(get_full_name(), $sformatf("Unknown mubi_mode: %s", mubi_mode.name())) + endcase + endtask : drive_inputs + + task drive_rom_ctrl_inputs(bit phase0); + if (phase0) begin + for (int r = 0; r < NumRomInputs; r++) begin + mubi4_t rand_done = get_rand_mubi4_val(.t_weight(1), .f_weight(1), .other_weight(2)); + mubi4_t rand_good = get_rand_mubi4_val(.t_weight(1), .f_weight(1), .other_weight(2)); + `uvm_info(`gfn, $sformatf("Injection to rom_ctrl[%0d]", r), UVM_MEDIUM) + cfg.pwrmgr_vif.update_rom_ctrl('{done: rand_done, good: rand_good}, r); + end + end else begin + update_roms_response(.done(MuBi4True), .good(MuBi4True)); + end + endtask : drive_rom_ctrl_inputs + + task drive_lc_ctrl_inputs(bit phase0); + if (phase0) begin + cfg.pwrmgr_vif.lc_hw_debug_en = get_rand_lc_tx_val(.t_weight(1), + .f_weight(1), + .other_weight(2)); + end else begin + cfg.pwrmgr_vif.lc_dft_en = get_rand_lc_tx_val(.t_weight(1), .f_weight(1), .other_weight(2)); + end + endtask : drive_lc_ctrl_inputs endclass : pwrmgr_repeat_wakeup_reset_vseq diff --git a/hw/top_chip/ip_autogen/pwrmgr/dv/pwrmgr_sim_cfg.hjson b/hw/top_chip/ip_autogen/pwrmgr/dv/pwrmgr_sim_cfg.hjson index b010b1589..2ca87f80e 100644 --- a/hw/top_chip/ip_autogen/pwrmgr/dv/pwrmgr_sim_cfg.hjson +++ b/hw/top_chip/ip_autogen/pwrmgr/dv/pwrmgr_sim_cfg.hjson @@ -51,7 +51,7 @@ "sec_cm_prim_onehot_check_bind"] // Default iterations for all tests - each test entry can override this. - reseed: 50 + reseed: 10 // Default UVM test and seq class name. uvm_test: pwrmgr_base_test @@ -87,6 +87,11 @@ uvm_test_seq: pwrmgr_wakeup_reset_vseq run_opts: ["+test_timeout_ns=1000000"] } + { + name: pwrmgr_repeat_wakeup_reset + uvm_test_seq: pwrmgr_repeat_wakeup_reset_vseq + run_opts: ["+test_timeout_ns=4000000", "+pwrmgr_mubi_mode=PwrmgrMubiRomCtrl"] + } { name: pwrmgr_aborted_low_power uvm_test_seq: pwrmgr_aborted_low_power_vseq diff --git a/hw/top_chip/ip_autogen/rstmgr/dv/env/rstmgr_env.core b/hw/top_chip/ip_autogen/rstmgr/dv/env/rstmgr_env.core index 53d33f293..72145cb39 100644 --- a/hw/top_chip/ip_autogen/rstmgr/dv/env/rstmgr_env.core +++ b/hw/top_chip/ip_autogen/rstmgr/dv/env/rstmgr_env.core @@ -52,4 +52,4 @@ targets: - files_dv - files_rtl generate: - - ral + - "!chip_level ? (ral)" diff --git a/hw/top_chip/ip_autogen/rstmgr/dv/rstmgr_sim_cfg.hjson b/hw/top_chip/ip_autogen/rstmgr/dv/rstmgr_sim_cfg.hjson index b9ebabb79..0183e5d45 100644 --- a/hw/top_chip/ip_autogen/rstmgr/dv/rstmgr_sim_cfg.hjson +++ b/hw/top_chip/ip_autogen/rstmgr/dv/rstmgr_sim_cfg.hjson @@ -54,7 +54,7 @@ "sec_cm_prim_onehot_check_bind"] // Default iterations for all tests - each test entry can override this. - reseed: 50 + reseed: 5 // Default UVM test and seq class name. uvm_test: rstmgr_base_test @@ -92,6 +92,7 @@ { name: rstmgr_leaf_rst_cnsty uvm_test_seq: rstmgr_leaf_rst_cnsty_vseq + reseed: 25 } { name: rstmgr_leaf_rst_shadow_attack diff --git a/hw/top_chip/tmp_sim_cfg/rv_dm_base_sim_cfg.hjson b/hw/top_chip/tmp_sim_cfg/rv_dm_base_sim_cfg.hjson index 84a28a1ac..45ec29109 100644 --- a/hw/top_chip/tmp_sim_cfg/rv_dm_base_sim_cfg.hjson +++ b/hw/top_chip/tmp_sim_cfg/rv_dm_base_sim_cfg.hjson @@ -83,7 +83,6 @@ build_mode: "cover_reg_top" run_opts: ["+csr_aliasing"] en_run_modes: ["csr_tests_mode"] - reseed: 5 run_opts: ["+test_timeout_ns=100_000_000"] } { diff --git a/hw/vendor/lowrisc_ip.vendor.hjson b/hw/vendor/lowrisc_ip.vendor.hjson index ab4be353e..cbc76cf3b 100644 --- a/hw/vendor/lowrisc_ip.vendor.hjson +++ b/hw/vendor/lowrisc_ip.vendor.hjson @@ -1,6 +1,12 @@ // Copyright lowRISC contributors. // Licensed under the Apache License, Version 2.0, see LICENSE for details. // SPDX-License-Identifier: Apache-2.0 +// +// DD/RTL half of the lowRISC vendoring split. Shares its target_dir +// ("lowrisc_ip") with hw/vendor/lowrisc_ip_dv.vendor.hjson (the DV half). +// Run this DD vendor before the DV vendor: this run deletes each ip/ +// directory (including its dv/ subdir) before re-importing. See the DV config +// header for details. { name: "lowrisc_ip", target_dir: "lowrisc_ip", @@ -34,7 +40,7 @@ {from: "hw/ip/lc_ctrl", to: "ip/lc_ctrl"}, // Dependency of crossbar and power manager. {from: "hw/ip/rom_ctrl", to: "ip/rom_ctrl", patch_dir: "rom_ctrl"}, // Read-only memory. {from: "hw/ip/rv_core_ibex", to: "ip/rv_core_pkg", patch_dir: "rv_core_pkg"}, // RISC-V core package. - {from: "hw/ip/rv_timer", to: "ip/rv_timer", patch_dir: "rv_timer"}, // Timer. + {from: "hw/ip/rv_timer", to: "ip/rv_timer"}, // Timer. {from: "hw/ip/spi_device", to: "ip/spi_device", patch_dir: "spi_device"}, // SPI device. {from: "hw/ip/spi_host", to: "ip/spi_host", patch_dir: "spi_host"}, // SPI host. {from: "hw/ip/tlul", to: "ip/tlul", patch_dir: "tlul"}, // Memory bus. @@ -55,23 +61,11 @@ // Lint. {from: "hw/lint", to: "lint", patch_dir: "lint"}, - - // Simulation. - {from: "hw/dv/dpi/gpiodpi", to: "dv/dpi/gpiodpi", patch_dir: "gpiodpi"}, - {from: "hw/dv/dpi/spidpi", to: "dv/dpi/spidpi"}, - {from: "hw/dv/dpi/uartdpi", to: "dv/dpi/uartdpi"}, - {from: "hw/dv/dpi/jtagdpi", to: "dv/dpi/jtagdpi"}, - {from: "hw/dv/dpi/common/tcp_server", to: "dv/dpi/common/tcp_server"}, - {from: "hw/dv/sv", to: "dv/sv", patch_dir: "dv_sv"}, - {from: "hw/dv/verilator", to: "dv/verilator", patch_dir: "dv_verilator"}, - - // Verification. - {from: "hw/dv/tools", to: "dv/tools", patch_dir: "dv_tools"}, - {from: "hw/formal/tools", to: "formal/tools", patch_dir: "formal_tools"}, ], exclude_from_upstream: [ - "*/BUILD", - "hw/dv/tools/vcs", + "**/BUILD", + "hw/ip/*/dv", + "hw/ip_templates/*/dv", ], } diff --git a/hw/vendor/lowrisc_ip/dv/sv/alert_esc_agent/alert_esc_agent.sv b/hw/vendor/lowrisc_ip/dv/sv/alert_esc_agent/alert_esc_agent.sv index 9bcca6694..abab68afa 100644 --- a/hw/vendor/lowrisc_ip/dv/sv/alert_esc_agent/alert_esc_agent.sv +++ b/hw/vendor/lowrisc_ip/dv/sv/alert_esc_agent/alert_esc_agent.sv @@ -5,9 +5,9 @@ // --------------------------------------------- // Alert agent // --------------------------------------------- -class alert_esc_agent extends dv_base_agent#( +class alert_esc_agent extends dv_reactive_agent #( .CFG_T (alert_esc_agent_cfg), - .DRIVER_T (dv_base_driver#(alert_esc_seq_item, alert_esc_agent_cfg)), + .DRIVER_T (dv_base_driver #(alert_esc_seq_item, alert_esc_agent_cfg)), .SEQUENCER_T (alert_esc_sequencer), .MONITOR_T (alert_esc_base_monitor), .COV_T (alert_esc_agent_cov) diff --git a/hw/vendor/lowrisc_ip/dv/sv/alert_esc_agent/alert_esc_agent_cfg.sv b/hw/vendor/lowrisc_ip/dv/sv/alert_esc_agent/alert_esc_agent_cfg.sv index aed7e5cb5..80126c4e5 100644 --- a/hw/vendor/lowrisc_ip/dv/sv/alert_esc_agent/alert_esc_agent_cfg.sv +++ b/hw/vendor/lowrisc_ip/dv/sv/alert_esc_agent/alert_esc_agent_cfg.sv @@ -6,7 +6,7 @@ // --------------------------------------------- // Configuration class for Alert agent // --------------------------------------------- -class alert_esc_agent_cfg extends dv_base_agent_cfg; +class alert_esc_agent_cfg extends dv_reactive_agent_cfg; virtual alert_esc_if vif; virtual alert_esc_probe_if probe_vif; bit is_alert = 1; diff --git a/hw/vendor/lowrisc_ip/dv/sv/alert_esc_agent/alert_esc_base_monitor.sv b/hw/vendor/lowrisc_ip/dv/sv/alert_esc_agent/alert_esc_base_monitor.sv index a15cf06ec..a718dc0ed 100644 --- a/hw/vendor/lowrisc_ip/dv/sv/alert_esc_agent/alert_esc_base_monitor.sv +++ b/hw/vendor/lowrisc_ip/dv/sv/alert_esc_agent/alert_esc_base_monitor.sv @@ -5,7 +5,7 @@ // A base class for monitors that track alert/escalation items and watch an alert_esc_if. -class alert_esc_base_monitor extends dv_base_monitor #( +class alert_esc_base_monitor extends dv_reactive_monitor #( .ITEM_T(alert_esc_seq_item), .CFG_T (alert_esc_agent_cfg), .COV_T (alert_esc_agent_cov) diff --git a/hw/vendor/lowrisc_ip/dv/sv/alert_esc_agent/alert_esc_sequencer.sv b/hw/vendor/lowrisc_ip/dv/sv/alert_esc_agent/alert_esc_sequencer.sv index def88a59d..4dc3c1610 100644 --- a/hw/vendor/lowrisc_ip/dv/sv/alert_esc_agent/alert_esc_sequencer.sv +++ b/hw/vendor/lowrisc_ip/dv/sv/alert_esc_agent/alert_esc_sequencer.sv @@ -2,7 +2,7 @@ // Licensed under the Apache License, Version 2.0, see LICENSE for details. // SPDX-License-Identifier: Apache-2.0 -class alert_esc_sequencer extends dv_base_sequencer#(alert_esc_seq_item, alert_esc_agent_cfg); +class alert_esc_sequencer extends dv_reactive_sequencer #(alert_esc_seq_item, alert_esc_agent_cfg); `uvm_component_utils(alert_esc_sequencer) extern function new (string name, uvm_component parent); diff --git a/hw/vendor/lowrisc_ip/dv/sv/cip_lib/cip_base_env_cfg.sv b/hw/vendor/lowrisc_ip/dv/sv/cip_lib/cip_base_env_cfg.sv index 71b02b130..1c9613459 100644 --- a/hw/vendor/lowrisc_ip/dv/sv/cip_lib/cip_base_env_cfg.sv +++ b/hw/vendor/lowrisc_ip/dv/sv/cip_lib/cip_base_env_cfg.sv @@ -130,8 +130,19 @@ class cip_base_env_cfg #(type RAL_T = dv_base_reg_block) extends dv_base_env_cfg `uvm_object_new + // Initialize the register models in the environment + // + // This works by calling initialize_ral (implemented in dv_base_env_cfg) after ral_model_names has + // been initialised. To add a new RAL model, a subclass should extend cip_base_env_cfg::initialize + // with a function that adds the model's name to ral_model_names before calling + // super.initialize(). virtual function void initialize(); - super.initialize(); + // Initialize the register models themselves. This uses initialize_ral, which is implemented in + // dv_base_env_cfg. + initialize_ral(bus_params_pkg::BUS_AW, + bus_params_pkg::BUS_DW, + bus_params_pkg::BUS_DBW); + // Create downstream agent cfg objects. foreach (ral_model_names[i]) begin string ral_name = ral_model_names[i]; diff --git a/hw/vendor/lowrisc_ip/dv/sv/cip_lib/seq_lib/cip_base_vseq.sv b/hw/vendor/lowrisc_ip/dv/sv/cip_lib/seq_lib/cip_base_vseq.sv index 339883b31..48a92a001 100644 --- a/hw/vendor/lowrisc_ip/dv/sv/cip_lib/seq_lib/cip_base_vseq.sv +++ b/hw/vendor/lowrisc_ip/dv/sv/cip_lib/seq_lib/cip_base_vseq.sv @@ -360,9 +360,9 @@ class cip_base_vseq #( // reset_delay_bound Each time the sequence runs, this task will wait a random amount of time // before it starts waiting for an opportune time to inject the reset. This // is the upper bound on that wait. - extern protected task run_seq_with_rand_reset_vseq(uvm_sequence seq, - int num_times, - uint reset_delay_bound); + extern protected virtual task run_seq_with_rand_reset_vseq(uvm_sequence seq, + int num_times, + uint reset_delay_bound); // If cfg.can_reset_with_csr_accesses is false, wait_to_issue_reset() will try to wait for a time // with no CSR accesses before it injects the reset. The value returned by this function is an diff --git a/hw/vendor/lowrisc_ip/dv/sv/csrng_agent/csrng_agent.sv b/hw/vendor/lowrisc_ip/dv/sv/csrng_agent/csrng_agent.sv index aa00f4252..75b8a6ace 100644 --- a/hw/vendor/lowrisc_ip/dv/sv/csrng_agent/csrng_agent.sv +++ b/hw/vendor/lowrisc_ip/dv/sv/csrng_agent/csrng_agent.sv @@ -2,7 +2,7 @@ // Licensed under the Apache License, Version 2.0, see LICENSE for details. // SPDX-License-Identifier: Apache-2.0 -class csrng_agent extends dv_base_agent #( +class csrng_agent extends dv_reactive_agent #( .CFG_T (csrng_agent_cfg), .DRIVER_T (csrng_driver), .HOST_DRIVER_T (csrng_host_driver), diff --git a/hw/vendor/lowrisc_ip/dv/sv/csrng_agent/csrng_agent_cfg.sv b/hw/vendor/lowrisc_ip/dv/sv/csrng_agent/csrng_agent_cfg.sv index 841b9c8ec..191021b7e 100644 --- a/hw/vendor/lowrisc_ip/dv/sv/csrng_agent/csrng_agent_cfg.sv +++ b/hw/vendor/lowrisc_ip/dv/sv/csrng_agent/csrng_agent_cfg.sv @@ -2,7 +2,7 @@ // Licensed under the Apache License, Version 2.0, see LICENSE for details. // SPDX-License-Identifier: Apache-2.0 -class csrng_agent_cfg extends dv_base_agent_cfg; +class csrng_agent_cfg extends dv_reactive_agent_cfg; // interface handle used by driver, monitor & the sequencer, via cfg handle virtual csrng_if vif; diff --git a/hw/vendor/lowrisc_ip/dv/sv/csrng_agent/csrng_monitor.sv b/hw/vendor/lowrisc_ip/dv/sv/csrng_agent/csrng_monitor.sv index da91d62cf..a98ddd996 100644 --- a/hw/vendor/lowrisc_ip/dv/sv/csrng_agent/csrng_monitor.sv +++ b/hw/vendor/lowrisc_ip/dv/sv/csrng_agent/csrng_monitor.sv @@ -2,7 +2,7 @@ // Licensed under the Apache License, Version 2.0, see LICENSE for details. // SPDX-License-Identifier: Apache-2.0 -class csrng_monitor extends dv_base_monitor #( +class csrng_monitor extends dv_reactive_monitor #( .ITEM_T (csrng_item), .CFG_T (csrng_agent_cfg), .COV_T (csrng_agent_cov) diff --git a/hw/vendor/lowrisc_ip/dv/sv/csrng_agent/csrng_sequencer.sv b/hw/vendor/lowrisc_ip/dv/sv/csrng_agent/csrng_sequencer.sv index 0a556b113..88ce042d8 100644 --- a/hw/vendor/lowrisc_ip/dv/sv/csrng_agent/csrng_sequencer.sv +++ b/hw/vendor/lowrisc_ip/dv/sv/csrng_agent/csrng_sequencer.sv @@ -2,7 +2,7 @@ // Licensed under the Apache License, Version 2.0, see LICENSE for details. // SPDX-License-Identifier: Apache-2.0 -class csrng_sequencer extends dv_base_sequencer #( +class csrng_sequencer extends dv_reactive_sequencer #( .ITEM_T (csrng_item), .CFG_T (csrng_agent_cfg) ); diff --git a/hw/vendor/lowrisc_ip/dv/sv/dv_base_agent/dv_base_agent.core b/hw/vendor/lowrisc_ip/dv/sv/dv_base_agent/dv_base_agent.core index 0be0a6a07..5b531e6cb 100644 --- a/hw/vendor/lowrisc_ip/dv/sv/dv_base_agent/dv_base_agent.core +++ b/hw/vendor/lowrisc_ip/dv/sv/dv_base_agent/dv_base_agent.core @@ -19,6 +19,11 @@ filesets: - dv_base_driver.sv: {is_include_file: true} - dv_base_agent.sv: {is_include_file: true} - dv_base_seq.sv: {is_include_file: true} + + - dv_reactive_agent_cfg.sv: {is_include_file: true} + - dv_reactive_monitor.sv: {is_include_file: true} + - dv_reactive_sequencer.sv: {is_include_file: true} + - dv_reactive_agent.sv: {is_include_file: true} file_type: systemVerilogSource targets: diff --git a/hw/vendor/lowrisc_ip/dv/sv/dv_base_agent/dv_base_agent.sv b/hw/vendor/lowrisc_ip/dv/sv/dv_base_agent/dv_base_agent.sv index 5939e64cd..6845194b0 100644 --- a/hw/vendor/lowrisc_ip/dv/sv/dv_base_agent/dv_base_agent.sv +++ b/hw/vendor/lowrisc_ip/dv/sv/dv_base_agent/dv_base_agent.sv @@ -83,10 +83,4 @@ function void dv_base_agent::connect_phase(uvm_phase phase); if (cfg.is_active && cfg.has_driver) begin driver.seq_item_port.connect(sequencer.seq_item_export); end - if (cfg.has_req_fifo) begin - monitor.req_analysis_port.connect(sequencer.req_analysis_fifo.analysis_export); - end - if (cfg.has_rsp_fifo) begin - monitor.rsp_analysis_port.connect(sequencer.rsp_analysis_fifo.analysis_export); - end endfunction diff --git a/hw/vendor/lowrisc_ip/dv/sv/dv_base_agent/dv_base_agent_cfg.sv b/hw/vendor/lowrisc_ip/dv/sv/dv_base_agent/dv_base_agent_cfg.sv index 008e6fa21..bf6e54cf8 100644 --- a/hw/vendor/lowrisc_ip/dv/sv/dv_base_agent/dv_base_agent_cfg.sv +++ b/hw/vendor/lowrisc_ip/dv/sv/dv_base_agent/dv_base_agent_cfg.sv @@ -26,14 +26,6 @@ class dv_base_agent_cfg extends uvm_object; // false, the agent can work by connecting to some lower-level agent to send multiple items. bit has_driver = 1'b1; - // True if agent's sequencer has a request fifo. If so, the agent will connect its monitor's - // req_analysis_port to the sequencer's request fifo. - bit has_req_fifo = 1'b0; - - // True if agent's sequencer has a response fifo. If so, the agent will connect its monitor's - // req_analysis_port to the sequencer's response fifo. - bit has_rsp_fifo = 1'b0; - // The minimum time in ns that the monitor expects to see ok_to_end be high before it drops an // objection that stopped the run_phase ending. int ok_to_end_delay_ns = 1000; @@ -49,8 +41,6 @@ class dv_base_agent_cfg extends uvm_object; `uvm_field_int (en_cov, UVM_DEFAULT) `uvm_field_enum(if_mode_e, if_mode, UVM_DEFAULT) `uvm_field_int (has_driver, UVM_DEFAULT) - `uvm_field_int (has_req_fifo, UVM_DEFAULT) - `uvm_field_int (has_rsp_fifo, UVM_DEFAULT) `uvm_field_int (ok_to_end_delay_ns, UVM_DEFAULT) `uvm_field_int (in_reset, UVM_DEFAULT) `uvm_object_utils_end diff --git a/hw/vendor/lowrisc_ip/dv/sv/dv_base_agent/dv_base_agent_pkg.sv b/hw/vendor/lowrisc_ip/dv/sv/dv_base_agent/dv_base_agent_pkg.sv index d8abd0603..b2923d404 100644 --- a/hw/vendor/lowrisc_ip/dv/sv/dv_base_agent/dv_base_agent_pkg.sv +++ b/hw/vendor/lowrisc_ip/dv/sv/dv_base_agent/dv_base_agent_pkg.sv @@ -22,6 +22,11 @@ package dv_base_agent_pkg; `include "dv_base_driver.sv" `include "dv_base_agent.sv" + `include "dv_reactive_agent_cfg.sv" + `include "dv_reactive_monitor.sv" + `include "dv_reactive_sequencer.sv" + `include "dv_reactive_agent.sv" + // base seq `include "dv_base_seq.sv" diff --git a/hw/vendor/lowrisc_ip/dv/sv/dv_base_agent/dv_base_monitor.sv b/hw/vendor/lowrisc_ip/dv/sv/dv_base_agent/dv_base_monitor.sv index 8f4c1ec93..65200b673 100644 --- a/hw/vendor/lowrisc_ip/dv/sv/dv_base_agent/dv_base_monitor.sv +++ b/hw/vendor/lowrisc_ip/dv/sv/dv_base_agent/dv_base_monitor.sv @@ -3,11 +3,9 @@ // SPDX-License-Identifier: Apache-2.0 class dv_base_monitor #(type ITEM_T = uvm_sequence_item, - type REQ_ITEM_T = ITEM_T, - type RSP_ITEM_T = ITEM_T, type CFG_T = dv_base_agent_cfg, type COV_T = dv_base_agent_cov) extends uvm_monitor; - `uvm_component_param_utils(dv_base_monitor #(ITEM_T, REQ_ITEM_T, RSP_ITEM_T, CFG_T, COV_T)) + `uvm_component_param_utils(dv_base_monitor #(ITEM_T, CFG_T, COV_T)) CFG_T cfg; COV_T cov; @@ -22,18 +20,11 @@ class dv_base_monitor #(type ITEM_T = uvm_sequence_item, // Analysis port for the collected transfer. uvm_analysis_port #(ITEM_T) analysis_port; - // item will be sent to this port for seq when req phase is done (last is set) - uvm_analysis_port #(REQ_ITEM_T) req_analysis_port; - // item will be sent to this port for seq when rsp phase is done (rsp_done is set) - uvm_analysis_port #(RSP_ITEM_T) rsp_analysis_port; - `uvm_component_new function void build_phase(uvm_phase phase); super.build_phase(phase); analysis_port = new("analysis_port", this); - req_analysis_port = new("req_analysis_port", this); - rsp_analysis_port = new("rsp_analysis_port", this); endfunction virtual task run_phase(uvm_phase phase); diff --git a/hw/vendor/lowrisc_ip/dv/sv/dv_base_agent/dv_base_sequencer.sv b/hw/vendor/lowrisc_ip/dv/sv/dv_base_agent/dv_base_sequencer.sv index 38d4393b1..ec3511498 100644 --- a/hw/vendor/lowrisc_ip/dv/sv/dv_base_agent/dv_base_sequencer.sv +++ b/hw/vendor/lowrisc_ip/dv/sv/dv_base_agent/dv_base_sequencer.sv @@ -10,28 +10,9 @@ class dv_base_sequencer #(type ITEM_T = uvm_sequence_item, `uvm_component_param_utils(dv_base_sequencer #(.ITEM_T (ITEM_T), .CFG_T (CFG_T), .RSP_ITEM_T (RSP_ITEM_T))) - - // These FIFOs collect items when req/rsp is received, which are used to communicate between - // monitor and sequences. These FIFOs are optional - // When device is re-active, it gets items from req_analysis_fifo and send rsp to driver - // When this is a high-level agent, monitors put items to these 2 FIFOs for high-level seq - uvm_tlm_analysis_fifo #(ITEM_T) req_analysis_fifo; - uvm_tlm_analysis_fifo #(RSP_ITEM_T) rsp_analysis_fifo; - CFG_T cfg; - `uvm_component_new - - function void build_phase(uvm_phase phase); - super.build_phase(phase); - - // Avoid null pointer if the cfg is not defined. - if (cfg == null) begin - `uvm_fatal(`gfn, "cfg handle is null.") - end else begin - if (cfg.has_req_fifo) req_analysis_fifo = new("req_analysis_fifo", this); - if (cfg.has_rsp_fifo) rsp_analysis_fifo = new("rsp_analysis_fifo", this); - end - endfunction : build_phase - + function new(string name, uvm_component parent); + super.new(name, parent); + endfunction endclass diff --git a/hw/vendor/lowrisc_ip/dv/sv/dv_base_agent/dv_reactive_agent.sv b/hw/vendor/lowrisc_ip/dv/sv/dv_base_agent/dv_reactive_agent.sv new file mode 100644 index 000000000..4b323be85 --- /dev/null +++ b/hw/vendor/lowrisc_ip/dv/sv/dv_base_agent/dv_reactive_agent.sv @@ -0,0 +1,59 @@ +// Copyright lowRISC contributors (OpenTitan project). +// Licensed under the Apache License, Version 2.0, see LICENSE for details. +// SPDX-License-Identifier: Apache-2.0 + +// An extension of the base agent class that connects the monitor to the sequencer in order to allow +// the agent to run sequences that react to items collected by the monitor. +// +// CFG_T: The type of the configuration object. This should be a subclass of +// dv_reactive_agent_cfg +// +// DRIVER_T: The type of the driver. This should be a subclass of dv_base_driver. +// +// HOST_DRIVER_T The type of the driver when the agent configured with if_mode set to Host. This +// should be a subclass of DRIVER_T. +// +// DEVICE_DRIVER_T The type of the driver when the agent configured with if_mode set to Device. +// This should be a subclass of DRIVER_T. +// +// SEQUENCER_T The type of the sequencer. This should be a subclass of dv_reactive_sequencer. +// +// MONITOR_T The type of the monitor. This should be a subclass of dv_reactive_monitor. +// +// COV_T The type of the object that monitors coverage. This should be a subclass of +// dv_base_agent_cov. + +class dv_reactive_agent #(type CFG_T = dv_reactive_agent_cfg, + type DRIVER_T = dv_base_driver, + type HOST_DRIVER_T = DRIVER_T, + type DEVICE_DRIVER_T = DRIVER_T, + type SEQUENCER_T = dv_reactive_sequencer, + type MONITOR_T = dv_reactive_monitor, + type COV_T = dv_base_agent_cov) + extends dv_base_agent #(.CFG_T(CFG_T), + .DRIVER_T(DRIVER_T), + .HOST_DRIVER_T(HOST_DRIVER_T), .DEVICE_DRIVER_T(DEVICE_DRIVER_T), + .SEQUENCER_T(SEQUENCER_T), + .MONITOR_T(MONITOR_T), + .COV_T(COV_T)); + + `uvm_component_param_utils(dv_reactive_agent #(CFG_T, DRIVER_T, HOST_DRIVER_T, DEVICE_DRIVER_T, + SEQUENCER_T, MONITOR_T, COV_T)) + + extern function new (string name, uvm_component parent); + extern function void connect_phase(uvm_phase phase); +endclass + +function dv_reactive_agent::new (string name, uvm_component parent); + super.new(name, parent); +endfunction + +function void dv_reactive_agent::connect_phase(uvm_phase phase); + super.connect_phase(phase); + if (cfg.has_req_fifo) begin + monitor.req_analysis_port.connect(sequencer.req_analysis_fifo.analysis_export); + end + if (cfg.has_rsp_fifo) begin + monitor.rsp_analysis_port.connect(sequencer.rsp_analysis_fifo.analysis_export); + end +endfunction diff --git a/hw/vendor/lowrisc_ip/dv/sv/dv_base_agent/dv_reactive_agent_cfg.sv b/hw/vendor/lowrisc_ip/dv/sv/dv_base_agent/dv_reactive_agent_cfg.sv new file mode 100644 index 000000000..e41a93d95 --- /dev/null +++ b/hw/vendor/lowrisc_ip/dv/sv/dv_base_agent/dv_reactive_agent_cfg.sv @@ -0,0 +1,27 @@ +// Copyright lowRISC contributors (OpenTitan project). +// Licensed under the Apache License, Version 2.0, see LICENSE for details. +// SPDX-License-Identifier: Apache-2.0 + +// The base config object for a reactive agent + +class dv_reactive_agent_cfg extends dv_base_agent_cfg; + + // True if agent's sequencer has a request fifo. If so, the agent will connect its monitor's + // req_analysis_port to the sequencer's request fifo. + bit has_req_fifo = 1'b0; + + // True if agent's sequencer has a response fifo. If so, the agent will connect its monitor's + // req_analysis_port to the sequencer's response fifo. + bit has_rsp_fifo = 1'b0; + + `uvm_object_utils_begin(dv_reactive_agent_cfg) + `uvm_field_int (has_req_fifo, UVM_DEFAULT) + `uvm_field_int (has_rsp_fifo, UVM_DEFAULT) + `uvm_object_utils_end + + extern function new (string name=""); +endclass + +function dv_reactive_agent_cfg::new (string name=""); + super.new(name); +endfunction diff --git a/hw/vendor/lowrisc_ip/dv/sv/dv_base_agent/dv_reactive_monitor.sv b/hw/vendor/lowrisc_ip/dv/sv/dv_base_agent/dv_reactive_monitor.sv new file mode 100644 index 000000000..c9891b14f --- /dev/null +++ b/hw/vendor/lowrisc_ip/dv/sv/dv_base_agent/dv_reactive_monitor.sv @@ -0,0 +1,31 @@ +// Copyright lowRISC contributors (OpenTitan project). +// Licensed under the Apache License, Version 2.0, see LICENSE for details. +// SPDX-License-Identifier: Apache-2.0 + +class dv_reactive_monitor #(type ITEM_T = uvm_sequence_item, + type REQ_ITEM_T = ITEM_T, + type RSP_ITEM_T = ITEM_T, + type CFG_T = dv_base_agent_cfg, + type COV_T = dv_base_agent_cov) + extends dv_base_monitor #(.ITEM_T(ITEM_T), .CFG_T(CFG_T), .COV_T(COV_T)); + + `uvm_component_param_utils(dv_reactive_monitor #(ITEM_T, REQ_ITEM_T, RSP_ITEM_T, CFG_T, COV_T)) + + // item will be sent to this port for seq when req phase is done (last is set) + uvm_analysis_port #(REQ_ITEM_T) req_analysis_port; + // item will be sent to this port for seq when rsp phase is done (rsp_done is set) + uvm_analysis_port #(RSP_ITEM_T) rsp_analysis_port; + + extern function new (string name, uvm_component parent); + extern function void build_phase(uvm_phase phase); +endclass + +function dv_reactive_monitor::new (string name, uvm_component parent); + super.new(name, parent); +endfunction + +function void dv_reactive_monitor::build_phase(uvm_phase phase); + super.build_phase(phase); + req_analysis_port = new("req_analysis_port", this); + rsp_analysis_port = new("rsp_analysis_port", this); +endfunction diff --git a/hw/vendor/lowrisc_ip/dv/sv/dv_base_agent/dv_reactive_sequencer.sv b/hw/vendor/lowrisc_ip/dv/sv/dv_base_agent/dv_reactive_sequencer.sv new file mode 100644 index 000000000..95ba16174 --- /dev/null +++ b/hw/vendor/lowrisc_ip/dv/sv/dv_base_agent/dv_reactive_sequencer.sv @@ -0,0 +1,38 @@ +// Copyright lowRISC contributors (OpenTitan project). +// Licensed under the Apache License, Version 2.0, see LICENSE for details. +// SPDX-License-Identifier: Apache-2.0 + +class dv_reactive_sequencer #(type ITEM_T = uvm_sequence_item, + type CFG_T = dv_reactive_agent_cfg, + type RSP_ITEM_T = ITEM_T) + extends dv_base_sequencer #(.ITEM_T(ITEM_T), .CFG_T(CFG_T), .RSP_ITEM_T(RSP_ITEM_T)); + + `uvm_component_param_utils(dv_reactive_sequencer #(.ITEM_T (ITEM_T), + .CFG_T (CFG_T), + .RSP_ITEM_T (RSP_ITEM_T))) + + // These FIFOs collect items when req/rsp is received, which are used to communicate between + // monitor and sequences. These FIFOs are only created if has_req_fifo / has_rsp_fifo is true in + // the agent config. + // + // When device is reactive, it gets items from req_analysis_fifo and send rsp to driver When this + // is a high-level agent, monitors put items to these 2 FIFOs for high-level seq + uvm_tlm_analysis_fifo #(ITEM_T) req_analysis_fifo; + uvm_tlm_analysis_fifo #(RSP_ITEM_T) rsp_analysis_fifo; + + extern function new(string name, uvm_component parent); + extern function void build_phase(uvm_phase phase); +endclass + +function dv_reactive_sequencer::new(string name, uvm_component parent); + super.new(name, parent); +endfunction + +function void dv_reactive_sequencer::build_phase(uvm_phase phase); + super.build_phase(phase); + + if (cfg == null) `uvm_fatal(get_full_name(), "agent cfg not provided.") + + if (cfg.has_req_fifo) req_analysis_fifo = new("req_analysis_fifo", this); + if (cfg.has_rsp_fifo) rsp_analysis_fifo = new("rsp_analysis_fifo", this); +endfunction diff --git a/hw/vendor/lowrisc_ip/dv/sv/dv_base_reg/dv_base_reg.core b/hw/vendor/lowrisc_ip/dv/sv/dv_base_reg/dv_base_reg.core index cbae5d75c..b6b3cd164 100644 --- a/hw/vendor/lowrisc_ip/dv/sv/dv_base_reg/dv_base_reg.core +++ b/hw/vendor/lowrisc_ip/dv/sv/dv_base_reg/dv_base_reg.core @@ -9,7 +9,7 @@ filesets: files_dv: depend: - lowrisc:dv:dv_utils - - lowrisc:prim:mubi + - lowrisc:prim:mubi_pkg files: - dv_base_reg_pkg.sv - csr_excl_item.sv: {is_include_file: true} diff --git a/hw/vendor/lowrisc_ip/dv/sv/dv_base_reg/dv_base_reg_block.sv b/hw/vendor/lowrisc_ip/dv/sv/dv_base_reg/dv_base_reg_block.sv index df4ab3402..b7a07993f 100644 --- a/hw/vendor/lowrisc_ip/dv/sv/dv_base_reg/dv_base_reg_block.sv +++ b/hw/vendor/lowrisc_ip/dv/sv/dv_base_reg/dv_base_reg_block.sv @@ -447,7 +447,7 @@ class dv_base_reg_block extends uvm_reg_block; // Normalize these ignored bits to enable locating which CSR/mem is at the returned address. function uvm_reg_addr_t get_normalized_addr(uvm_reg_addr_t byte_addr, uvm_reg_map map = null); if (map == null) map = get_default_map(); - return get_addr_from_offset(.byte_offset(byte_addr & addr_mask[map]), + return get_addr_from_offset(.byte_offset(byte_addr & get_addr_mask(map)), .word_aligned(1), .map(map)); endfunction diff --git a/hw/vendor/lowrisc_ip/dv/sv/dv_lib/README.md b/hw/vendor/lowrisc_ip/dv/sv/dv_lib/README.md index 9a61b3cb9..b2836f23d 100644 --- a/hw/vendor/lowrisc_ip/dv/sv/dv_lib/README.md +++ b/hw/vendor/lowrisc_ip/dv/sv/dv_lib/README.md @@ -30,9 +30,8 @@ IP CSR specification. This class provides the following functions to support verification: * `gen_n_used_bits()`: This function returns the actual number of bits used in the CSR (sum of all available field widths). -* `get_msb_pos()`: This function returns the MSB bit position of all available - fields. CSR either ends at this bit (`BUS_DW` - 1) or has reserved / invalid - bits beyond this bit. +* `get_msb_pos()`: This function returns the MSB bit position of all available fields. + The CSR either ends at this bit or has reserved / invalid bits beyond this bit. #### `dv_base_reg_block` * ` build(uvm_reg_addr_t base_addr)`: This function is implemented as a pseudo diff --git a/hw/vendor/lowrisc_ip/dv/sv/dv_lib/dv_base_env_cfg.sv b/hw/vendor/lowrisc_ip/dv/sv/dv_lib/dv_base_env_cfg.sv index 8de81e672..59d823c79 100644 --- a/hw/vendor/lowrisc_ip/dv/sv/dv_lib/dv_base_env_cfg.sv +++ b/hw/vendor/lowrisc_ip/dv/sv/dv_lib/dv_base_env_cfg.sv @@ -30,8 +30,9 @@ class dv_base_env_cfg #(type RAL_T = dv_base_reg_block) extends uvm_object; // dv_base_scoreboard::monitor_reset maintains this value. bit under_reset = 0; - // A flag to show that the initialize method has been called. This is protected (rather than - // local) to allow specialised environments set it to avoid the initialize method being called. + // A flag to show that the initialize_ral method has been called. This is protected (rather than + // local) to allow specialised environments to set it to avoid the initialize_ral method being + // called. protected bit is_initialized = 0; // The scope and runtime of a existing test can be reduced by setting this variable. This is @@ -51,12 +52,13 @@ class dv_base_env_cfg #(type RAL_T = dv_base_reg_block) extends uvm_object; // is after a derived class can have overridden it). protected string ral_type_name = RAL_T::type_name; - // A queue of the names of RAL models that should be created in the `initialize` function. Related - // agents and adapters will be created in the environment as well as connecting them with the - // scoreboard. + // A queue of the names of RAL models that should be created in the `initialize_ral` function. + // Related agents and adapters will be created in the environment as well as connecting them with + // the scoreboard. // - // To add another RAL model, a subclass of dv_base_env_cfg should implement initialize and add its - // name before calling super.initialize. + // To add another RAL model, a subclass of dv_base_env_cfg must make sure that the model's name is + // added to this queue before running dv_base_env_cfg::initialize_ral. One way to do this is to + // implement the function itself and update the queue before calling super.initialize_ral. // // An index into the collection of RAL model names is used as an index in ral_models, clk_rst_vifs // and clk_freqs_mhz. @@ -113,8 +115,13 @@ class dv_base_env_cfg #(type RAL_T = dv_base_reg_block) extends uvm_object; // Initialise the object with RAL models and set it up for randomisation // - // This is virtual, allowing subclasses to set up list_of_alerts and num_interrupts. - extern virtual function void initialize(); + // The addr_width, data_width and be_width arguments are used to configure the analogous fields of + // the dv_base_reg_block instances that are created. + // + // This function is virtual, allowing subclasses to set up list_of_alerts and num_interrupts. + extern virtual function void initialize_ral(int unsigned addr_width, + int unsigned data_width, + int unsigned be_width); // Set pre-build RAL knobs. // @@ -137,10 +144,21 @@ class dv_base_env_cfg #(type RAL_T = dv_base_reg_block) extends uvm_object; extern virtual function void reset_deasserted(); // Create missing RAL models and set their base addresses based on the supplied arg. - extern local function void make_ral_models(); + // + // The addr_width, data_width and be_width arguments are used to configure the analogous fields of + // the dv_base_reg_block instances that are created. + extern local function void make_ral_models(int unsigned addr_width, + int unsigned data_width, + int unsigned be_width); // Create the named RAL model and give it a randomised base address. - extern local function void make_ral_model(string ral_model_name); + // + // The addr_width, data_width and be_width arguments are used to configure the analogous fields of + // the dv_base_reg_block that is created. + extern local function void make_ral_model(string ral_model_name, + int unsigned addr_width, + int unsigned data_width, + int unsigned be_width); // Create the named register block. This protected function is virtual to allow subclasses to // customise how the register block is created. @@ -163,7 +181,7 @@ function dv_base_env_cfg::new (string name=""); endfunction function void dv_base_env_cfg::pre_randomize(); - if (!is_initialized) `uvm_fatal(`gfn, "Run initialize() before randomizing this object.") + if (!is_initialized) `uvm_fatal(`gfn, "Run initialize_ral() before randomizing this object.") endfunction function void dv_base_env_cfg::post_randomize(); @@ -173,8 +191,10 @@ function void dv_base_env_cfg::post_randomize(); end endfunction -function void dv_base_env_cfg::initialize(); - if (is_initialized) `uvm_fatal(`gfn, "Cannot call initialize when already initialized") +function void dv_base_env_cfg::initialize_ral(int unsigned addr_width, + int unsigned data_width, + int unsigned be_width); + if (is_initialized) `uvm_fatal(`gfn, "Cannot call initialize_ral when already initialized") // Prepend ral_type_name to ral_model_names (so the "default RAL" for the class gets index 0) ral_model_names.push_front(ral_type_name); @@ -182,7 +202,7 @@ function void dv_base_env_cfg::initialize(); is_initialized = 1'b1; // build the ral model - make_ral_models(); + make_ral_models(addr_width, data_width, be_width); // add items to clk_freqs_mhz before randomizing it foreach (ral_model_names[i]) begin @@ -208,12 +228,24 @@ function void dv_base_env_cfg::reset_deasserted(); csr_utils_pkg::reset_deasserted(); endfunction -function void dv_base_env_cfg::make_ral_models(); - foreach (ral_model_names[i]) make_ral_model(ral_model_names[i]); - `DV_CHECK_FATAL(ral_models.exists(ral_type_name)) +function void dv_base_env_cfg::make_ral_models(int unsigned addr_width, + int unsigned data_width, + int unsigned be_width); + foreach (ral_model_names[i]) begin + make_ral_model(ral_model_names[i], addr_width, data_width, be_width); + end + + if (!ral_models.exists(ral_type_name)) begin + `uvm_fatal(get_name(), + $sformatf("The generated RAL models don't include ral_type_name=%0s.", + ral_type_name)) + end endfunction -function void dv_base_env_cfg::make_ral_model(string ral_model_name); +function void dv_base_env_cfg::make_ral_model(string ral_model_name, + int unsigned addr_width, + int unsigned data_width, + int unsigned be_width); dv_base_reg_block reg_blk; if (ral_models.exists(ral_model_name)) begin @@ -227,9 +259,9 @@ function void dv_base_env_cfg::make_ral_model(string ral_model_name); // later. pre_build_ral_settings(reg_blk); reg_blk.build(.base_addr(0), .csr_excl(null)); - reg_blk.addr_width = BUS_AW; - reg_blk.data_width = bus_params_pkg::BUS_DW; - reg_blk.be_width = bus_params_pkg::BUS_DBW; + reg_blk.addr_width = addr_width; + reg_blk.data_width = data_width; + reg_blk.be_width = be_width; post_build_ral_settings(reg_blk); reg_blk.lock_model(); diff --git a/hw/vendor/lowrisc_ip/dv/sv/dv_lib/dv_lib.core b/hw/vendor/lowrisc_ip/dv/sv/dv_lib/dv_lib.core index b76bcfc77..419032355 100644 --- a/hw/vendor/lowrisc_ip/dv/sv/dv_lib/dv_lib.core +++ b/hw/vendor/lowrisc_ip/dv/sv/dv_lib/dv_lib.core @@ -13,7 +13,6 @@ filesets: - lowrisc:dv:dv_base_reg - lowrisc:dv:dv_base_agent - lowrisc:dv:common_ifs - - lowrisc:opentitan:bus_params_pkg files: - dv_lib_pkg.sv diff --git a/hw/vendor/lowrisc_ip/dv/sv/dv_lib/dv_lib_pkg.sv b/hw/vendor/lowrisc_ip/dv/sv/dv_lib/dv_lib_pkg.sv index 3f4573462..9d9bc3261 100644 --- a/hw/vendor/lowrisc_ip/dv/sv/dv_lib/dv_lib_pkg.sv +++ b/hw/vendor/lowrisc_ip/dv/sv/dv_lib/dv_lib_pkg.sv @@ -5,7 +5,6 @@ package dv_lib_pkg; // dep packages import uvm_pkg::*; - import bus_params_pkg::*; import dv_utils_pkg::*; import csr_utils_pkg::*; import dv_base_reg_pkg::*; diff --git a/hw/vendor/lowrisc_ip/dv/sv/dv_utils/dv_macros.svh b/hw/vendor/lowrisc_ip/dv/sv/dv_utils/dv_macros.svh index f6f69cb1d..28db6162e 100644 --- a/hw/vendor/lowrisc_ip/dv/sv/dv_utils/dv_macros.svh +++ b/hw/vendor/lowrisc_ip/dv/sv/dv_utils/dv_macros.svh @@ -495,27 +495,6 @@ end `endif -// Retrieves a queue of plusarg value from a string. -// -// The plusarg is parsed as a string, which needs to be converted into a queue of string which given delimiter. -// This functionality is provided by the UVM helper function below. -// -// QUEUE_: The queue of string to which the plusarg value will be set (must be declared already). -// PLUSARG_: the name of the plusarg (as raw text). This is typically the same as the enum variable. -// DELIMITER_: the delimiter that separate each item in the plusarg string value. -// CHECK_EXISTS_: Throws a fatal error if the plusarg is not set. -`ifndef DV_GET_QUEUE_PLUSARG -`define DV_GET_QUEUE_PLUSARG(QUEUE_, PLUSARG_, DELIMITER_ = ",", CHECK_EXISTS_ = 0, ID_ = `gfn) \ - begin \ - string str; \ - if ($value$plusargs(`"``PLUSARG_``=%0s`", str)) begin \ - str_split(str, QUEUE_, DELIMITER_); \ - end else if (CHECK_EXISTS_) begin \ - `uvm_fatal(ID_, `"Please pass the plusarg +``PLUSARG_``=<``ENUM_``-literal>`") \ - end \ - end -`endif - // Enable / disable assertions at a module hierarchy identified by LABEL_. // // This goes in conjunction with `DV_ASSERT_CTRL() macro above, but is invoked in the entity that is diff --git a/hw/vendor/lowrisc_ip/dv/sv/dv_utils/dv_utils_pkg.sv b/hw/vendor/lowrisc_ip/dv/sv/dv_utils/dv_utils_pkg.sv index 47802d151..692b471e0 100644 --- a/hw/vendor/lowrisc_ip/dv/sv/dv_utils/dv_utils_pkg.sv +++ b/hw/vendor/lowrisc_ip/dv/sv/dv_utils/dv_utils_pkg.sv @@ -143,20 +143,6 @@ package dv_utils_pkg; return report_server.get_severity_count(UVM_FATAL) > 0; endfunction - // get masked data based on provided byte mask; if csr reg handle is provided (optional) then - // masked bytes from csr's mirrored value are returned, else masked bytes are 0's - function automatic bit [bus_params_pkg::BUS_DW-1:0] - get_masked_data(bit [bus_params_pkg::BUS_DW-1:0] data, - bit [bus_params_pkg::BUS_DBW-1:0] mask, - uvm_reg csr = null); - bit [bus_params_pkg::BUS_DW-1:0] csr_data; - csr_data = (csr != null) ? csr.get_mirrored_value() : '0; - get_masked_data = data; - foreach (mask[i]) begin - if (~mask[i]) get_masked_data[i * 8 +: 8] = csr_data[i * 8 +: 8]; - end - endfunction - // create a sequence by name and return the handle of uvm_sequence function automatic uvm_sequence create_seq_by_name(string seq_name); uvm_object obj; diff --git a/hw/vendor/lowrisc_ip/dv/sv/entropy_src_xht_agent/entropy_src_xht_agent.sv b/hw/vendor/lowrisc_ip/dv/sv/entropy_src_xht_agent/entropy_src_xht_agent.sv index af8b626aa..6b5054a28 100644 --- a/hw/vendor/lowrisc_ip/dv/sv/entropy_src_xht_agent/entropy_src_xht_agent.sv +++ b/hw/vendor/lowrisc_ip/dv/sv/entropy_src_xht_agent/entropy_src_xht_agent.sv @@ -2,7 +2,7 @@ // Licensed under the Apache License, Version 2.0, see LICENSE for details. // SPDX-License-Identifier: Apache-2.0 -class entropy_src_xht_agent extends dv_base_agent #( +class entropy_src_xht_agent extends dv_reactive_agent #( .CFG_T (entropy_src_xht_agent_cfg), .DRIVER_T (entropy_src_xht_device_driver), .SEQUENCER_T (entropy_src_xht_sequencer), diff --git a/hw/vendor/lowrisc_ip/dv/sv/entropy_src_xht_agent/entropy_src_xht_agent_cfg.sv b/hw/vendor/lowrisc_ip/dv/sv/entropy_src_xht_agent/entropy_src_xht_agent_cfg.sv index 7bbd47c91..9f80ed232 100644 --- a/hw/vendor/lowrisc_ip/dv/sv/entropy_src_xht_agent/entropy_src_xht_agent_cfg.sv +++ b/hw/vendor/lowrisc_ip/dv/sv/entropy_src_xht_agent/entropy_src_xht_agent_cfg.sv @@ -2,7 +2,7 @@ // Licensed under the Apache License, Version 2.0, see LICENSE for details. // SPDX-License-Identifier: Apache-2.0 -class entropy_src_xht_agent_cfg extends dv_base_agent_cfg; +class entropy_src_xht_agent_cfg extends dv_reactive_agent_cfg; virtual entropy_src_xht_if vif; diff --git a/hw/vendor/lowrisc_ip/dv/sv/entropy_src_xht_agent/entropy_src_xht_monitor.sv b/hw/vendor/lowrisc_ip/dv/sv/entropy_src_xht_agent/entropy_src_xht_monitor.sv index 875a3ccec..aece89227 100644 --- a/hw/vendor/lowrisc_ip/dv/sv/entropy_src_xht_agent/entropy_src_xht_monitor.sv +++ b/hw/vendor/lowrisc_ip/dv/sv/entropy_src_xht_agent/entropy_src_xht_monitor.sv @@ -2,7 +2,7 @@ // Licensed under the Apache License, Version 2.0, see LICENSE for details. // SPDX-License-Identifier: Apache-2.0 -class entropy_src_xht_monitor extends dv_base_monitor #( +class entropy_src_xht_monitor extends dv_reactive_monitor #( .ITEM_T (entropy_src_xht_item), .CFG_T (entropy_src_xht_agent_cfg), .COV_T (dv_base_agent_cov#(entropy_src_xht_agent_cfg)) diff --git a/hw/vendor/lowrisc_ip/dv/sv/entropy_src_xht_agent/entropy_src_xht_sequencer.sv b/hw/vendor/lowrisc_ip/dv/sv/entropy_src_xht_agent/entropy_src_xht_sequencer.sv index 5be174f02..195938e73 100644 --- a/hw/vendor/lowrisc_ip/dv/sv/entropy_src_xht_agent/entropy_src_xht_sequencer.sv +++ b/hw/vendor/lowrisc_ip/dv/sv/entropy_src_xht_agent/entropy_src_xht_sequencer.sv @@ -2,7 +2,7 @@ // Licensed under the Apache License, Version 2.0, see LICENSE for details. // SPDX-License-Identifier: Apache-2.0 -class entropy_src_xht_sequencer extends dv_base_sequencer #( +class entropy_src_xht_sequencer extends dv_reactive_sequencer #( .ITEM_T (entropy_src_xht_item), .CFG_T (entropy_src_xht_agent_cfg) ); diff --git a/hw/vendor/lowrisc_ip/dv/sv/jtag_dmi_agent/jtag_dmi_monitor.sv b/hw/vendor/lowrisc_ip/dv/sv/jtag_dmi_agent/jtag_dmi_monitor.sv index e612859c6..acd87c3f7 100644 --- a/hw/vendor/lowrisc_ip/dv/sv/jtag_dmi_agent/jtag_dmi_monitor.sv +++ b/hw/vendor/lowrisc_ip/dv/sv/jtag_dmi_agent/jtag_dmi_monitor.sv @@ -7,7 +7,7 @@ // Unlike the name suggests, this monitor does not actually monitor the DMI interface // directly, but indirectly by snooping the reads and writes to the DTM DMI register. // TODO: In future, it may be better to rename this to jtag_dmi_csr_monitor. -class jtag_dmi_monitor #(type ITEM_T = jtag_dmi_item) extends dv_base_monitor#( +class jtag_dmi_monitor #(type ITEM_T = jtag_dmi_item) extends dv_reactive_monitor #( .ITEM_T (ITEM_T), .CFG_T (jtag_agent_cfg)); `uvm_component_param_utils(jtag_dmi_monitor #(ITEM_T)) diff --git a/hw/vendor/lowrisc_ip/dv/sv/jtag_dmi_agent/sba_access_monitor.sv b/hw/vendor/lowrisc_ip/dv/sv/jtag_dmi_agent/sba_access_monitor.sv index d0552c2b7..6e452b981 100644 --- a/hw/vendor/lowrisc_ip/dv/sv/jtag_dmi_agent/sba_access_monitor.sv +++ b/hw/vendor/lowrisc_ip/dv/sv/jtag_dmi_agent/sba_access_monitor.sv @@ -13,7 +13,7 @@ // higher level testbench components to process. // // Reads and writes made to non SBA registers are passed on through non_sba_jtag_dmi_analysis_port. -class sba_access_monitor #(type ITEM_T = sba_access_item) extends dv_base_monitor#( +class sba_access_monitor #(type ITEM_T = sba_access_item) extends dv_reactive_monitor #( .ITEM_T (ITEM_T), .CFG_T (jtag_agent_cfg)); `uvm_component_param_utils(sba_access_monitor #(ITEM_T)) diff --git a/hw/vendor/lowrisc_ip/dv/sv/key_sideload_agent/key_sideload_driver.sv b/hw/vendor/lowrisc_ip/dv/sv/key_sideload_agent/key_sideload_driver.sv index 4df961aca..2e9e6e697 100644 --- a/hw/vendor/lowrisc_ip/dv/sv/key_sideload_agent/key_sideload_driver.sv +++ b/hw/vendor/lowrisc_ip/dv/sv/key_sideload_agent/key_sideload_driver.sv @@ -34,7 +34,13 @@ class key_sideload_driver#( cfg.vif.sideload_key.key[1] = req.valid ? req.key1 : 'x; `uvm_info(`gfn, "item sent", UVM_HIGH) - cfg.vif.wait_clks_or_rst(1 + req.rsp_delay); + fork : isolation_fork begin + fork + cfg.vif.wait_clks_or_rst(1 + req.rsp_delay); + req.wait_stop_requested(); + join_any + disable fork; + end join seq_item_port.item_done(req); end diff --git a/hw/vendor/lowrisc_ip/dv/sv/key_sideload_agent/key_sideload_item.sv b/hw/vendor/lowrisc_ip/dv/sv/key_sideload_agent/key_sideload_item.sv index 961d68636..d2d359656 100644 --- a/hw/vendor/lowrisc_ip/dv/sv/key_sideload_agent/key_sideload_item.sv +++ b/hw/vendor/lowrisc_ip/dv/sv/key_sideload_agent/key_sideload_item.sv @@ -13,6 +13,10 @@ class key_sideload_item #( rand bit [KeyWidth-1:0] key1; rand int unsigned rsp_delay = 0; + // A flag that can be set from outside by calling request_stop(). When this is true, the + // wait_stop_requested() task will exit. + local bit m_stop_requested; + constraint rsp_delay_constraint_c {rsp_delay inside {[0:9]};} `uvm_object_utils_begin(key_sideload_item#(KEY_T)) @@ -22,6 +26,20 @@ class key_sideload_item #( `uvm_field_int(rsp_delay, UVM_DEFAULT) `uvm_object_utils_end - `uvm_object_new + function new (string name=""); + super.new(name); + endfunction + + // Set a flag that will cause wait_stop_requested to exit + function void request_stop(); + m_stop_requested = 1; + endfunction + + // A task that runs until request_stop is called. + // + // This task is safe to kill. + task wait_stop_requested(); + wait(m_stop_requested); + endtask endclass diff --git a/hw/vendor/lowrisc_ip/dv/sv/key_sideload_agent/seq_lib/key_sideload_set_seq.sv b/hw/vendor/lowrisc_ip/dv/sv/key_sideload_agent/seq_lib/key_sideload_set_seq.sv index 79857b60e..ed3bfc268 100644 --- a/hw/vendor/lowrisc_ip/dv/sv/key_sideload_agent/seq_lib/key_sideload_set_seq.sv +++ b/hw/vendor/lowrisc_ip/dv/sv/key_sideload_agent/seq_lib/key_sideload_set_seq.sv @@ -8,19 +8,53 @@ class key_sideload_set_seq #( `uvm_object_utils(key_sideload_set_seq#(KEY_T)) - `uvm_object_new rand KEY_T sideload_key; + // The (single) item that is created and run + local key_sideload_item#(KEY_T) m_item; + + // A flag that shows request_stop has run, and no item should be created or run. + local bit m_stop_requested; + + function new (string name=""); + super.new(name); + endfunction + virtual task body(); - key_sideload_item#(KEY_T) item; - item = key_sideload_item#(KEY_T)::type_id::create("item"); - `DV_CHECK_RANDOMIZE_WITH_FATAL(item, - item.valid == sideload_key.valid; - item.key0 == sideload_key.key[0]; - item.key1 == sideload_key.key[1];) - start_item(item); - finish_item(item); - get_response(item); + m_item = key_sideload_item#(KEY_T)::type_id::create("m_item"); + if (m_stop_requested) return; + + start_item(m_item); + + if (!m_item.randomize() with { + m_item.valid == sideload_key.valid; + m_item.key0 == sideload_key.key[0]; + m_item.key1 == sideload_key.key[1]; + }) begin + `uvm_fatal(get_name(), "Failed to randomize m_item.") + end + + if (m_stop_requested) begin + // m_stop_requested must have been set when we were waiting to start the item. Since it has + // started, we have to call finish (to avoid the sequencer locking up). Since we don't + // actually want the item to do anything, we just call request_stop on it now. + m_item.request_stop(); + end + + finish_item(m_item); + if (m_stop_requested) return; + + get_response(m_item); endtask + // If the sequence is running an item, send a message to the driver running that item to ask that + // driver to abort the item, which will complete the sequence. + function void request_stop(); + m_stop_requested = 1; + + if (m_item != null) begin + m_item.request_stop(); + end + endfunction + endclass diff --git a/hw/vendor/lowrisc_ip/dv/sv/kmac_app_agent/kmac_app_agent.sv b/hw/vendor/lowrisc_ip/dv/sv/kmac_app_agent/kmac_app_agent.sv index fb117106c..0eeb89e8a 100644 --- a/hw/vendor/lowrisc_ip/dv/sv/kmac_app_agent/kmac_app_agent.sv +++ b/hw/vendor/lowrisc_ip/dv/sv/kmac_app_agent/kmac_app_agent.sv @@ -2,7 +2,7 @@ // Licensed under the Apache License, Version 2.0, see LICENSE for details. // SPDX-License-Identifier: Apache-2.0 -class kmac_app_agent extends dv_base_agent #( +class kmac_app_agent extends dv_reactive_agent #( .CFG_T (kmac_app_agent_cfg), .DRIVER_T (kmac_app_driver), .HOST_DRIVER_T (kmac_app_host_driver), diff --git a/hw/vendor/lowrisc_ip/dv/sv/kmac_app_agent/kmac_app_agent_cfg.sv b/hw/vendor/lowrisc_ip/dv/sv/kmac_app_agent/kmac_app_agent_cfg.sv index 9f573c4a7..af4ac63bf 100644 --- a/hw/vendor/lowrisc_ip/dv/sv/kmac_app_agent/kmac_app_agent_cfg.sv +++ b/hw/vendor/lowrisc_ip/dv/sv/kmac_app_agent/kmac_app_agent_cfg.sv @@ -2,7 +2,7 @@ // Licensed under the Apache License, Version 2.0, see LICENSE for details. // SPDX-License-Identifier: Apache-2.0 -class kmac_app_agent_cfg extends dv_base_agent_cfg; +class kmac_app_agent_cfg extends dv_reactive_agent_cfg; // interface handle used by driver, monitor & the sequencer, via cfg handle virtual kmac_app_intf vif; @@ -10,7 +10,7 @@ class kmac_app_agent_cfg extends dv_base_agent_cfg; int unsigned req_delay_min = 0; int unsigned req_delay_max = 100; - // delay between last for req data and done for digest data + // delay between last message request and first digest response int unsigned rsp_delay_min = 0; int unsigned rsp_delay_max = 100; diff --git a/hw/vendor/lowrisc_ip/dv/sv/kmac_app_agent/kmac_app_agent_pkg.sv b/hw/vendor/lowrisc_ip/dv/sv/kmac_app_agent/kmac_app_agent_pkg.sv index 4da79b451..a98a6a650 100644 --- a/hw/vendor/lowrisc_ip/dv/sv/kmac_app_agent/kmac_app_agent_pkg.sv +++ b/hw/vendor/lowrisc_ip/dv/sv/kmac_app_agent/kmac_app_agent_pkg.sv @@ -8,7 +8,6 @@ package kmac_app_agent_pkg; import dv_utils_pkg::*; import dv_base_agent_pkg::*; import dv_lib_pkg::*; - import kmac_pkg::*; import push_pull_agent_pkg::*; // macro includes @@ -16,10 +15,9 @@ package kmac_app_agent_pkg; `include "dv_macros.svh" // parameters - parameter int KmacDataIfWidth = kmac_pkg::MsgWidth; - parameter int KMAC_REQ_DATA_WIDTH = KmacDataIfWidth // data width - + KmacDataIfWidth / 8 // data mask width - + 1; // bit last + parameter int KMAC_REQ_DATA_WIDTH = kmac_pkg::MsgWidth // data (single share) + + kmac_pkg::MsgWidth / 8 // strobe + + 1; // req_last `define CONNECT_DATA_WIDTH .HostDataWidth(kmac_app_agent_pkg::KMAC_REQ_DATA_WIDTH) diff --git a/hw/vendor/lowrisc_ip/dv/sv/kmac_app_agent/kmac_app_device_driver.sv b/hw/vendor/lowrisc_ip/dv/sv/kmac_app_agent/kmac_app_device_driver.sv index cac295b88..4d2410752 100644 --- a/hw/vendor/lowrisc_ip/dv/sv/kmac_app_agent/kmac_app_device_driver.sv +++ b/hw/vendor/lowrisc_ip/dv/sv/kmac_app_agent/kmac_app_device_driver.sv @@ -11,10 +11,11 @@ class kmac_app_device_driver extends kmac_app_driver; endtask virtual function void invalidate_signals(); - cfg.vif.device_cb.rsp_done <= 0; + cfg.vif.device_cb.rsp_valid <= 0; cfg.vif.device_cb.rsp_digest_share0 <= 'x; cfg.vif.device_cb.rsp_digest_share1 <= 'x; cfg.vif.device_cb.rsp_error <= 'x; + cfg.vif.device_cb.rsp_finish <= 'x; endfunction // drive trans received from sequencer @@ -28,10 +29,11 @@ class kmac_app_device_driver extends kmac_app_driver; `DV_SPINWAIT_EXIT(repeat (rsp.rsp_delay) @(cfg.vif.device_cb);, wait(!cfg.vif.rst_n)) - cfg.vif.device_cb.rsp_done <= 1; - cfg.vif.device_cb.rsp_digest_share0 <= rsp.rsp_digest_share0; - cfg.vif.device_cb.rsp_digest_share1 <= rsp.rsp_digest_share1; - cfg.vif.device_cb.rsp_error <= rsp.rsp_error; + cfg.vif.device_cb.rsp_valid <= 1; + cfg.vif.device_cb.rsp_digest_share0 <= rsp.digest_s0; + cfg.vif.device_cb.rsp_digest_share1 <= rsp.digest_s1; + cfg.vif.device_cb.rsp_error <= rsp.error; + cfg.vif.device_cb.rsp_finish <= 0; `DV_SPINWAIT_EXIT(@(cfg.vif.device_cb);, wait(!cfg.vif.rst_n)) diff --git a/hw/vendor/lowrisc_ip/dv/sv/kmac_app_agent/kmac_app_intf.sv b/hw/vendor/lowrisc_ip/dv/sv/kmac_app_agent/kmac_app_intf.sv index b5c926cb4..f60d6126c 100644 --- a/hw/vendor/lowrisc_ip/dv/sv/kmac_app_agent/kmac_app_intf.sv +++ b/hw/vendor/lowrisc_ip/dv/sv/kmac_app_agent/kmac_app_intf.sv @@ -5,6 +5,8 @@ // verilog_lint: waive interface-name-style interface kmac_app_intf (input clk, input rst_n); + import kmac_pkg::*; + dv_utils_pkg::if_mode_e if_mode; // interface mode - Host or Device // interface pins used to connect with DUT @@ -14,10 +16,11 @@ interface kmac_app_intf (input clk, input rst_n); // interface pins used in driver/monitor push_pull_if #(.HostDataWidth(kmac_app_agent_pkg::KMAC_REQ_DATA_WIDTH)) req_data_if(.clk(clk), .rst_n(rst_n)); - wire rsp_done; + wire rsp_valid; wire [kmac_pkg::AppDigestW-1:0] rsp_digest_share0; wire [kmac_pkg::AppDigestW-1:0] rsp_digest_share1; wire rsp_error; + wire rsp_finish; // all the host pins are handled by push_pull driver, only include clk and rst here clocking host_cb @(posedge clk); @@ -26,18 +29,20 @@ interface kmac_app_intf (input clk, input rst_n); clocking device_cb @(posedge clk); input rst_n; - output rsp_done; + output rsp_valid; output rsp_digest_share0; output rsp_digest_share1; output rsp_error; + output rsp_finish; endclocking clocking mon_cb @(posedge clk); input rst_n; - input rsp_done; + input rsp_valid; input rsp_digest_share0; input rsp_digest_share1; input rsp_error; + input rsp_finish; endclocking always @(if_mode) req_data_if.if_mode = if_mode; @@ -47,10 +52,10 @@ interface kmac_app_intf (input clk, input rst_n); assign {req_data_if.valid, req_data_if.h_data} = (if_mode == dv_utils_pkg::Device) ? kmac_data_req : 'z; - assign {req_data_if.ready, rsp_done, rsp_digest_share0, rsp_digest_share1, rsp_error} = + assign {req_data_if.ready, rsp_valid, rsp_digest_share0, rsp_digest_share1, rsp_error} = (if_mode == dv_utils_pkg::Host) ? kmac_data_rsp : 'z; assign kmac_data_rsp = (if_mode == dv_utils_pkg::Device) ? - {req_data_if.ready, rsp_done, rsp_digest_share0, rsp_digest_share1, rsp_error} : 'z; + {req_data_if.ready, rsp_valid, rsp_digest_share0, rsp_digest_share1, rsp_error} : 'z; // The following assertions only apply to device mode. // strb should never be 0 @@ -58,7 +63,7 @@ interface kmac_app_intf (input clk, input rst_n); clk, !rst_n || if_mode == dv_utils_pkg::Host) // Check strb is aligned to LSB, for example: if strb[1]==0, strb[$:2] should be 0 too - for (genvar k = 1; k < kmac_app_agent_pkg::KmacDataIfWidth / 8 - 1; k++) begin : gen_strb_check + for (genvar k = 1; k < MsgWidth / 8 - 1; k++) begin : gen_strb_check `ASSERT(StrbAlignLSB_A, kmac_data_req.valid && kmac_data_req.strb[k] === 0 |-> kmac_data_req.strb[k+1] === 0, clk, !rst_n || if_mode == dv_utils_pkg::Host) @@ -69,6 +74,6 @@ interface kmac_app_intf (input clk, input rst_n); // Done should be asserted after last, before we start another request `ASSERT(DoneAssertAfterLast_A, (kmac_data_req.last && kmac_data_req.valid && kmac_data_rsp.ready) |=> - !kmac_data_req.valid throughout rsp_done[->1], clk, !rst_n || rsp_error) + !kmac_data_req.valid throughout rsp_valid[->1], clk, !rst_n || rsp_error) endinterface diff --git a/hw/vendor/lowrisc_ip/dv/sv/kmac_app_agent/kmac_app_item.sv b/hw/vendor/lowrisc_ip/dv/sv/kmac_app_agent/kmac_app_item.sv index 674af522b..429dff014 100644 --- a/hw/vendor/lowrisc_ip/dv/sv/kmac_app_agent/kmac_app_item.sv +++ b/hw/vendor/lowrisc_ip/dv/sv/kmac_app_agent/kmac_app_item.sv @@ -9,27 +9,26 @@ class kmac_app_item extends uvm_sequence_item; // request data/mask // // also used by the monitor to assemble the full request message - rand byte byte_data_q[$]; + rand byte unsigned byte_data_q[$]; - // response digest/error - rand bit [kmac_pkg::AppDigestW-1:0] rsp_digest_share0; - rand bit [kmac_pkg::AppDigestW-1:0] rsp_digest_share1; - rand bit rsp_error; - - rand int unsigned rsp_delay; + // Static mode: single full-width digest. + rand bit [kmac_pkg::AppDigestW-1:0] digest_s0; + rand bit [kmac_pkg::AppDigestW-1:0] digest_s1; + rand bit error; + rand int unsigned rsp_delay; `uvm_object_utils_begin(kmac_app_item) `uvm_field_queue_int(byte_data_q, UVM_DEFAULT) - `uvm_field_int(rsp_digest_share0, UVM_DEFAULT) - `uvm_field_int(rsp_digest_share1, UVM_DEFAULT) - `uvm_field_int(rsp_error, UVM_DEFAULT) + `uvm_field_int(digest_s0, UVM_DEFAULT) + `uvm_field_int(digest_s1, UVM_DEFAULT) + `uvm_field_int(error, UVM_DEFAULT) `uvm_field_int(rsp_delay, UVM_DEFAULT) `uvm_object_utils_end `uvm_object_new virtual function bit get_is_kmac_rsp_data_invalid(); - return is_constant_share(rsp_digest_share0) || is_constant_share(rsp_digest_share1); + return is_constant_share(digest_s0) || is_constant_share(digest_s1); endfunction static function bit is_constant_share(bit [kmac_pkg::AppDigestW-1:0] share); diff --git a/hw/vendor/lowrisc_ip/dv/sv/kmac_app_agent/kmac_app_monitor.sv b/hw/vendor/lowrisc_ip/dv/sv/kmac_app_agent/kmac_app_monitor.sv index 85aa240e4..731491ad2 100644 --- a/hw/vendor/lowrisc_ip/dv/sv/kmac_app_agent/kmac_app_monitor.sv +++ b/hw/vendor/lowrisc_ip/dv/sv/kmac_app_agent/kmac_app_monitor.sv @@ -2,7 +2,7 @@ // Licensed under the Apache License, Version 2.0, see LICENSE for details. // SPDX-License-Identifier: Apache-2.0 -class kmac_app_monitor extends dv_base_monitor #( +class kmac_app_monitor extends dv_reactive_monitor #( .ITEM_T (kmac_app_item), .CFG_T (kmac_app_agent_cfg), .COV_T (kmac_app_agent_cov) @@ -43,9 +43,9 @@ class kmac_app_monitor extends dv_base_monitor #( kmac_app_item rsp; while (1) begin - bit [KmacDataIfWidth-1:0] data; - bit [KmacDataIfWidth/8-1:0] strb; - bit last; + bit [kmac_pkg::MsgWidth-1:0] data_s0; + bit [kmac_pkg::MsgWidth/8-1:0] strb; + bit req_last; push_pull_item#(`CONNECT_DATA_WIDTH) data_item; // KMAC (device) supports prematurely ending an App transaction and going back to Idle state @@ -57,13 +57,14 @@ class kmac_app_monitor extends dv_base_monitor #( // ok_to_end = 0 for the entire transaction. ok_to_end = 1; data_fifo.get(data_item); - {data, strb, last} = data_item.h_data; + {data_s0, strb, req_last} = data_item.h_data; - for (int i = 0; i < KmacDataIfWidth/8; i++) begin - if (strb[i]) req.byte_data_q.push_back(data[i*8+:8]); + for (int i = 0; i < kmac_pkg::MsgWidth/8; i++) begin + // Unmask the message before we collect it. + if (strb[i]) req.byte_data_q.push_back(data_s0[i*8+:8]); end - if (last) begin + if (req_last) begin ok_to_end = 0; break; end @@ -72,10 +73,10 @@ class kmac_app_monitor extends dv_base_monitor #( `uvm_info(`gfn, $sformatf("Write req item:\n%0s", req.sprint()), UVM_HIGH) `downcast(rsp, req.clone()) - while (cfg.vif.rsp_done !== 1) @(cfg.vif.mon_cb); - rsp.rsp_error = cfg.vif.rsp_error; - rsp.rsp_digest_share0 = cfg.vif.rsp_digest_share0; - rsp.rsp_digest_share1 = cfg.vif.rsp_digest_share1; + while (cfg.vif.rsp_valid !== 1) @(cfg.vif.mon_cb); + rsp.error = cfg.vif.rsp_error; + rsp.digest_s0 = cfg.vif.rsp_digest_share0; + rsp.digest_s1 = cfg.vif.rsp_digest_share1; analysis_port.write(rsp); `uvm_info(`gfn, $sformatf("Write rsp item:\n%0s", rsp.sprint()), UVM_HIGH) ok_to_end = 1; diff --git a/hw/vendor/lowrisc_ip/dv/sv/kmac_app_agent/kmac_app_sequencer.sv b/hw/vendor/lowrisc_ip/dv/sv/kmac_app_agent/kmac_app_sequencer.sv index 9e5d673d3..9b9b7e420 100644 --- a/hw/vendor/lowrisc_ip/dv/sv/kmac_app_agent/kmac_app_sequencer.sv +++ b/hw/vendor/lowrisc_ip/dv/sv/kmac_app_agent/kmac_app_sequencer.sv @@ -2,7 +2,7 @@ // Licensed under the Apache License, Version 2.0, see LICENSE for details. // SPDX-License-Identifier: Apache-2.0 -class kmac_app_sequencer extends dv_base_sequencer #( +class kmac_app_sequencer extends dv_reactive_sequencer #( .ITEM_T (kmac_app_item), .CFG_T (kmac_app_agent_cfg) ); diff --git a/hw/vendor/lowrisc_ip/dv/sv/kmac_app_agent/seq_lib/kmac_app_device_seq.sv b/hw/vendor/lowrisc_ip/dv/sv/kmac_app_agent/seq_lib/kmac_app_device_seq.sv index fd22a0225..e4a0d110f 100644 --- a/hw/vendor/lowrisc_ip/dv/sv/kmac_app_agent/seq_lib/kmac_app_device_seq.sv +++ b/hw/vendor/lowrisc_ip/dv/sv/kmac_app_agent/seq_lib/kmac_app_device_seq.sv @@ -38,12 +38,12 @@ class kmac_app_device_seq extends kmac_app_base_seq; rsp_delay inside {[cfg.rsp_delay_min : cfg.rsp_delay_max]}; } if (set_share) { - rsp_digest_share0 == rsp_digest_h.digest_share0; - rsp_digest_share1 == rsp_digest_h.digest_share1; + digest_s0 == rsp_digest_h.digest_share0; + digest_s1 == rsp_digest_h.digest_share1; } - gen_error == (rsp_error || + gen_error == (error || (cfg.constant_share_means_error && - (rsp_digest_share0 inside {'0, '1} || rsp_digest_share1 inside {'0, '1}))); + (digest_s0 inside {'0, '1} || digest_s1 inside {'0, '1}))); ) endfunction diff --git a/hw/vendor/lowrisc_ip/dv/sv/kmac_app_agent/seq_lib/kmac_app_host_seq.sv b/hw/vendor/lowrisc_ip/dv/sv/kmac_app_agent/seq_lib/kmac_app_host_seq.sv index b63fa39ea..dcef393a9 100644 --- a/hw/vendor/lowrisc_ip/dv/sv/kmac_app_agent/seq_lib/kmac_app_host_seq.sv +++ b/hw/vendor/lowrisc_ip/dv/sv/kmac_app_agent/seq_lib/kmac_app_host_seq.sv @@ -28,8 +28,9 @@ class kmac_app_host_seq extends kmac_app_base_seq; while (msg_size_bytes > 0) begin - bit [KmacDataIfWidth-1:0] req_data = '0; - bit [KmacDataIfWidth/8-1:0] req_strb = '1; + // We send the data unmasked (share 1 is fixed to '0). + bit [kmac_pkg::MsgWidth-1:0] req_data_s0 = '0; + bit [kmac_pkg::MsgWidth/8-1:0] req_strb = '1; bit req_last = 0; // create push_pull_host_seq @@ -38,19 +39,19 @@ class kmac_app_host_seq extends kmac_app_base_seq; `DV_CHECK_RANDOMIZE_FATAL(host_seq) // Assemble the message chunk and strb - for (int i = 0; i < KmacDataIfWidth / 8; i ++) begin + for (int i = 0; i < kmac_pkg::MsgWidth / 8; i ++) begin if (msg_size_bytes == 0) break; if (cfg.inject_zero_in_host_strb) begin `DV_CHECK_STD_RANDOMIZE_WITH_FATAL(req_strb, - ($countones(req_strb ^ {req_strb[KmacDataIfWidth/8-2:0], 1'b0}) <= 2);) + ($countones(req_strb ^ {req_strb[kmac_pkg::MsgWidth/8-2:0], 1'b0}) <= 2);) end if (req_strb[i] == 1) begin - req_data[i*8 +: 8] = 8'(req.byte_data_q.pop_front()); + req_data_s0[i*8 +: 8] = 8'(req.byte_data_q.pop_front()); req_strb[i] = 1'b1; msg_size_bytes -= 1; end else begin - req_data[i*8 +: 8] = $urandom_range(0, (1'b1<<9)-1); + req_data_s0[i*8 +: 8] = $urandom_range(0, (1'b1<<9)-1); req_strb[i] = 1'b0; end end @@ -58,7 +59,9 @@ class kmac_app_host_seq extends kmac_app_base_seq; // Set the last bit req_last = (msg_size_bytes == 0); - cfg.m_data_push_agent_cfg.add_h_user_data({req_data, req_strb, req_last}); + // For now, a static app is assumed to be always ready to accept a response. + cfg.m_data_push_agent_cfg.add_h_user_data( + {req_data_s0, req_strb, req_last}); `uvm_send(host_seq) diff --git a/hw/vendor/lowrisc_ip/dv/sv/push_pull_agent/push_pull_agent.sv b/hw/vendor/lowrisc_ip/dv/sv/push_pull_agent/push_pull_agent.sv index 8809af1ce..14ab8a2bc 100644 --- a/hw/vendor/lowrisc_ip/dv/sv/push_pull_agent/push_pull_agent.sv +++ b/hw/vendor/lowrisc_ip/dv/sv/push_pull_agent/push_pull_agent.sv @@ -5,7 +5,7 @@ class push_pull_agent #( parameter int HostDataWidth = 32, parameter int DeviceDataWidth = HostDataWidth -) extends dv_base_agent #( +) extends dv_reactive_agent #( .CFG_T (push_pull_agent_cfg#(HostDataWidth, DeviceDataWidth)), .DRIVER_T (push_pull_driver#(HostDataWidth, DeviceDataWidth)), .SEQUENCER_T(push_pull_sequencer#(HostDataWidth, DeviceDataWidth)), diff --git a/hw/vendor/lowrisc_ip/dv/sv/push_pull_agent/push_pull_agent_cfg.sv b/hw/vendor/lowrisc_ip/dv/sv/push_pull_agent/push_pull_agent_cfg.sv index 75eee996b..abfdc16cc 100644 --- a/hw/vendor/lowrisc_ip/dv/sv/push_pull_agent/push_pull_agent_cfg.sv +++ b/hw/vendor/lowrisc_ip/dv/sv/push_pull_agent/push_pull_agent_cfg.sv @@ -4,7 +4,7 @@ class push_pull_agent_cfg #(parameter int HostDataWidth = 32, parameter int DeviceDataWidth = HostDataWidth) - extends dv_base_agent_cfg; + extends dv_reactive_agent_cfg; // interface handle used by driver, monitor & the sequencer, via cfg handle virtual push_pull_if#(HostDataWidth, DeviceDataWidth) vif; diff --git a/hw/vendor/lowrisc_ip/dv/sv/push_pull_agent/push_pull_monitor.sv b/hw/vendor/lowrisc_ip/dv/sv/push_pull_agent/push_pull_monitor.sv index 9d3782f66..78d692a2b 100644 --- a/hw/vendor/lowrisc_ip/dv/sv/push_pull_agent/push_pull_monitor.sv +++ b/hw/vendor/lowrisc_ip/dv/sv/push_pull_agent/push_pull_monitor.sv @@ -4,7 +4,7 @@ class push_pull_monitor #(parameter int HostDataWidth = 32, parameter int DeviceDataWidth = HostDataWidth) - extends dv_base_monitor #( + extends dv_reactive_monitor #( .ITEM_T (push_pull_item#(HostDataWidth, DeviceDataWidth)), .CFG_T (push_pull_agent_cfg#(HostDataWidth, DeviceDataWidth)), .COV_T (push_pull_agent_cov#(HostDataWidth, DeviceDataWidth)) diff --git a/hw/vendor/lowrisc_ip/dv/sv/push_pull_agent/push_pull_sequencer.sv b/hw/vendor/lowrisc_ip/dv/sv/push_pull_agent/push_pull_sequencer.sv index 510f60a42..342132189 100644 --- a/hw/vendor/lowrisc_ip/dv/sv/push_pull_agent/push_pull_sequencer.sv +++ b/hw/vendor/lowrisc_ip/dv/sv/push_pull_agent/push_pull_sequencer.sv @@ -4,7 +4,7 @@ class push_pull_sequencer #(parameter int HostDataWidth = 32, parameter int DeviceDataWidth = HostDataWidth) - extends dv_base_sequencer #( + extends dv_reactive_sequencer #( .ITEM_T (push_pull_item#(HostDataWidth, DeviceDataWidth)), .CFG_T (push_pull_agent_cfg#(HostDataWidth, DeviceDataWidth)) ); diff --git a/hw/vendor/lowrisc_ip/dv/sv/sim_sram/sim_sram.sv b/hw/vendor/lowrisc_ip/dv/sv/sim_sram/sim_sram.sv index 2b5860218..4b70f1cf3 100644 --- a/hw/vendor/lowrisc_ip/dv/sv/sim_sram/sim_sram.sv +++ b/hw/vendor/lowrisc_ip/dv/sv/sim_sram/sim_sram.sv @@ -98,8 +98,8 @@ module sim_sram #( ) u_sram ( .clk_i, .rst_ni, - .cfg_i ('0), - .cfg_rsp_o (), + .cfg_i (prim_ram_1p_pkg::RAM_1P_CFG_REQ_DEFAULT), + .cfg_o (), .req_i (sram_req), .write_i (sram_we), .addr_i (sram_addr), diff --git a/hw/vendor/lowrisc_ip/dv/sv/spi_agent/spi_agent.sv b/hw/vendor/lowrisc_ip/dv/sv/spi_agent/spi_agent.sv index 95d81cddf..187ffed8c 100644 --- a/hw/vendor/lowrisc_ip/dv/sv/spi_agent/spi_agent.sv +++ b/hw/vendor/lowrisc_ip/dv/sv/spi_agent/spi_agent.sv @@ -2,7 +2,7 @@ // Licensed under the Apache License, Version 2.0, see LICENSE for details. // SPDX-License-Identifier: Apache-2.0 -class spi_agent extends dv_base_agent#( +class spi_agent extends dv_reactive_agent #( .CFG_T (spi_agent_cfg), .DRIVER_T (spi_driver), .HOST_DRIVER_T (spi_host_driver), diff --git a/hw/vendor/lowrisc_ip/dv/sv/spi_agent/spi_agent_cfg.sv b/hw/vendor/lowrisc_ip/dv/sv/spi_agent/spi_agent_cfg.sv index e5d0adbfd..b47edf414 100644 --- a/hw/vendor/lowrisc_ip/dv/sv/spi_agent/spi_agent_cfg.sv +++ b/hw/vendor/lowrisc_ip/dv/sv/spi_agent/spi_agent_cfg.sv @@ -2,7 +2,7 @@ // Licensed under the Apache License, Version 2.0, see LICENSE for details. // SPDX-License-Identifier: Apache-2.0 -class spi_agent_cfg extends dv_base_agent_cfg; +class spi_agent_cfg extends dv_reactive_agent_cfg; // enable monitor collection and checker bit en_monitor = 1'b1; diff --git a/hw/vendor/lowrisc_ip/dv/sv/spi_agent/spi_monitor.sv b/hw/vendor/lowrisc_ip/dv/sv/spi_agent/spi_monitor.sv index 3d82e98f3..c6368d9cf 100644 --- a/hw/vendor/lowrisc_ip/dv/sv/spi_agent/spi_monitor.sv +++ b/hw/vendor/lowrisc_ip/dv/sv/spi_agent/spi_monitor.sv @@ -2,7 +2,7 @@ // Licensed under the Apache License, Version 2.0, see LICENSE for details. // SPDX-License-Identifier: Apache-2.0 -class spi_monitor extends dv_base_monitor#( +class spi_monitor extends dv_reactive_monitor #( .ITEM_T (spi_item), .CFG_T (spi_agent_cfg), .COV_T (spi_agent_cov) diff --git a/hw/vendor/lowrisc_ip/dv/sv/spi_agent/spi_sequencer.sv b/hw/vendor/lowrisc_ip/dv/sv/spi_agent/spi_sequencer.sv index 85d8ada2e..1ede995d4 100644 --- a/hw/vendor/lowrisc_ip/dv/sv/spi_agent/spi_sequencer.sv +++ b/hw/vendor/lowrisc_ip/dv/sv/spi_agent/spi_sequencer.sv @@ -2,7 +2,7 @@ // Licensed under the Apache License, Version 2.0, see LICENSE for details. // SPDX-License-Identifier: Apache-2.0 -class spi_sequencer extends dv_base_sequencer#(spi_item, spi_agent_cfg, spi_item); +class spi_sequencer extends dv_reactive_sequencer #(spi_item, spi_agent_cfg, spi_item); `uvm_component_utils(spi_sequencer) // Analysis imp to receive items from host AP in monitor diff --git a/hw/vendor/lowrisc_ip/dv/sv/tl_agent/dv/tl_agent_sim_cfg.hjson b/hw/vendor/lowrisc_ip/dv/sv/tl_agent/dv/tl_agent_sim_cfg.hjson index 5fd79c10b..eb824ae80 100644 --- a/hw/vendor/lowrisc_ip/dv/sv/tl_agent/dv/tl_agent_sim_cfg.hjson +++ b/hw/vendor/lowrisc_ip/dv/sv/tl_agent/dv/tl_agent_sim_cfg.hjson @@ -22,7 +22,7 @@ "{proj_root}/hw/dv/tools/dvsim/common_sim_cfg.hjson"] // Default iterations for all tests - each test entry can override this. - reseed: 50 + reseed: 10 // Default UVM test and seq class name. uvm_test: tl_agent_base_test diff --git a/hw/vendor/lowrisc_ip/dv/sv/tl_agent/tl_host_driver.sv b/hw/vendor/lowrisc_ip/dv/sv/tl_agent/tl_host_driver.sv index ff9ed7d6b..9be3489f0 100644 --- a/hw/vendor/lowrisc_ip/dv/sv/tl_agent/tl_host_driver.sv +++ b/hw/vendor/lowrisc_ip/dv/sv/tl_agent/tl_host_driver.sv @@ -34,6 +34,19 @@ class tl_host_driver extends tl_base_driver; extern protected task a_channel_thread(); // Send a request, req, on the A channel + // + // The steps to drive the request: + // + // - Wait until there is no pending response for req.a_source. + // - Call send_a_request_body to assert a_valid and similar signals, looping if + // send_a_request_body reports a timeout. + // + // Once the request has been driven call seq_item_port.item_done(), causing the sequencer to allow + // the item to finish. + // + // If a reset is asserted at any point, the task will stop driving the request and send a response + // as well as calling seq_item_port.item_done() (representing the D channel message that would + // normally come back). extern protected task send_a_channel_request(tl_seq_item req); // Send the body of a request on the A channel. @@ -140,46 +153,23 @@ task tl_host_driver::wait_clk_or_rst(); endtask task tl_host_driver::a_channel_thread(); - // Each time the body of the main loop of a_channel_thread, we expect either to be synchronised - // with the TL clock or to be in reset. Make sure that is true from the start of the task. wait_clk_or_rst(); forever begin - // Grab as many items as we can from seq_item_port and immediately send them on the bus. The - // calls to try_next_item will not block, but sending the items on the bus probably will (unless - // we enter reset). - forever begin - seq_item_port.try_next_item(req); - if (req == null) break; - send_a_channel_request(req); + // At the start of the loop, either the interface is in reset or we are either aligned with a + // clock edge. Look to see whether there is a request ready to be sent. + seq_item_port.try_next_item(req); + + // If there was not a request ready, use get_next_item(). Since that task blocks, we then have + // to resynchronise with the clock edge (or see a reset) before starting to drive the item. + if (req == null) begin + seq_item_port.get_next_item(req); + wait_clk_or_rst(); end - // We just looked and seq_item_port didn't have an item. Wait a clock before we try again, but - // stop waiting if we happen to enter reset. - wait_clk_or_rst(); - - // If we are not in reset, we've just waited the cycle we wanted to wait and we should go back - // to the start of the loop and try again. - if (!cfg.in_reset) continue; - - // If we get here, we *are* in reset and we should switch to a different mode where we - // continuously flush seq_item_port. - forever begin - // Wait for the next item, but drop out early if we leave reset - `DV_SPINWAIT_EXIT(seq_item_port.get_next_item(req);, - wait(!cfg.in_reset);) - if (!cfg.in_reset) break; - - // If we get here then we are still in reset and the get_next_item() call yielded an item in - // req. Send the A-channel request (which will complete in zero time) - send_a_channel_request(req); - end - - // At this point, we've just come out of reset. Resynchronise to the TL clock before we go - // around the loop again. If we go into reset again before the clock edge, we'll go back to the - // top of the loop, but nothing will consume time until we get back to the forever loop we've - // just finished. - wait_clk_or_rst(); + // At this point, we have a request to send and either the interface is in reset or we are + // aligned with a clock edge. Send that request. + send_a_channel_request(req); end endtask diff --git a/hw/vendor/lowrisc_ip/dv/sv/usb20_agent/usb20_agent.sv b/hw/vendor/lowrisc_ip/dv/sv/usb20_agent/usb20_agent.sv index 87348b55d..4d4005d5b 100644 --- a/hw/vendor/lowrisc_ip/dv/sv/usb20_agent/usb20_agent.sv +++ b/hw/vendor/lowrisc_ip/dv/sv/usb20_agent/usb20_agent.sv @@ -2,7 +2,7 @@ // Licensed under the Apache License, Version 2.0, see LICENSE for details. // SPDX-License-Identifier: Apache-2.0 -class usb20_agent extends dv_base_agent #( +class usb20_agent extends dv_reactive_agent #( .CFG_T (usb20_agent_cfg), .DRIVER_T (usb20_driver), .SEQUENCER_T (usb20_sequencer), diff --git a/hw/vendor/lowrisc_ip/dv/sv/usb20_agent/usb20_agent_cfg.sv b/hw/vendor/lowrisc_ip/dv/sv/usb20_agent/usb20_agent_cfg.sv index ce3603e36..d6ca7718d 100644 --- a/hw/vendor/lowrisc_ip/dv/sv/usb20_agent/usb20_agent_cfg.sv +++ b/hw/vendor/lowrisc_ip/dv/sv/usb20_agent/usb20_agent_cfg.sv @@ -2,7 +2,7 @@ // Licensed under the Apache License, Version 2.0, see LICENSE for details. // SPDX-License-Identifier: Apache-2.0 -class usb20_agent_cfg extends dv_base_agent_cfg; +class usb20_agent_cfg extends dv_reactive_agent_cfg; // interface handle used by driver, monitor & the sequencer, via cfg handle virtual usb20_block_if bif; diff --git a/hw/vendor/lowrisc_ip/dv/sv/usb20_agent/usb20_agent_pkg.sv b/hw/vendor/lowrisc_ip/dv/sv/usb20_agent/usb20_agent_pkg.sv index 543b6a047..35386c069 100644 --- a/hw/vendor/lowrisc_ip/dv/sv/usb20_agent/usb20_agent_pkg.sv +++ b/hw/vendor/lowrisc_ip/dv/sv/usb20_agent/usb20_agent_pkg.sv @@ -76,8 +76,7 @@ package usb20_agent_pkg; typedef class usb20_agent_cfg; // reuse dv_base_sequencer as is with the right parameter set - typedef dv_base_sequencer #(.ITEM_T (usb20_item), - .CFG_T (usb20_agent_cfg)) usb20_sequencer; + typedef dv_reactive_sequencer #(.ITEM_T(usb20_item), .CFG_T (usb20_agent_cfg)) usb20_sequencer; // functions diff --git a/hw/vendor/lowrisc_ip/dv/sv/usb20_agent/usb20_monitor.sv b/hw/vendor/lowrisc_ip/dv/sv/usb20_agent/usb20_monitor.sv index 36a613cc5..d7c1e5e1c 100644 --- a/hw/vendor/lowrisc_ip/dv/sv/usb20_agent/usb20_monitor.sv +++ b/hw/vendor/lowrisc_ip/dv/sv/usb20_agent/usb20_monitor.sv @@ -2,7 +2,7 @@ // Licensed under the Apache License, Version 2.0, see LICENSE for details. // SPDX-License-Identifier: Apache-2.0 -class usb20_monitor extends dv_base_monitor #( +class usb20_monitor extends dv_reactive_monitor #( .ITEM_T (usb20_item), .REQ_ITEM_T (usb20_item), .RSP_ITEM_T (usb20_item), diff --git a/hw/vendor/lowrisc_ip/dv/tools/dvsim/tests/alert_test.hjson b/hw/vendor/lowrisc_ip/dv/tools/dvsim/tests/alert_test.hjson index 21c8ddff4..a1df0e018 100644 --- a/hw/vendor/lowrisc_ip/dv/tools/dvsim/tests/alert_test.hjson +++ b/hw/vendor/lowrisc_ip/dv/tools/dvsim/tests/alert_test.hjson @@ -13,7 +13,7 @@ name: "{name}_alert_test" uvm_test_seq: "{name}_common_vseq" run_opts: ["+run_alert_test", "+en_scb=0"] - reseed: 50 + reseed: 10 } ] } diff --git a/hw/vendor/lowrisc_ip/dv/tools/dvsim/tests/csr_tests.hjson b/hw/vendor/lowrisc_ip/dv/tools/dvsim/tests/csr_tests.hjson index af3d97b6a..b072442c6 100644 --- a/hw/vendor/lowrisc_ip/dv/tools/dvsim/tests/csr_tests.hjson +++ b/hw/vendor/lowrisc_ip/dv/tools/dvsim/tests/csr_tests.hjson @@ -22,7 +22,7 @@ build_mode: "cover_reg_top" run_opts: ["+csr_hw_reset"] en_run_modes: ["csr_tests_mode"] - reseed: 5 + reseed: 1 } { @@ -30,7 +30,7 @@ build_mode: "cover_reg_top" run_opts: ["+csr_rw"] en_run_modes: ["csr_tests_mode"] - reseed: 20 + reseed: 5 } { @@ -38,7 +38,7 @@ build_mode: "cover_reg_top" run_opts: ["+csr_bit_bash"] en_run_modes: ["csr_tests_mode"] - reseed: 5 + reseed: 1 } { @@ -46,7 +46,7 @@ build_mode: "cover_reg_top" run_opts: ["+csr_aliasing"] en_run_modes: ["csr_tests_mode"] - reseed: 5 + reseed: 1 } { @@ -54,7 +54,7 @@ build_mode: "cover_reg_top" run_opts: ["+run_same_csr_outstanding"] en_run_modes: ["csr_tests_mode"] - reseed: 20 + reseed: 5 } { @@ -62,7 +62,7 @@ build_mode: "cover_reg_top" run_opts: ["+run_csr_mem_rw_with_rand_reset", "+test_timeout_ns=10000000000"] en_run_modes: ["csr_tests_mode"] - reseed: 20 + reseed: 5 } ] diff --git a/hw/vendor/lowrisc_ip/dv/tools/dvsim/tests/intr_test.hjson b/hw/vendor/lowrisc_ip/dv/tools/dvsim/tests/intr_test.hjson index e83c96f89..4861f1b77 100644 --- a/hw/vendor/lowrisc_ip/dv/tools/dvsim/tests/intr_test.hjson +++ b/hw/vendor/lowrisc_ip/dv/tools/dvsim/tests/intr_test.hjson @@ -14,7 +14,7 @@ build_mode: "cover_reg_top" uvm_test_seq: "{name}_common_vseq" run_opts: ["+run_intr_test"] - reseed: 50 + reseed: 10 } ] } diff --git a/hw/vendor/lowrisc_ip/dv/tools/dvsim/tests/mem_tests.hjson b/hw/vendor/lowrisc_ip/dv/tools/dvsim/tests/mem_tests.hjson index de9fa5c24..85218c432 100644 --- a/hw/vendor/lowrisc_ip/dv/tools/dvsim/tests/mem_tests.hjson +++ b/hw/vendor/lowrisc_ip/dv/tools/dvsim/tests/mem_tests.hjson @@ -13,7 +13,7 @@ name: mem_tests_mode uvm_test_seq: "{name}_common_vseq" run_opts: ["+en_scb=0"] - reseed: 5 + reseed: 1 } ] diff --git a/hw/vendor/lowrisc_ip/dv/tools/dvsim/tests/passthru_mem_intg_tests.hjson b/hw/vendor/lowrisc_ip/dv/tools/dvsim/tests/passthru_mem_intg_tests.hjson index 46df8854a..24b334a57 100644 --- a/hw/vendor/lowrisc_ip/dv/tools/dvsim/tests/passthru_mem_intg_tests.hjson +++ b/hw/vendor/lowrisc_ip/dv/tools/dvsim/tests/passthru_mem_intg_tests.hjson @@ -14,7 +14,7 @@ build_mode: "cover_reg_top" uvm_test_seq: "{name}_common_vseq" run_opts: ["+run_passthru_mem_tl_intg_err"] - reseed: 20 + reseed: 5 } ] } diff --git a/hw/vendor/lowrisc_ip/dv/tools/dvsim/tests/stress_tests.hjson b/hw/vendor/lowrisc_ip/dv/tools/dvsim/tests/stress_tests.hjson index 799831ff8..c862891c9 100644 --- a/hw/vendor/lowrisc_ip/dv/tools/dvsim/tests/stress_tests.hjson +++ b/hw/vendor/lowrisc_ip/dv/tools/dvsim/tests/stress_tests.hjson @@ -13,7 +13,7 @@ // 10s "+test_timeout_ns=10000000000", "+stress_seq={name}_stress_all_vseq"] - run_timeout_mins: 180 + run_timeout_mins: 60 } ] } diff --git a/hw/vendor/lowrisc_ip/dv/tools/dvsim/tests/tl_access_tests.hjson b/hw/vendor/lowrisc_ip/dv/tools/dvsim/tests/tl_access_tests.hjson index fd0d1a16e..a84269f1f 100644 --- a/hw/vendor/lowrisc_ip/dv/tools/dvsim/tests/tl_access_tests.hjson +++ b/hw/vendor/lowrisc_ip/dv/tools/dvsim/tests/tl_access_tests.hjson @@ -14,14 +14,14 @@ build_mode: "cover_reg_top" uvm_test_seq: "{name}_common_vseq" run_opts: ["+run_tl_errors"] - reseed: 20 + reseed: 25 } { name: "{name}_tl_intg_err" build_mode: "cover_reg_top" uvm_test_seq: "{name}_common_vseq" run_opts: ["+run_tl_intg_err", "+en_scb=0"] - reseed: 20 + reseed: 25 } ] } diff --git a/hw/vendor/lowrisc_ip/dv/tools/ralgen/README.md b/hw/vendor/lowrisc_ip/dv/tools/ralgen/README.md index d8122ec3f..7bbbff930 100644 --- a/hw/vendor/lowrisc_ip/dv/tools/ralgen/README.md +++ b/hw/vendor/lowrisc_ip/dv/tools/ralgen/README.md @@ -54,7 +54,7 @@ targets: default: ... generate: - - ral + - "!chip_level ? (ral)" ``` Note that the path to `hjson` specification in the snippet above is relative diff --git a/hw/vendor/lowrisc_ip/dv/verilator/simutil_verilator/cpp/verilated_toplevel.h b/hw/vendor/lowrisc_ip/dv/verilator/simutil_verilator/cpp/verilated_toplevel.h index f8af5b368..b1686af36 100644 --- a/hw/vendor/lowrisc_ip/dv/verilator/simutil_verilator/cpp/verilated_toplevel.h +++ b/hw/vendor/lowrisc_ip/dv/verilator/simutil_verilator/cpp/verilated_toplevel.h @@ -81,11 +81,11 @@ class VerilatedTracer { */ class VerilatedTracer { public: - VerilatedTracer(){}; + VerilatedTracer() {}; ~VerilatedTracer() {} bool isOpen() const { return false; }; - void open(const char *filename){}; - void close(){}; + void open(const char *filename) {}; + void close() {}; void dump(vluint64_t timeui) {} }; #endif // VM_TRACE == 1 @@ -115,8 +115,8 @@ class TOPLEVEL_NAME; */ class VerilatedToplevel { public: - VerilatedToplevel(){}; - virtual ~VerilatedToplevel(){}; + VerilatedToplevel() {}; + virtual ~VerilatedToplevel() {}; virtual void eval() = 0; virtual void final() = 0; diff --git a/hw/vendor/lowrisc_ip/ip/entropy_src/dv/entropy_src_base_sim_cfg.hjson b/hw/vendor/lowrisc_ip/ip/entropy_src/dv/entropy_src_base_sim_cfg.hjson index df6660a9b..0fbfabe4f 100644 --- a/hw/vendor/lowrisc_ip/ip/entropy_src/dv/entropy_src_base_sim_cfg.hjson +++ b/hw/vendor/lowrisc_ip/ip/entropy_src/dv/entropy_src_base_sim_cfg.hjson @@ -32,8 +32,7 @@ "{proj_root}/hw/vendor/lowrisc_ip/dv/tools/dvsim/tests/alert_test.hjson", "{proj_root}/hw/vendor/lowrisc_ip/dv/tools/dvsim/tests/tl_access_tests.hjson", "{proj_root}/hw/vendor/lowrisc_ip/dv/tools/dvsim/tests/sec_cm_tests.hjson", - // TODO: import `stress_tests.hjson` once hanging issue is resolved. - "{proj_root}/hw/vendor/lowrisc_ip/dv/tools/dvsim/tests/stress_all_test.hjson"] + "{proj_root}/hw/vendor/lowrisc_ip/dv/tools/dvsim/tests/stress_tests.hjson"] // Add additional tops for simulation. sim_tops: ["entropy_src_bind", "entropy_src_cov_bind", "sec_cm_prim_onehot_check_bind"] @@ -102,6 +101,11 @@ uvm_test_seq: entropy_src_stress_all_vseq } + { + name: entropy_src_stress_all_with_rand_reset + reseed: 10 + } + { name: entropy_src_fw_ov reseed: 300 diff --git a/hw/vendor/lowrisc_ip/ip/entropy_src/dv/env/entropy_src_env.core b/hw/vendor/lowrisc_ip/ip/entropy_src/dv/env/entropy_src_env.core index 15504c853..ee3a9cc38 100644 --- a/hw/vendor/lowrisc_ip/ip/entropy_src/dv/env/entropy_src_env.core +++ b/hw/vendor/lowrisc_ip/ip/entropy_src/dv/env/entropy_src_env.core @@ -53,4 +53,4 @@ targets: filesets: - files_dv generate: - - ral + - "!chip_level ? (ral)" diff --git a/hw/vendor/lowrisc_ip/ip/i2c/dv/env/i2c_env.core b/hw/vendor/lowrisc_ip/ip/i2c/dv/env/i2c_env.core index 27b946171..ce50a4bd5 100644 --- a/hw/vendor/lowrisc_ip/ip/i2c/dv/env/i2c_env.core +++ b/hw/vendor/lowrisc_ip/ip/i2c/dv/env/i2c_env.core @@ -76,4 +76,4 @@ targets: filesets: - files_dv generate: - - ral + - "!chip_level ? (ral)" diff --git a/hw/vendor/lowrisc_ip/ip/i2c/dv/i2c_sim_cfg.hjson b/hw/vendor/lowrisc_ip/ip/i2c/dv/i2c_sim_cfg.hjson index db081a6fd..b99af21e0 100644 --- a/hw/vendor/lowrisc_ip/ip/i2c/dv/i2c_sim_cfg.hjson +++ b/hw/vendor/lowrisc_ip/ip/i2c/dv/i2c_sim_cfg.hjson @@ -40,7 +40,7 @@ vcs_cov_excl_files: ["{proj_root}/hw/vendor/lowrisc_ip/ip/i2c/dv/cov/i2c_cov_excl.el"] // Default iterations for all tests - each test entry can override this. - reseed: 50 + reseed: 10 // Default UVM test and seq class name. uvm_test: i2c_base_test @@ -62,11 +62,13 @@ { name: i2c_host_smoke uvm_test_seq: i2c_host_smoke_vseq + reseed: 5 } { name: i2c_host_override uvm_test_seq: i2c_host_override_vseq + reseed: 50 } // TODO(#21887) Removed pending DV fixes after removal @@ -80,59 +82,70 @@ { name: i2c_host_fifo_watermark uvm_test_seq: i2c_host_fifo_watermark_vseq + reseed: 5 } { name: i2c_host_fifo_overflow uvm_test_seq: i2c_host_fifo_overflow_vseq + reseed: 5 } { name: i2c_host_fifo_reset_fmt uvm_test_seq: i2c_host_fifo_reset_fmt_vseq run_opts: ["+test_timeout_ns=10_000_000"] + reseed: 25 } { name: i2c_host_fifo_fmt_empty uvm_test_seq: i2c_host_fifo_fmt_empty_vseq run_opts: ["+test_timeout_ns=10_000_000"] + reseed: 5 } { name: i2c_host_fifo_reset_rx uvm_test_seq: i2c_host_fifo_reset_rx_vseq run_opts: ["+test_timeout_ns=10_000_000"] + reseed: 5 } { name: i2c_host_fifo_full uvm_test_seq: i2c_host_fifo_full_vseq + reseed: 5 } { name: i2c_host_perf uvm_test_seq: i2c_host_perf_vseq + reseed: 5 } { name: i2c_host_perf_precise uvm_test_seq: i2c_host_perf_precise_vseq + reseed: 5 } { name: i2c_host_stretch_timeout uvm_test_seq: i2c_host_stretch_timeout_vseq + reseed: 5 } { name: i2c_host_error_intr uvm_test_seq: i2c_host_error_intr_vseq + reseed: 50 } { name: i2c_host_stress_all uvm_test_seq: i2c_host_stress_all_vseq + reseed: 30 } { name: i2c_target_glitch @@ -144,39 +157,46 @@ name: i2c_target_smoke uvm_test_seq: i2c_target_smoke_vseq run_opts: ["+i2c_agent_mode=Host", "+test_timeout_ns=100_000_000"] + reseed: 5 } { name: i2c_target_stress_wr uvm_test_seq: i2c_target_stress_wr_vseq run_opts: ["+i2c_agent_mode=Host", "+test_timeout_ns=600_000_000"] + reseed: 5 } { name: i2c_target_stress_rd uvm_test_seq: i2c_target_stress_rd_vseq run_opts: ["+i2c_agent_mode=Host", "+test_timeout_ns=100_000_000"] + reseed: 5 } { name: i2c_target_stretch uvm_test_seq: i2c_target_stretch_vseq run_opts: ["+i2c_agent_mode=Host", "+test_timeout_ns=400_000_000"] + reseed: 5 } { name: i2c_target_intr_smoke uvm_test_seq: i2c_target_smoke_vseq run_opts: ["+i2c_agent_mode=Host", "+test_timeout_ns=200_000_000", "+use_intr_handler=1"] + reseed: 5 } { name: i2c_target_intr_stress_wr uvm_test_seq: i2c_target_stress_wr_vseq run_opts: ["+i2c_agent_mode=Host", "+test_timeout_ns=600_000_000", "+use_intr_handler=1", "+slow_acq=1"] + reseed: 5 } { name: i2c_target_timeout uvm_test_seq: i2c_target_timeout_vseq run_opts: ["+i2c_agent_mode=Host", "+test_timeout_ns=50_000_000", "+use_intr_handler=1"] + reseed: 5 } { name: i2c_target_unexp_stop @@ -189,36 +209,42 @@ uvm_test_seq: i2c_target_fifo_reset_acq_vseq run_opts: ["+i2c_agent_mode=Host", "+test_timeout_ns=20_000_000", "+use_intr_handler=1"] + reseed: 5 } { name: i2c_target_fifo_reset_tx uvm_test_seq: i2c_target_fifo_reset_tx_vseq run_opts: ["+i2c_agent_mode=Host", "+test_timeout_ns=20_000_000", "+use_intr_handler=1"] + reseed: 50 } { name: i2c_target_perf uvm_test_seq: i2c_target_perf_vseq run_opts: ["+i2c_agent_mode=Host", "+test_timeout_ns=20_000_000", "+use_intr_handler=1"] + reseed: 5 } { name: i2c_target_stress_all uvm_test_seq: i2c_target_stress_all_vseq run_opts: ["+i2c_agent_mode=Host", "+test_timeout_ns=300_000_000", "+use_intr_handler=1"] + reseed: 30 } { name: i2c_target_bad_addr uvm_test_seq: i2c_target_smoke_vseq run_opts: ["+i2c_agent_mode=Host", "+test_timeout_ns=20_000_000", "+use_intr_handler=1", "+i2c_bad_addr_pct=50"] + reseed: 5 } { name: i2c_target_hrst uvm_test_seq: i2c_target_hrst_vseq run_opts: ["+i2c_agent_mode=Host", "+test_timeout_ns=20_000_000", "+use_intr_handler=1"] + reseed: 50 } { name: "i2c_host_stress_all_with_rand_reset" @@ -241,10 +267,12 @@ name: "i2c_host_mode_toggle" uvm_test_seq: "i2c_host_mode_toggle_vseq" run_timeout_mins: 10 + reseed: 50 } { name: "i2c_host_may_nack" uvm_test_seq: "i2c_host_may_nack_vseq" + reseed: 50 } { name: i2c_target_fifo_watermarks_acq @@ -252,6 +280,7 @@ run_opts: ["+i2c_agent_mode=Host", "+test_timeout_ns=20_000_000", "+use_intr_handler=1"] + reseed: 5 } { name: i2c_target_fifo_watermarks_tx @@ -259,6 +288,7 @@ run_opts: ["+i2c_agent_mode=Host", "+test_timeout_ns=20_000_000", "+use_intr_handler=1"] + reseed: 5 } { name: i2c_target_tx_stretch_ctrl @@ -266,6 +296,7 @@ run_opts: ["+i2c_agent_mode=Host", "+test_timeout_ns=20_000_000", "+use_intr_handler=1"] + reseed: 5 } { name: i2c_target_smbus_maxlen @@ -273,6 +304,7 @@ run_opts: ["+i2c_agent_mode=Host", "+test_timeout_ns=20_000_000", "+use_intr_handler=1"] + reseed: 5 } { name: i2c_target_nack_acqfull @@ -280,6 +312,7 @@ run_opts: ["+i2c_agent_mode=Host", "+test_timeout_ns=20_000_000", "+use_intr_handler=1"] + reseed: 50 } { name: i2c_target_nack_acqfull_addr @@ -287,6 +320,7 @@ run_opts: ["+i2c_agent_mode=Host", "+test_timeout_ns=20_000_000", "+use_intr_handler=1"] + reseed: 50 } { name: i2c_target_nack_txstretch @@ -294,6 +328,7 @@ run_opts: ["+i2c_agent_mode=Host", "+test_timeout_ns=20_000_000", "+use_intr_handler=1"] + reseed: 30 } ] diff --git a/hw/vendor/lowrisc_ip/ip/i2c/dv/tb/tb.sv b/hw/vendor/lowrisc_ip/ip/i2c/dv/tb/tb.sv index f969eeb42..b141da03c 100644 --- a/hw/vendor/lowrisc_ip/ip/i2c/dv/tb/tb.sv +++ b/hw/vendor/lowrisc_ip/ip/i2c/dv/tb/tb.sv @@ -80,7 +80,7 @@ module tb; .clk_i (clk ), .rst_ni (rst_n ), .ram_cfg_i (prim_ram_1p_pkg::RAM_1P_CFG_DEFAULT), - .ram_cfg_rsp_o ( ), + .ram_cfg_rsp_o ( ), .tl_i (tl_if.h2d ), .tl_o (tl_if.d2h ), diff --git a/hw/vendor/lowrisc_ip/ip/kmac/dv/dpi/digestpp_dpi.cc b/hw/vendor/lowrisc_ip/ip/kmac/dv/dpi/digestpp_dpi.cc index 40c9dadc3..4c498ad3b 100644 --- a/hw/vendor/lowrisc_ip/ip/kmac/dv/dpi/digestpp_dpi.cc +++ b/hw/vendor/lowrisc_ip/ip/kmac/dv/dpi/digestpp_dpi.cc @@ -217,7 +217,7 @@ extern void c_dpi_cshake256(const svOpenArrayHandle msg, extern void c_dpi_kmac128(const svOpenArrayHandle msg, uint64_t msg_len, const svOpenArrayHandle key, uint64_t key_len, const char *customization_str, uint64_t output_len, - svBitVecVal *digest) { + svOpenArrayHandle digest) { uint64_t output_len_bits = output_len * 8; // Load message from SV memory @@ -255,7 +255,7 @@ extern void c_dpi_kmac128(const svOpenArrayHandle msg, uint64_t msg_len, extern void c_dpi_kmac128_xof(const svOpenArrayHandle msg, uint64_t msg_len, const svOpenArrayHandle key, uint64_t key_len, const char *customization_str, - uint64_t output_len, svBitVecVal *digest) { + uint64_t output_len, svOpenArrayHandle digest) { // Load message from SV memory uint8_t *msg_arr = (uint8_t *)malloc(msg_len * sizeof(uint8_t)); load_arr_from_simulator(msg, msg_arr, msg_len); @@ -291,7 +291,7 @@ extern void c_dpi_kmac128_xof(const svOpenArrayHandle msg, uint64_t msg_len, extern void c_dpi_kmac256(const svOpenArrayHandle msg, uint64_t msg_len, const svOpenArrayHandle key, uint64_t key_len, const char *customization_str, uint64_t output_len, - svBitVecVal *digest) { + svOpenArrayHandle digest) { uint64_t output_len_bits = output_len * 8; // Load message from SV memory @@ -329,7 +329,7 @@ extern void c_dpi_kmac256(const svOpenArrayHandle msg, uint64_t msg_len, extern void c_dpi_kmac256_xof(const svOpenArrayHandle msg, uint64_t msg_len, const svOpenArrayHandle key, uint64_t key_len, const char *customization_str, - uint64_t output_len, svBitVecVal *digest) { + uint64_t output_len, svOpenArrayHandle digest) { // Load message from SV memory uint8_t *msg_arr = (uint8_t *)malloc(msg_len * sizeof(uint8_t)); load_arr_from_simulator(msg, msg_arr, msg_len); diff --git a/hw/vendor/lowrisc_ip/ip/kmac/dv/env/kmac_env.core b/hw/vendor/lowrisc_ip/ip/kmac/dv/env/kmac_env.core index 659a4a557..86f2749b8 100644 --- a/hw/vendor/lowrisc_ip/ip/kmac/dv/env/kmac_env.core +++ b/hw/vendor/lowrisc_ip/ip/kmac/dv/env/kmac_env.core @@ -63,4 +63,4 @@ targets: filesets: - files_dv generate: - - ral + - "!chip_level ? (ral)" diff --git a/hw/vendor/lowrisc_ip/ip/kmac/dv/env/kmac_env_pkg.sv b/hw/vendor/lowrisc_ip/ip/kmac/dv/env/kmac_env_pkg.sv index 88ebe4763..71400e8fa 100644 --- a/hw/vendor/lowrisc_ip/ip/kmac/dv/env/kmac_env_pkg.sv +++ b/hw/vendor/lowrisc_ip/ip/kmac/dv/env/kmac_env_pkg.sv @@ -73,7 +73,8 @@ package kmac_env_pkg; // Earlgrey has 3 application interfaces parameter uint NUM_APP_INTF = 3; parameter app_config_t APP_CFG[NUM_APP_INTF] = - '{kmac_pkg::AppCfgKeyMgr, kmac_pkg::AppCfgLcCtrl, kmac_pkg::AppCfgRomCtrl}; + '{kmac_pkg::AppCfgKeyMgr, kmac_pkg::AppCfgLcCtrl, + kmac_pkg::AppCfgRomCtrl}; ///////////////////////////// // Timing Model Parameters // @@ -144,7 +145,8 @@ package kmac_env_pkg; typedef enum int { AppKeymgr, AppLc, - AppRom + AppRom, + AppOtbn } kmac_app_e; // state values of the App FSM @@ -155,8 +157,10 @@ package kmac_env_pkg; StAppOutLen = 10'b1011001111, StAppProcess = 10'b1000100110, StAppWait = 10'b0010010110, + StAppPushDigest = 10'b0000000001, + StAppFinish = 10'b0000000010, StSw = 10'b0111111111, - StKeyMgrErrKeyNotValid = 10'b1001110100, + StErrorKeyNotValid = 10'b1001110100, StError = 10'b1101011101 } kmac_app_st_e; diff --git a/hw/vendor/lowrisc_ip/ip/kmac/dv/env/kmac_scoreboard.sv b/hw/vendor/lowrisc_ip/ip/kmac/dv/env/kmac_scoreboard.sv index 018009c70..02e505137 100644 --- a/hw/vendor/lowrisc_ip/ip/kmac/dv/env/kmac_scoreboard.sv +++ b/hw/vendor/lowrisc_ip/ip/kmac/dv/env/kmac_scoreboard.sv @@ -129,7 +129,7 @@ class kmac_scoreboard extends cip_base_scoreboard #( // input message from keymgr byte kmac_app_msg[$]; - // output digest from KMAC_APP intf (256 bits each) + // output digest from static KMAC_APP interfaces bit [kmac_pkg::AppDigestW-1:0] kmac_app_digest_share0; bit [kmac_pkg::AppDigestW-1:0] kmac_app_digest_share1; @@ -332,14 +332,17 @@ class kmac_scoreboard extends cip_base_scoreboard #( // we need to choose the correct application interface if (`KMAC_APP_VALID_TRANS(AppKeymgr)) begin app_mode = AppKeymgr; - strength = sha3_pkg::L256; + strength = APP_CFG[app_mode].KeccakStrength; if (entropy_ready) incr_and_predict_hash_cnt(); end else if (`KMAC_APP_VALID_TRANS(AppLc)) begin app_mode = AppLc; - strength = sha3_pkg::L128; + strength = APP_CFG[app_mode].KeccakStrength; end else if (`KMAC_APP_VALID_TRANS(AppRom)) begin app_mode = AppRom; - strength = sha3_pkg::L256; + strength = APP_CFG[app_mode].KeccakStrength; + end else if (`KMAC_APP_VALID_TRANS(AppOtbn)) begin + `uvm_fatal(get_full_name(), + "Cannot start KMAC app for OTBN (no support for dynamic apps yet)") end // sample sideload-related coverage @@ -406,7 +409,7 @@ class kmac_scoreboard extends cip_base_scoreboard #( StAppCfg: begin if (app_mode == AppKeymgr && !cfg.keymgr_sideload_agent_cfg.vif.sideload_key.valid) begin - app_st = StKeyMgrErrKeyNotValid; + app_st = StErrorKeyNotValid; end else begin app_st = StAppMsg; end @@ -430,10 +433,16 @@ class kmac_scoreboard extends cip_base_scoreboard #( end StAppWait: begin if (keccak_complete_cycle) begin - app_st = StIdle; - app_fsm_active = 0; + app_st = StAppPushDigest; end end + StAppPushDigest: begin + app_st = StAppFinish; + end + StAppFinish: begin + app_st = StIdle; + app_fsm_active = 0; + end StSw: begin app_mux_sel = SelSw; if (checked_kmac_cmd == CmdDone) begin @@ -441,7 +450,7 @@ class kmac_scoreboard extends cip_base_scoreboard #( app_fsm_active = 0; end end - StKeyMgrErrKeyNotValid: begin + StErrorKeyNotValid: begin app_st = StError; app_fsm_active = 0; in_kmac_app = 0; @@ -563,7 +572,7 @@ class kmac_scoreboard extends cip_base_scoreboard #( cov.app_cg_wrappers[app_mode].app_sample( kmac_app_rsp.byte_data_q.size() <= kmac_pkg::MsgWidth/8, '0, - kmac_app_rsp.rsp_error, + kmac_app_rsp.error, 1, 0 ); @@ -582,20 +591,20 @@ class kmac_scoreboard extends cip_base_scoreboard #( ((cfg.enable_masking && !entropy_ready) || cfg.key_invalidated)); // Check app interface errors have been reported as expected. - `DV_CHECK_FATAL(kmac_app_rsp.rsp_error == app_intf_err) + `DV_CHECK_FATAL(kmac_app_rsp.error == app_intf_err) // Check that digests have been zeroed if there was an interface error. If not, // extract the digests and (if configured) check they are correct. if (app_intf_err) begin - `DV_CHECK_FATAL(kmac_app_rsp.rsp_digest_share0 == 0, + `DV_CHECK_FATAL(kmac_app_rsp.digest_s0 == 0, "APP interface error, expect output to be all 0s") - `DV_CHECK_FATAL(kmac_app_rsp.rsp_digest_share1 == 0, + `DV_CHECK_FATAL(kmac_app_rsp.digest_s1 == 0, "APP interface error, expect output to be all 0s") end else begin - // assign digest values - kmac_app_digest_share0 = kmac_app_rsp.rsp_digest_share0; - kmac_app_digest_share1 = kmac_app_rsp.rsp_digest_share1; + // Static app interface: assign digest values directly + kmac_app_digest_share0 = kmac_app_rsp.digest_s0; + kmac_app_digest_share1 = kmac_app_rsp.digest_s1; if (do_check_digest) check_digest(); end @@ -1469,9 +1478,8 @@ class kmac_scoreboard extends cip_base_scoreboard #( // - the expected output length in bytes // - if we are using the xof version of kmac if (in_kmac_app) begin - // KMAC_APP output will always be 384 bits (48 bytes) + // Static app interfaces always return 384 bits (48 bytes). output_len_bytes = AppDigestW / 8; - // xof_en is 1 when the padded output length is 0, // but this will never happen in KMAC_APP xof_en = 0; @@ -1511,7 +1519,7 @@ class kmac_scoreboard extends cip_base_scoreboard #( ///////////////////////////////// if (cfg.enable_masking) begin if (in_kmac_app) begin - unmasked_digest = {<< byte {kmac_app_digest_share0 ^ kmac_app_digest_share1}}; + unmasked_digest = {<< byte {kmac_app_digest_share0 ^ kmac_app_digest_share1}}; end else begin foreach (unmasked_digest[i]) begin unmasked_digest[i] = digest_share0[i] ^ digest_share1[i]; diff --git a/hw/vendor/lowrisc_ip/ip/kmac/dv/env/seq_lib/kmac_app_vseq.sv b/hw/vendor/lowrisc_ip/ip/kmac/dv/env/seq_lib/kmac_app_vseq.sv index 4cc702fda..fb1c2b0e2 100644 --- a/hw/vendor/lowrisc_ip/ip/kmac/dv/env/seq_lib/kmac_app_vseq.sv +++ b/hw/vendor/lowrisc_ip/ip/kmac/dv/env/seq_lib/kmac_app_vseq.sv @@ -7,6 +7,13 @@ class kmac_app_vseq extends kmac_sideload_vseq; `uvm_object_utils(kmac_app_vseq) `uvm_object_new + // Restrict all tests based on this sequence to static interfaces until the complete DV can + // handle dynamic interfaces. + // TODO: Remove constraint once DV fully supports dynamic interfaces. + constraint app_mode_c { + app_mode inside {AppKeymgr, AppLc, AppRom}; + } + constraint en_app_c { en_app dist { 0 :/ 3, diff --git a/hw/vendor/lowrisc_ip/ip/kmac/dv/env/seq_lib/kmac_common_vseq.sv b/hw/vendor/lowrisc_ip/ip/kmac/dv/env/seq_lib/kmac_common_vseq.sv index 1382fc168..4be489c45 100644 --- a/hw/vendor/lowrisc_ip/ip/kmac/dv/env/seq_lib/kmac_common_vseq.sv +++ b/hw/vendor/lowrisc_ip/ip/kmac/dv/env/seq_lib/kmac_common_vseq.sv @@ -113,7 +113,7 @@ class kmac_common_vseq extends kmac_base_vseq; super.shadow_reg_err_ctrl_svas(enable, path); endfunction - virtual function void set_tl_assert_en(bit enable, string path = "*"); + virtual protected function void set_tl_assert_en(bit enable, string path = "*"); set_kmac_csr_assert_en(enable); super.set_tl_assert_en(enable, path); endfunction diff --git a/hw/vendor/lowrisc_ip/ip/kmac/dv/env/seq_lib/kmac_sideload_invalid_vseq.sv b/hw/vendor/lowrisc_ip/ip/kmac/dv/env/seq_lib/kmac_sideload_invalid_vseq.sv index 5fcf643e3..2d80080ce 100644 --- a/hw/vendor/lowrisc_ip/ip/kmac/dv/env/seq_lib/kmac_sideload_invalid_vseq.sv +++ b/hw/vendor/lowrisc_ip/ip/kmac/dv/env/seq_lib/kmac_sideload_invalid_vseq.sv @@ -150,7 +150,7 @@ class kmac_sideload_invalid_vseq extends kmac_long_msg_and_output_vseq; csr_wr(.ptr(ral.cmd.err_processed), .value(1)); end else begin // Normal operation, wait until KMAC operation has finished. - wait (cfg.m_kmac_app_agent_cfg[app_mode].vif.rsp_done == 1); + wait (cfg.m_kmac_app_agent_cfg[app_mode].vif.rsp_valid == 1); end endtask diff --git a/hw/vendor/lowrisc_ip/ip/kmac/dv/env/seq_lib/kmac_smoke_vseq.sv b/hw/vendor/lowrisc_ip/ip/kmac/dv/env/seq_lib/kmac_smoke_vseq.sv index 70ee26baa..6d697c2ee 100644 --- a/hw/vendor/lowrisc_ip/ip/kmac/dv/env/seq_lib/kmac_smoke_vseq.sv +++ b/hw/vendor/lowrisc_ip/ip/kmac/dv/env/seq_lib/kmac_smoke_vseq.sv @@ -238,7 +238,7 @@ class kmac_smoke_vseq extends kmac_base_vseq; end else begin // Wait until the KMAC engine has completely finished `uvm_info(`gfn, "waiting for kmac_app operation to finish", UVM_HIGH) - wait (cfg.m_kmac_app_agent_cfg[app_mode].vif.rsp_done == 1); + wait (cfg.m_kmac_app_agent_cfg[app_mode].vif.rsp_valid == 1); `uvm_info(`gfn, "finished waiting for kmac_app operation", UVM_HIGH) if (kmac_err_type inside @@ -344,7 +344,10 @@ class kmac_smoke_vseq extends kmac_base_vseq; end else begin // If we don't read out the state window again, wait a few clocks before dropping the // sideload key (if applicable). - cfg.clk_rst_vif.wait_clks(5); + // TODO: This delay must be at least the rsp_delay_max from the app agent config. Otherwise + // the key can get invalidated before the response arrives which results in an error. We + // should change this that we wait until the response actually has arrived. + cfg.clk_rst_vif.wait_clks(10); end // Drop the sideloaded key if it was provided to the DUT. diff --git a/hw/vendor/lowrisc_ip/ip/kmac/dv/kmac_base_sim_cfg.hjson b/hw/vendor/lowrisc_ip/ip/kmac/dv/kmac_base_sim_cfg.hjson index d07d3ef5c..2c73801dd 100644 --- a/hw/vendor/lowrisc_ip/ip/kmac/dv/kmac_base_sim_cfg.hjson +++ b/hw/vendor/lowrisc_ip/ip/kmac/dv/kmac_base_sim_cfg.hjson @@ -44,7 +44,7 @@ "sec_cm_prim_count_bind"] // Default iterations for all tests - each test entry can override this. - reseed: 50 + reseed: 20 run_opts: ["+test_timeout_ns=4_000_000_000"] @@ -106,6 +106,7 @@ name: "{name}_sideload_invalid" uvm_test_seq: kmac_sideload_invalid_vseq run_opts: ["+test_timeout_ns=1_000_000_000"] + reseed: 50 } { name: "{name}_burst_write" @@ -180,6 +181,7 @@ name: "{name}_app" uvm_test_seq: kmac_app_vseq run_opts: ["+test_timeout_ns=500_000_000"] + reseed: 25 } { name: "{name}_app_with_partial_data" @@ -225,6 +227,7 @@ { name: "{name}_lc_escalation" uvm_test_seq: kmac_lc_escalation_vseq + reseed: 50 } { name: kmac_stress_all diff --git a/hw/vendor/lowrisc_ip/ip/lc_ctrl/dv/env/lc_ctrl_env.core b/hw/vendor/lowrisc_ip/ip/lc_ctrl/dv/env/lc_ctrl_env.core index 297b771c5..ccd93ca0f 100644 --- a/hw/vendor/lowrisc_ip/ip/lc_ctrl/dv/env/lc_ctrl_env.core +++ b/hw/vendor/lowrisc_ip/ip/lc_ctrl/dv/env/lc_ctrl_env.core @@ -55,4 +55,4 @@ targets: filesets: - files_dv generate: - - ral + - "!chip_level ? (ral)" diff --git a/hw/vendor/lowrisc_ip/ip/lc_ctrl/dv/env/seq_lib/lc_ctrl_base_vseq.sv b/hw/vendor/lowrisc_ip/ip/lc_ctrl/dv/env/seq_lib/lc_ctrl_base_vseq.sv index 54fe5bcfd..4ed1097d5 100644 --- a/hw/vendor/lowrisc_ip/ip/lc_ctrl/dv/env/seq_lib/lc_ctrl_base_vseq.sv +++ b/hw/vendor/lowrisc_ip/ip/lc_ctrl/dv/env/seq_lib/lc_ctrl_base_vseq.sv @@ -96,7 +96,7 @@ class lc_ctrl_base_vseq extends cip_base_vseq #( endtask // some registers won't set to default value until otp_init is done - virtual task read_and_check_all_csrs_after_reset(); + virtual protected task read_and_check_all_csrs_after_reset(); lc_ctrl_init(); super.read_and_check_all_csrs_after_reset(); endtask diff --git a/hw/vendor/lowrisc_ip/ip/lc_ctrl/dv/lc_ctrl_base_sim_cfg.hjson b/hw/vendor/lowrisc_ip/ip/lc_ctrl/dv/lc_ctrl_base_sim_cfg.hjson index ea3398717..c1ffa8f8c 100644 --- a/hw/vendor/lowrisc_ip/ip/lc_ctrl/dv/lc_ctrl_base_sim_cfg.hjson +++ b/hw/vendor/lowrisc_ip/ip/lc_ctrl/dv/lc_ctrl_base_sim_cfg.hjson @@ -38,7 +38,7 @@ "sec_cm_prim_sparse_fsm_flop_bind", "sec_cm_prim_onehot_check_bind"] // Default iterations for all tests - each test entry can override this. - reseed: 50 + reseed: 10 overrides: [ // @@ -79,6 +79,7 @@ { name: lc_ctrl_smoke uvm_test_seq: lc_ctrl_smoke_vseq + reseed: 20 } { @@ -90,26 +91,31 @@ { name: lc_ctrl_state_failure uvm_test_seq: lc_ctrl_state_failure_vseq + reseed: 20 } { name: lc_ctrl_state_post_trans uvm_test_seq: lc_ctrl_state_post_trans_vseq + reseed: 20 } { name: lc_ctrl_prog_failure uvm_test_seq: lc_ctrl_prog_failure_vseq + reseed: 20 } { name: lc_ctrl_errors uvm_test_seq: lc_ctrl_lc_errors_vseq + reseed: 20 } { name: lc_ctrl_security_escalation uvm_test_seq: lc_ctrl_security_escalation_vseq + reseed: 20 } { diff --git a/hw/vendor/lowrisc_ip/ip/prim/dv/prim_alert/prim_alert_sim_cfg.hjson b/hw/vendor/lowrisc_ip/ip/prim/dv/prim_alert/prim_alert_sim_cfg.hjson index 8c1cb12d3..56dd01318 100644 --- a/hw/vendor/lowrisc_ip/ip/prim/dv/prim_alert/prim_alert_sim_cfg.hjson +++ b/hw/vendor/lowrisc_ip/ip/prim/dv/prim_alert/prim_alert_sim_cfg.hjson @@ -24,7 +24,7 @@ import_cfgs: ["{proj_root}/hw/vendor/lowrisc_ip/dv/tools/dvsim/common_sim_cfg.hjson"] // Default iterations for all tests - each test entry can override this. - reseed: 20 + reseed: 10 // Enable cdc instrumentation run_opts: ["+cdc_instrumentation_enabled=1"] @@ -52,6 +52,7 @@ tests: [ { name: prim_async_alert + reseed: 20 } { name: prim_async_fatal_alert diff --git a/hw/vendor/lowrisc_ip/ip/prim/dv/prim_lfsr/prim_lfsr_sim_cfg.hjson b/hw/vendor/lowrisc_ip/ip/prim/dv/prim_lfsr/prim_lfsr_sim_cfg.hjson index 5f9be6392..a181dc4ab 100644 --- a/hw/vendor/lowrisc_ip/ip/prim/dv/prim_lfsr/prim_lfsr_sim_cfg.hjson +++ b/hw/vendor/lowrisc_ip/ip/prim/dv/prim_lfsr/prim_lfsr_sim_cfg.hjson @@ -21,7 +21,7 @@ import_cfgs: ["{proj_root}/hw/vendor/lowrisc_ip/dv/tools/dvsim/common_sim_cfg.hjson"] // Default iterations for all tests - each test entry can override this. - reseed: 50 + reseed: 1 // Enable cdc instrumentation run_opts: ["+cdc_instrumentation_enabled=1"] diff --git a/hw/vendor/lowrisc_ip/ip/prim/dv/prim_present/prim_present_sim_cfg.hjson b/hw/vendor/lowrisc_ip/ip/prim/dv/prim_present/prim_present_sim_cfg.hjson index 1fe2df074..df20ae673 100644 --- a/hw/vendor/lowrisc_ip/ip/prim/dv/prim_present/prim_present_sim_cfg.hjson +++ b/hw/vendor/lowrisc_ip/ip/prim/dv/prim_present/prim_present_sim_cfg.hjson @@ -21,7 +21,7 @@ import_cfgs: ["{proj_root}/hw/vendor/lowrisc_ip/dv/tools/dvsim/common_sim_cfg.hjson"] // Default iterations for all tests - each test entry can override this. - reseed: 50 + reseed: 1 // Enable cdc instrumentation run_opts: ["+cdc_instrumentation_enabled=1"] diff --git a/hw/vendor/lowrisc_ip/ip/prim/dv/prim_prince/prim_prince_sim_cfg.hjson b/hw/vendor/lowrisc_ip/ip/prim/dv/prim_prince/prim_prince_sim_cfg.hjson index 6b7504cd0..620a4d18e 100644 --- a/hw/vendor/lowrisc_ip/ip/prim/dv/prim_prince/prim_prince_sim_cfg.hjson +++ b/hw/vendor/lowrisc_ip/ip/prim/dv/prim_prince/prim_prince_sim_cfg.hjson @@ -25,7 +25,7 @@ en_build_modes: ["{tool}_crypto_dpi_prince_build_opts"] // Default iterations for all tests - each test entry can override this. - reseed: 50 + reseed: 10 // Enable cdc instrumentation run_opts: ["+cdc_instrumentation_enabled=1"] @@ -50,12 +50,5 @@ name: smoke tests: ["prim_prince_test"] } - { - name: nightly - // Run the same test as the "smoke" regression, just with a higher reseed value. - // This higher reseed value is due to the rather large state space created by - // the 128-bit key and 64-bit data values. - reseed: 500 - } ] } diff --git a/hw/vendor/lowrisc_ip/ip/rom_ctrl/dv/cov/rom_ctrl_cov_excl.el b/hw/vendor/lowrisc_ip/ip/rom_ctrl/dv/cov/rom_ctrl_cov_excl.el index 2ae8a182d..4e00d2aa8 100644 --- a/hw/vendor/lowrisc_ip/ip/rom_ctrl/dv/cov/rom_ctrl_cov_excl.el +++ b/hw/vendor/lowrisc_ip/ip/rom_ctrl/dv/cov/rom_ctrl_cov_excl.el @@ -220,12 +220,8 @@ Condition 2 "803322985" "(wvalid_i & wready_o) 1 -1" (2 "10") INSTANCE: tb.dut // rom_cfg_i is tied to 0 inside the instantiation of rom_ctrl. -Toggle 0to1 rom_cfg_i.cfg [3:0] "logic rom_cfg_i.cfg[3:0]" -Toggle 1to0 rom_cfg_i.cfg [3:0] "logic rom_cfg_i.cfg[3:0]" -Toggle 0to1 rom_cfg_i.cfg_en "logic rom_cfg_i.cfg_en" -Toggle 1to0 rom_cfg_i.cfg_en "logic rom_cfg_i.cfg_en" -Toggle 0to1 rom_cfg_i.test "logic rom_cfg_i.test" -Toggle 1to0 rom_cfg_i.test "logic rom_cfg_i.test" +Toggle 0to1 rom_cfg_i.req [2:0] "logic rom_cfg_i.req[2:0]" +Toggle 1to0 rom_cfg_i.req [2:0] "logic rom_cfg_i.req[2:0]" // The bits [63:39] of kmac_data_o.data are zero-expanded in rom_ctrl.sv Toggle 0to1 kmac_data_o.data [63:39] "logic kmac_data_o.data[63:0]" diff --git a/hw/vendor/lowrisc_ip/ip/rom_ctrl/dv/cov/rom_ctrl_cov_if.sv b/hw/vendor/lowrisc_ip/ip/rom_ctrl/dv/cov/rom_ctrl_cov_if.sv index 2c4725dd0..1d69f7c88 100644 --- a/hw/vendor/lowrisc_ip/ip/rom_ctrl/dv/cov/rom_ctrl_cov_if.sv +++ b/hw/vendor/lowrisc_ip/ip/rom_ctrl/dv/cov/rom_ctrl_cov_if.sv @@ -38,8 +38,8 @@ interface rom_ctrl_cov_if ( bins stall_repeat = (1'b0[*1:10] => 1'b1 => 1'b0[*1:10]); } - // Cover the different delays on the kmac done signal - cp_kmac_done: coverpoint {kmac_data_i.done, exp_digest_de} { + // Cover the different delays on the kmac response valid signal + cp_kmac_digest_handshake: coverpoint {kmac_data_i.done, exp_digest_de} { bins kmac_first = {2'b11}; // kmac responds while still reading digest bins rom_first = (2'b00 => 2'b10); // kmac responds after digest read bins same_cycle = (2'b01 => 2'b10); // kmac responds as digest read completes diff --git a/hw/vendor/lowrisc_ip/ip/rom_ctrl/dv/env/rom_ctrl_bkdr_util.sv b/hw/vendor/lowrisc_ip/ip/rom_ctrl/dv/env/rom_ctrl_bkdr_util.sv index c5008b96b..da88a8a96 100644 --- a/hw/vendor/lowrisc_ip/ip/rom_ctrl/dv/env/rom_ctrl_bkdr_util.sv +++ b/hw/vendor/lowrisc_ip/ip/rom_ctrl/dv/env/rom_ctrl_bkdr_util.sv @@ -53,7 +53,8 @@ class rom_ctrl_bkdr_util extends mem_bkdr_util; end // Calculate the scrambled address - scrambled_addr = sram_scrambler_pkg::encrypt_sram_addr(addr_arr, addr_width, nonce_arr); + scrambled_addr = sram_scrambler_pkg::encrypt_sram_addr(addr_arr, addr_width, + mem_bkdr_util::depth, nonce_arr); for (int i = 0; i < addr_width; i++) begin mem_addr[i] = scrambled_addr[i]; @@ -112,7 +113,8 @@ class rom_ctrl_bkdr_util extends mem_bkdr_util; end // Calculate the scrambled address - scrambled_addr = sram_scrambler_pkg::encrypt_sram_addr(rom_addr, addr_width, nonce_arr); + scrambled_addr = sram_scrambler_pkg::encrypt_sram_addr(rom_addr, addr_width, + mem_bkdr_util::depth, nonce_arr); if (scramble_data) begin // Calculate the integrity constant diff --git a/hw/vendor/lowrisc_ip/ip/rom_ctrl/dv/env/rom_ctrl_env.core b/hw/vendor/lowrisc_ip/ip/rom_ctrl/dv/env/rom_ctrl_env.core index 7d240019c..39ae364b0 100644 --- a/hw/vendor/lowrisc_ip/ip/rom_ctrl/dv/env/rom_ctrl_env.core +++ b/hw/vendor/lowrisc_ip/ip/rom_ctrl/dv/env/rom_ctrl_env.core @@ -46,4 +46,4 @@ targets: - files_rtl - files_dv generate: - - ral + - "!chip_level ? (ral)" diff --git a/hw/vendor/lowrisc_ip/ip/rom_ctrl/dv/env/rom_ctrl_env_cfg.sv b/hw/vendor/lowrisc_ip/ip/rom_ctrl/dv/env/rom_ctrl_env_cfg.sv index d6f6776e9..e6b966dcc 100644 --- a/hw/vendor/lowrisc_ip/ip/rom_ctrl/dv/env/rom_ctrl_env_cfg.sv +++ b/hw/vendor/lowrisc_ip/ip/rom_ctrl/dv/env/rom_ctrl_env_cfg.sv @@ -99,7 +99,7 @@ function dv_base_reg_block rom_ctrl_env_cfg::create_ral_by_name(string name); if (name == RAL_T::type_name) begin return super.create_ral_by_name(name); end else if (name == rom_ral_name) begin - return rom_ctrl_prim_reg_block#(ROM_WORD_ADDR_WIDTH)::type_id::create(rom_ral_name); + return rom_ctrl_prim_reg_block#(ROM_SIZE_WORDS)::type_id::create(rom_ral_name); end else begin `uvm_error(`gfn, $sformatf("%0s is an illegal RAL model name", name)) end diff --git a/hw/vendor/lowrisc_ip/ip/rom_ctrl/dv/env/rom_ctrl_env_pkg.sv b/hw/vendor/lowrisc_ip/ip/rom_ctrl/dv/env/rom_ctrl_env_pkg.sv index c5531e28e..2bb6ccfa6 100644 --- a/hw/vendor/lowrisc_ip/ip/rom_ctrl/dv/env/rom_ctrl_env_pkg.sv +++ b/hw/vendor/lowrisc_ip/ip/rom_ctrl/dv/env/rom_ctrl_env_pkg.sv @@ -30,18 +30,21 @@ package rom_ctrl_env_pkg; parameter uint NUM_ALERTS = 1; parameter string LIST_OF_ALERTS[NUM_ALERTS] = {"fatal"}; - // The exact number of word address bits. - // Will be set to 15 for ROM0 and 16 for ROM1. - `ifndef ROM_BYTE_ADDR_WIDTH - `define ROM_BYTE_ADDR_WIDTH 32 + // The exact ROM size in bytes. + // Will be set to 32 KiB for ROM0 and 64 KiB ROM1. + // Can be a non-power-of-2 size but must be a multiple of 16 KiB for due to the + // scrambling. + `ifndef ROM_SIZE_BYTES + `define ROM_SIZE_BYTES 2**15 `endif // The top bytes in memory hold the digest // KMAC's max digest size is larger than what is required, so declare the size here. parameter uint DIGEST_SIZE = 256; - parameter uint ROM_WORD_ADDR_WIDTH = `ROM_BYTE_ADDR_WIDTH - $clog2(TL_DW / 8); - parameter uint ROM_SIZE_BYTES = 2 ** `ROM_BYTE_ADDR_WIDTH; - parameter uint ROM_SIZE_WORDS = 2 ** ROM_WORD_ADDR_WIDTH; + parameter uint ROM_SIZE_BYTES = `ROM_SIZE_BYTES; + parameter uint ROM_BYTE_ADDR_WIDTH = $clog2(ROM_SIZE_BYTES); + parameter uint ROM_WORD_ADDR_WIDTH = ROM_BYTE_ADDR_WIDTH - $clog2(TL_DW / 8); + parameter uint ROM_SIZE_WORDS = ROM_SIZE_BYTES / (TL_DW / 8); parameter uint MAX_CHECK_ADDR = ROM_SIZE_BYTES - (DIGEST_SIZE / 8); // The data for each line in rom up to the digest padded to the next byte boundary parameter uint KMAC_DATA_WORD_SIZE = (39 + 7) / 8; diff --git a/hw/vendor/lowrisc_ip/ip/rom_ctrl/dv/env/rom_ctrl_prim_ral_pkg.sv b/hw/vendor/lowrisc_ip/ip/rom_ctrl/dv/env/rom_ctrl_prim_ral_pkg.sv index 4ddee6e70..5420c4e9e 100644 --- a/hw/vendor/lowrisc_ip/ip/rom_ctrl/dv/env/rom_ctrl_prim_ral_pkg.sv +++ b/hw/vendor/lowrisc_ip/ip/rom_ctrl/dv/env/rom_ctrl_prim_ral_pkg.sv @@ -35,11 +35,11 @@ package rom_ctrl_prim_ral_pkg; endfunction : new - class rom_ctrl_prim_reg_block #(parameter int AddrWidth = 10) extends dv_base_reg_block; + class rom_ctrl_prim_reg_block #(parameter int MemDepth = 32) extends dv_base_reg_block; // memories - rand rom_ctrl_prim_mem_rom_mem #(2 ** AddrWidth) rom_mem; + rand rom_ctrl_prim_mem_rom_mem #(MemDepth) rom_mem; - `uvm_object_param_utils(rom_ctrl_prim_reg_block#(AddrWidth)) + `uvm_object_param_utils(rom_ctrl_prim_reg_block#(MemDepth)) extern function new(string name = "", int has_coverage = UVM_NO_COVERAGE); @@ -66,7 +66,7 @@ package rom_ctrl_prim_ral_pkg; end // create memories - rom_mem = rom_ctrl_prim_mem_rom_mem#(2 ** AddrWidth)::type_id::create("rom_mem"); + rom_mem = rom_ctrl_prim_mem_rom_mem#(MemDepth)::type_id::create("rom_mem"); rom_mem.configure(.parent(this)); default_map.add_mem(.mem(rom_mem), .offset(32'h0), diff --git a/hw/vendor/lowrisc_ip/ip/rom_ctrl/dv/env/rom_ctrl_scoreboard.sv b/hw/vendor/lowrisc_ip/ip/rom_ctrl/dv/env/rom_ctrl_scoreboard.sv index 7533e7f21..b94ba926f 100644 --- a/hw/vendor/lowrisc_ip/ip/rom_ctrl/dv/env/rom_ctrl_scoreboard.sv +++ b/hw/vendor/lowrisc_ip/ip/rom_ctrl/dv/env/rom_ctrl_scoreboard.sv @@ -36,7 +36,7 @@ class rom_ctrl_scoreboard extends cip_base_scoreboard #( // Check the data in a KMAC request. This is what rom_ctrl sent to KMAC and it should be a copy of // the contents of ROM, which we can read through a memory backdoor. This checks that rom_ctrl has // successfully read the contents of ROM. - extern function void check_kmac_data(const ref byte byte_data_q[$]); + extern function void check_kmac_data(const ref byte unsigned byte_data_q[$]); // Follow responses sent from KMAC. There will be one after each reset and it will be a response // to a request that was seen in process_kmac_req_fifo. @@ -108,7 +108,7 @@ task rom_ctrl_scoreboard::process_kmac_req_fifo(); endtask // Read data sent to the kmac block and check it against memory data -function void rom_ctrl_scoreboard::check_kmac_data(const ref byte byte_data_q[$]); +function void rom_ctrl_scoreboard::check_kmac_data(const ref byte unsigned byte_data_q[$]); int word = 0; int addr = 0; // Check that we received the expected amount of data @@ -147,7 +147,7 @@ task rom_ctrl_scoreboard::process_kmac_rsp_fifo(); // it's a DV bug: we should already have failed when the KMAC request was sent a few cycles ago. `DV_CHECK_FATAL(!rom_check_complete, "Extra KMAC response seen.") - kmac_digest = kmac_rsp.rsp_digest_share0 ^ kmac_rsp.rsp_digest_share1; + kmac_digest = kmac_rsp.digest_s0 ^ kmac_rsp.digest_s1; expected_digest = get_expected_digest(); update_ral_digests(kmac_digest, expected_digest); digest_good = prim_mubi_pkg::mubi4_bool_to_mubi( @@ -158,7 +158,7 @@ endtask function bit [DIGEST_SIZE-1:0] rom_ctrl_scoreboard::get_expected_digest(); bit [DIGEST_SIZE-1:0] digest; - bit [`ROM_BYTE_ADDR_WIDTH-1:0] dig_addr; + bit [ROM_BYTE_ADDR_WIDTH-1:0] dig_addr; // Get the digest from rom // The digest is the top 8 words in memory (unscrambled) dig_addr = MAX_CHECK_ADDR; diff --git a/hw/vendor/lowrisc_ip/ip/rom_ctrl/dv/env/seq_lib/rom_ctrl_base_vseq.sv b/hw/vendor/lowrisc_ip/ip/rom_ctrl/dv/env/seq_lib/rom_ctrl_base_vseq.sv index c36e874a9..b2c3adaf2 100644 --- a/hw/vendor/lowrisc_ip/ip/rom_ctrl/dv/env/seq_lib/rom_ctrl_base_vseq.sv +++ b/hw/vendor/lowrisc_ip/ip/rom_ctrl/dv/env/seq_lib/rom_ctrl_base_vseq.sv @@ -117,7 +117,7 @@ endtask // Pull the expected digest value from the top of rom function bit [DIGEST_SIZE-1:0] rom_ctrl_base_vseq::get_expected_digest(); bit [DIGEST_SIZE-1:0] digest; - bit [`ROM_BYTE_ADDR_WIDTH-1:0] dig_addr; + bit [ROM_BYTE_ADDR_WIDTH-1:0] dig_addr; // Get the digest from rom // The digest is the top 8 words in memory (unscrambled) dig_addr = MAX_CHECK_ADDR; diff --git a/hw/vendor/lowrisc_ip/ip/rom_ctrl/dv/env/seq_lib/rom_ctrl_kmac_err_chk_vseq.sv b/hw/vendor/lowrisc_ip/ip/rom_ctrl/dv/env/seq_lib/rom_ctrl_kmac_err_chk_vseq.sv index 91ef7c0e9..9363f3b5b 100644 --- a/hw/vendor/lowrisc_ip/ip/rom_ctrl/dv/env/seq_lib/rom_ctrl_kmac_err_chk_vseq.sv +++ b/hw/vendor/lowrisc_ip/ip/rom_ctrl/dv/env/seq_lib/rom_ctrl_kmac_err_chk_vseq.sv @@ -23,7 +23,7 @@ task rom_ctrl_kmac_err_chk_vseq::body(); fork wait(cfg.under_reset); begin - wait(cfg.m_kmac_agent_cfg.vif.mon_cb.rsp_done); + wait(cfg.m_kmac_agent_cfg.vif.mon_cb.rsp_valid); wait_for_fatal_alert(.max_delay(4), .max_wait_cycle(7)); `DV_CHECK_EQ(cfg.rom_ctrl_vif.pwrmgr_data.done, MuBi4False) end diff --git a/hw/vendor/lowrisc_ip/ip/rom_ctrl/dv/env/sram_scrambler_pkg.sv b/hw/vendor/lowrisc_ip/ip/rom_ctrl/dv/env/sram_scrambler_pkg.sv index a76718d2a..ba2c8b8bd 100644 --- a/hw/vendor/lowrisc_ip/ip/rom_ctrl/dv/env/sram_scrambler_pkg.sv +++ b/hw/vendor/lowrisc_ip/ip/rom_ctrl/dv/env/sram_scrambler_pkg.sv @@ -193,6 +193,7 @@ package sram_scrambler_pkg; // Encrypts the target SRAM address using the custom S&P network. function automatic state_t encrypt_sram_addr(logic addr[], int addr_width, + int depth, logic full_nonce[]); logic nonce[] = new[addr_width]; @@ -215,6 +216,7 @@ package sram_scrambler_pkg; // Decrypts the target SRAM address using the custom S&P network. function automatic state_t decrypt_sram_addr(logic addr[], int addr_width, + int depth, logic full_nonce[]); logic nonce[] = new[addr_width]; diff --git a/hw/vendor/lowrisc_ip/ip/rom_ctrl/dv/formal/tb.sv b/hw/vendor/lowrisc_ip/ip/rom_ctrl/dv/formal/tb.sv index 647c58ec6..524010560 100644 --- a/hw/vendor/lowrisc_ip/ip/rom_ctrl/dv/formal/tb.sv +++ b/hw/vendor/lowrisc_ip/ip/rom_ctrl/dv/formal/tb.sv @@ -7,11 +7,11 @@ module tb import rom_ctrl_reg_pkg::NumAlerts; - import prim_rom_pkg::rom_cfg_t; + import prim_rom_pkg::rom_cfg_req_t; ( input clk_i, input rst_ni, - input rom_cfg_t rom_cfg_i, + input rom_cfg_req_t rom_cfg_req_i, input tlul_pkg::tl_h2d_t rom_tl_i, output tlul_pkg::tl_d2h_t rom_tl_o, @@ -33,7 +33,8 @@ module tb rom_ctrl dut ( .clk_i, .rst_ni, - .rom_cfg_i, + .rom_cfg_i (rom_cfg_req_i), + .rom_cfg_o (), .rom_tl_i, .rom_tl_o, .regs_tl_i, diff --git a/hw/vendor/lowrisc_ip/ip/rom_ctrl/dv/rom_ctrl_192kB_sim_cfg.hjson b/hw/vendor/lowrisc_ip/ip/rom_ctrl/dv/rom_ctrl_192kB_sim_cfg.hjson new file mode 100644 index 000000000..2c34fa2a5 --- /dev/null +++ b/hw/vendor/lowrisc_ip/ip/rom_ctrl/dv/rom_ctrl_192kB_sim_cfg.hjson @@ -0,0 +1,13 @@ +// Copyright lowRISC contributors (OpenTitan project). +// Licensed under the Apache License, Version 2.0, see LICENSE for details. +// SPDX-License-Identifier: Apache-2.0 + +{ + // Name of the sim cfg variant + variant: 192kB + + // Import the base rom_ctrl sim_cfg file + import_cfgs: ["{proj_root}/hw/ip/rom_ctrl/dv/rom_ctrl_base_sim_cfg.hjson"] + + build_opts: ["+define+ROM_SIZE_BYTES=192*1024"] +} diff --git a/hw/vendor/lowrisc_ip/ip/rom_ctrl/dv/rom_ctrl_32kB_sim_cfg.hjson b/hw/vendor/lowrisc_ip/ip/rom_ctrl/dv/rom_ctrl_32kB_sim_cfg.hjson index a0b4a0ac7..83913d7d8 100644 --- a/hw/vendor/lowrisc_ip/ip/rom_ctrl/dv/rom_ctrl_32kB_sim_cfg.hjson +++ b/hw/vendor/lowrisc_ip/ip/rom_ctrl/dv/rom_ctrl_32kB_sim_cfg.hjson @@ -9,5 +9,5 @@ // Import the base rom_ctrl sim_cfg file import_cfgs: ["{proj_root}/hw/vendor/lowrisc_ip/ip/rom_ctrl/dv/rom_ctrl_base_sim_cfg.hjson"] - build_opts: ["+define+ROM_BYTE_ADDR_WIDTH=15"] + build_opts: ["+define+ROM_SIZE_BYTES=2**15"] } diff --git a/hw/vendor/lowrisc_ip/ip/rom_ctrl/dv/rom_ctrl_64kB_sim_cfg.hjson b/hw/vendor/lowrisc_ip/ip/rom_ctrl/dv/rom_ctrl_64kB_sim_cfg.hjson index 6d142edec..526fa4e0b 100644 --- a/hw/vendor/lowrisc_ip/ip/rom_ctrl/dv/rom_ctrl_64kB_sim_cfg.hjson +++ b/hw/vendor/lowrisc_ip/ip/rom_ctrl/dv/rom_ctrl_64kB_sim_cfg.hjson @@ -9,5 +9,5 @@ // Import the base rom_ctrl sim_cfg file import_cfgs: ["{proj_root}/hw/ip/rom_ctrl/dv/rom_ctrl_base_sim_cfg.hjson"] - build_opts: ["+define+ROM_BYTE_ADDR_WIDTH=16"] + build_opts: ["+define+ROM_SIZE_BYTES=2**16"] } diff --git a/hw/vendor/lowrisc_ip/ip/rom_ctrl/dv/tb/rom_ctrl_if.sv b/hw/vendor/lowrisc_ip/ip/rom_ctrl/dv/tb/rom_ctrl_if.sv index e62703526..ada85f9b5 100644 --- a/hw/vendor/lowrisc_ip/ip/rom_ctrl/dv/tb/rom_ctrl_if.sv +++ b/hw/vendor/lowrisc_ip/ip/rom_ctrl/dv/tb/rom_ctrl_if.sv @@ -36,8 +36,8 @@ interface rom_ctrl_if (); release dut.u_mux.sel_bus_qq; endtask - // Override the kmac_data_i.done signal to be true for a cycle, returning on the next negedge. - // (This will be one cycle if we start before the posedge) + // Override the kmac_data_i.done signal to be true for a cycle, returning on the next + // negedge. This will be one cycle if we start before the posedge. task static force_kmac_data_done(); force dut.kmac_data_i.done = 1; @(negedge dut.clk_i); diff --git a/hw/vendor/lowrisc_ip/ip/rom_ctrl/dv/tb/tb.sv b/hw/vendor/lowrisc_ip/ip/rom_ctrl/dv/tb/tb.sv index b5dc36543..0cea6ad09 100644 --- a/hw/vendor/lowrisc_ip/ip/rom_ctrl/dv/tb/tb.sv +++ b/hw/vendor/lowrisc_ip/ip/rom_ctrl/dv/tb/tb.sv @@ -20,7 +20,7 @@ module tb; kmac_pkg::app_req_t kmac_data_out; rom_ctrl_pkg::pwrmgr_data_t pwrmgr_data; rom_ctrl_pkg::keymgr_data_t keymgr_data; - logic kmac_done_occured; + logic kmac_digest_handshake_occured; // interfaces clk_rst_if clk_rst_if(.clk(clk), .rst_n(rst_n)); @@ -45,7 +45,7 @@ module tb; .clk_i (clk), .rst_ni (rst_n), - .rom_cfg_i (prim_rom_pkg::rom_cfg_t'('0)), + .rom_cfg_i (prim_rom_pkg::ROM_CFG_DEFAULT), .rom_tl_i (tl_rom_if.h2d), .rom_tl_o (tl_rom_if.d2h), @@ -114,19 +114,22 @@ module tb; run_test(); end // Only get one KMAC response - `ASSERT(JustOneKmacResponse_A, kmac_data_in.done |=> always !kmac_data_in.done, clk, rst_n) + `ASSERT(JustOneKmacResponse_A, kmac_data_in.done |=> always !kmac_data_in.done, + clk, rst_n) // Once we signal done to pwrmgr, the done signal stays high and the good signal stays stable. `ASSERT(PwrmgrDoneOneWay_A, $rose(pwrmgr_data.done == prim_mubi_pkg::MuBi4True) |=> always $stable(pwrmgr_data), clk, rst_n) // Don't send any KMAC requests once we've had the response - `ASSERT(KmacNotOutAfterIn_A, kmac_data_in.done |=> always !kmac_data_out.valid, clk, rst_n) + `ASSERT(KmacNotOutAfterIn_A, kmac_data_in.done |=> always !kmac_data_out.valid, + clk, rst_n) always_comb begin - if (!rst_n) kmac_done_occured = 0; - else if (kmac_data_in.done) kmac_done_occured = 1; + if (!rst_n) kmac_digest_handshake_occured = 0; + else if (kmac_data_in.done) kmac_digest_handshake_occured = 1; end // We see a response from KMAC before we assert that we're done to pwrmgr `ASSERT(KmacResponseBeforePwmgrDone_A, - pwrmgr_data.done != prim_mubi_pkg::MuBi4False |-> kmac_done_occured, clk, rst_n) + pwrmgr_data.done != prim_mubi_pkg::MuBi4False |-> kmac_digest_handshake_occured, + clk, rst_n) `undef ROM_CTRL_MEM_HIER endmodule diff --git a/hw/vendor/lowrisc_ip/ip/rv_timer/dv/env/rv_timer_env.core b/hw/vendor/lowrisc_ip/ip/rv_timer/dv/env/rv_timer_env.core index b482af1cc..09c681999 100644 --- a/hw/vendor/lowrisc_ip/ip/rv_timer/dv/env/rv_timer_env.core +++ b/hw/vendor/lowrisc_ip/ip/rv_timer/dv/env/rv_timer_env.core @@ -41,4 +41,4 @@ targets: filesets: - files_dv generate: - - ral + - "!chip_level ? (ral)" diff --git a/hw/vendor/lowrisc_ip/ip/rv_timer/dv/rv_timer_sim_cfg.hjson b/hw/vendor/lowrisc_ip/ip/rv_timer/dv/rv_timer_sim_cfg.hjson index f55b8190f..b031ae9de 100644 --- a/hw/vendor/lowrisc_ip/ip/rv_timer/dv/rv_timer_sim_cfg.hjson +++ b/hw/vendor/lowrisc_ip/ip/rv_timer/dv/rv_timer_sim_cfg.hjson @@ -20,6 +20,11 @@ // Testplan hjson file. testplan: "{proj_root}/hw/ip/rv_timer/data/rv_timer_testplan.hjson" + // Verification Plan related data. + vplan: "{self_dir}/../data/rv_timer_vplan.hjson" + cov_vplan_prepare_opts: ["--bypass-trace"] + cov_vplan_process_opts: [""] + // RAL spec - used to generate the RAL model. ral_spec: "{proj_root}/hw/ip/rv_timer/data/rv_timer.hjson" diff --git a/hw/vendor/lowrisc_ip/ip/spi_device/dv/base_sim_cfg.hjson b/hw/vendor/lowrisc_ip/ip/spi_device/dv/base_sim_cfg.hjson index 58e9c99e6..f333900ee 100644 --- a/hw/vendor/lowrisc_ip/ip/spi_device/dv/base_sim_cfg.hjson +++ b/hw/vendor/lowrisc_ip/ip/spi_device/dv/base_sim_cfg.hjson @@ -40,7 +40,7 @@ sim_tops: ["spi_device_bind", "sec_cm_prim_onehot_check_bind"] // Default iterations for all tests - each test entry can override this. - reseed: 50 + reseed: 15 // Enable cdc instrumentation. run_opts: ["+cdc_instrumentation_enabled=1"] @@ -140,16 +140,19 @@ { name: spi_device_flash_all uvm_test_seq: spi_device_flash_all_vseq + reseed: 25 } { name: spi_device_flash_and_tpm uvm_test_seq: spi_device_flash_and_tpm_vseq + reseed: 25 } { name: spi_device_flash_and_tpm_min_idle uvm_test_seq: spi_device_flash_and_tpm_min_idle_vseq + reseed: 25 } ] diff --git a/hw/vendor/lowrisc_ip/ip/spi_device/dv/env/seq_lib/spi_device_base_vseq.sv b/hw/vendor/lowrisc_ip/ip/spi_device/dv/env/seq_lib/spi_device_base_vseq.sv index 89541689e..706ec4466 100644 --- a/hw/vendor/lowrisc_ip/ip/spi_device/dv/env/seq_lib/spi_device_base_vseq.sv +++ b/hw/vendor/lowrisc_ip/ip/spi_device/dv/env/seq_lib/spi_device_base_vseq.sv @@ -52,7 +52,7 @@ class spi_device_base_vseq extends cip_base_vseq #( cfg.spi_cfg_sema.put(); endtask : dut_init - virtual task read_and_check_all_csrs_after_reset(); + virtual protected task read_and_check_all_csrs_after_reset(); delay_after_reset_before_access_csr(); super.read_and_check_all_csrs_after_reset(); endtask diff --git a/hw/vendor/lowrisc_ip/ip/spi_device/dv/env/seq_lib/spi_device_ram_cfg_vseq.sv b/hw/vendor/lowrisc_ip/ip/spi_device/dv/env/seq_lib/spi_device_ram_cfg_vseq.sv index 8ff5ab9ac..e80344d32 100644 --- a/hw/vendor/lowrisc_ip/ip/spi_device/dv/env/seq_lib/spi_device_ram_cfg_vseq.sv +++ b/hw/vendor/lowrisc_ip/ip/spi_device/dv/env/seq_lib/spi_device_ram_cfg_vseq.sv @@ -2,15 +2,16 @@ // Licensed under the Apache License, Version 2.0, see LICENSE for details. // SPDX-License-Identifier: Apache-2.0 -// Randomly set dut.ram_cfg_i and check this value is propagated to prim_mem_2p.. +// Randomly set dut.ram_cfg_sys2spi_i / dut.ram_cfg_spi2sys_i and check this value is +// propagated to the backing prim memory (cfg_i). class spi_device_ram_cfg_vseq extends spi_device_base_vseq; `uvm_object_utils(spi_device_ram_cfg_vseq) `uvm_object_new virtual task body(); - prim_ram_2p_pkg::ram_2p_cfg_t src_ram_cfg, dst_ram_cfg, egress_ram_cfg, ingress_ram_cfg; - string src_path = `SRAM_TYPE == spi_device_pkg::SramType2p ? "tb.dut.ram_cfg_sys2spi_i" : - "tb.dut.ram_cfg_spi2sys_i"; + prim_ram_1r1w_pkg::ram_1r1w_cfg_req_t src_ram_cfg, dst_ram_cfg, egress_ram_cfg, ingress_ram_cfg; + string src_path = `SRAM_TYPE == spi_device_pkg::SramType2p ? + "tb.dut.ram_cfg_sys2spi_i" : "tb.dut.ram_cfg_spi2sys_i"; string dst_path = "tb.dut.u_spid_dpram.gen_ram2p.u_memory_2p.u_mem.cfg_i"; string egress_path = "tb.dut.u_spid_dpram.gen_ram1r1w.u_sys2spi_mem.u_mem.cfg_i"; string ingress_path = "tb.dut.u_spid_dpram.gen_ram1r1w.u_spi2sys_mem.u_mem.cfg_i"; diff --git a/hw/vendor/lowrisc_ip/ip/spi_device/dv/env/seq_lib/spi_device_vseq_list.sv b/hw/vendor/lowrisc_ip/ip/spi_device/dv/env/seq_lib/spi_device_vseq_list.sv index b775c9528..df9c151df 100644 --- a/hw/vendor/lowrisc_ip/ip/spi_device/dv/env/seq_lib/spi_device_vseq_list.sv +++ b/hw/vendor/lowrisc_ip/ip/spi_device/dv/env/seq_lib/spi_device_vseq_list.sv @@ -6,7 +6,6 @@ `include "spi_device_common_vseq.sv" `include "spi_device_csb_read_vseq.sv" `include "spi_device_mem_parity_vseq.sv" -`include "spi_device_ram_cfg_vseq.sv" `include "spi_device_tpm_base_vseq.sv" `include "spi_device_tpm_read_hw_reg_vseq.sv" `include "spi_device_tpm_all_vseq.sv" diff --git a/hw/vendor/lowrisc_ip/ip/spi_device/dv/env/spi_device_env.core b/hw/vendor/lowrisc_ip/ip/spi_device/dv/env/spi_device_env.core index 01e1725c7..658ad9a0e 100644 --- a/hw/vendor/lowrisc_ip/ip/spi_device/dv/env/spi_device_env.core +++ b/hw/vendor/lowrisc_ip/ip/spi_device/dv/env/spi_device_env.core @@ -23,7 +23,6 @@ filesets: - seq_lib/spi_device_common_vseq.sv: {is_include_file: true} - seq_lib/spi_device_csb_read_vseq.sv: {is_include_file: true} - seq_lib/spi_device_mem_parity_vseq.sv: {is_include_file: true} - - seq_lib/spi_device_ram_cfg_vseq.sv: {is_include_file: true} - seq_lib/spi_device_tpm_base_vseq.sv: {is_include_file: true} - seq_lib/spi_device_tpm_read_hw_reg_vseq.sv: {is_include_file: true} - seq_lib/spi_device_tpm_all_vseq.sv: {is_include_file: true} @@ -58,4 +57,4 @@ targets: filesets: - files_dv generate: - - ral + - "!chip_level ? (ral)" diff --git a/hw/vendor/lowrisc_ip/ip/spi_device/dv/tb/tb.sv b/hw/vendor/lowrisc_ip/ip/spi_device/dv/tb/tb.sv index 77bce04c1..b6ceee1db 100644 --- a/hw/vendor/lowrisc_ip/ip/spi_device/dv/tb/tb.sv +++ b/hw/vendor/lowrisc_ip/ip/spi_device/dv/tb/tb.sv @@ -40,8 +40,8 @@ module tb; // Memory configuration signals. These signals are currently driven in: // spi_device_ram_cfg_vseq. They are connected here to avoid a warning - prim_ram_2p_pkg::ram_2p_cfg_t ram_cfg_sys2spi; - prim_ram_2p_pkg::ram_2p_cfg_t ram_cfg_spi2sys; + prim_ram_2p_pkg::ram_2p_cfg_t ram_cfg_sys2spi; + prim_ram_2p_pkg::ram_2p_cfg_t ram_cfg_spi2sys; assign ram_cfg_sys2spi = 0; assign ram_cfg_spi2sys = 0; diff --git a/hw/vendor/lowrisc_ip/ip/spi_host/dv/env/spi_host_env.core b/hw/vendor/lowrisc_ip/ip/spi_host/dv/env/spi_host_env.core index 616f24e93..95455569b 100644 --- a/hw/vendor/lowrisc_ip/ip/spi_host/dv/env/spi_host_env.core +++ b/hw/vendor/lowrisc_ip/ip/spi_host/dv/env/spi_host_env.core @@ -54,4 +54,4 @@ targets: filesets: - files_dv generate: - - ral + - "!chip_level ? (ral)" diff --git a/hw/vendor/lowrisc_ip/ip/spi_host/dv/spi_host_sim_cfg.hjson b/hw/vendor/lowrisc_ip/ip/spi_host/dv/spi_host_sim_cfg.hjson index d8df8d1d6..cbfa2e4ac 100644 --- a/hw/vendor/lowrisc_ip/ip/spi_host/dv/spi_host_sim_cfg.hjson +++ b/hw/vendor/lowrisc_ip/ip/spi_host/dv/spi_host_sim_cfg.hjson @@ -43,7 +43,7 @@ xcelium_cov_refine_files: ["{proj_root}/hw/vendor/lowrisc_ip/ip/spi_host/dv/cov/spi_host_unr_excl.vRefine"] // Default iterations for all tests - each test entry can override this. - reseed: 50 + reseed: 10 // Default UVM test and seq class name. uvm_test: spi_host_base_test @@ -65,7 +65,7 @@ { name: spi_host_upper_range_clkdiv uvm_test_seq: spi_host_upper_range_clkdiv_vseq - reseed: 10 // Reduced reseed since this test may take ages + reseed: 5 } { name: spi_host_performance diff --git a/hw/vendor/lowrisc_ip/ip/uart/dv/env/uart_env.core b/hw/vendor/lowrisc_ip/ip/uart/dv/env/uart_env.core index 64e4a7859..97824b654 100644 --- a/hw/vendor/lowrisc_ip/ip/uart/dv/env/uart_env.core +++ b/hw/vendor/lowrisc_ip/ip/uart/dv/env/uart_env.core @@ -52,4 +52,4 @@ targets: filesets: - files_dv generate: - - ral + - "!chip_level ? (ral)" diff --git a/hw/vendor/lowrisc_ip/ip/uart/dv/uart_sim_cfg.hjson b/hw/vendor/lowrisc_ip/ip/uart/dv/uart_sim_cfg.hjson index e05d17ef5..42b59c965 100644 --- a/hw/vendor/lowrisc_ip/ip/uart/dv/uart_sim_cfg.hjson +++ b/hw/vendor/lowrisc_ip/ip/uart/dv/uart_sim_cfg.hjson @@ -38,7 +38,7 @@ sim_tops: ["uart_bind", "sec_cm_prim_onehot_check_bind"] // Default iterations for all tests - each test entry can override this. - reseed: 50 + reseed: 10 // Enable cdc instrumentation. run_opts: ["+cdc_instrumentation_enabled=1"] @@ -75,7 +75,7 @@ { name: uart_fifo_reset // need more seeds to cover uart_env_cov::rx_fifo_level_cg and uart_env_cov::tx_fifo_level_cg - reseed: 300 + reseed: 200 uvm_test_seq: uart_fifo_reset_vseq } @@ -132,7 +132,7 @@ { name: uart_stress_all_with_rand_reset // need more seeds to cover uart_agent_cov::uart_reset_cg - reseed: 100 + reseed: 20 } ] diff --git a/hw/vendor/lowrisc_ip/ip_templates/alert_handler/dv/alert_handler_sim_cfg.hjson.tpl b/hw/vendor/lowrisc_ip/ip_templates/alert_handler/dv/alert_handler_sim_cfg.hjson.tpl index e3bf0c721..2589acdee 100644 --- a/hw/vendor/lowrisc_ip/ip_templates/alert_handler/dv/alert_handler_sim_cfg.hjson.tpl +++ b/hw/vendor/lowrisc_ip/ip_templates/alert_handler/dv/alert_handler_sim_cfg.hjson.tpl @@ -40,7 +40,7 @@ "sec_cm_prim_onehot_check_bind"] // Default iterations for all tests - each test entry can override this. - reseed: 50 + reseed: 10 overrides: [ { @@ -72,45 +72,53 @@ { name: ${module_instance_name}_random_classes uvm_test_seq: alert_handler_random_classes_vseq + reseed: 50 } { name: ${module_instance_name}_esc_intr_timeout uvm_test_seq: alert_handler_esc_intr_timeout_vseq + reseed: 50 } { name: ${module_instance_name}_esc_alert_accum uvm_test_seq: alert_handler_esc_alert_accum_vseq + reseed: 25 } { name: ${module_instance_name}_sig_int_fail uvm_test_seq: alert_handler_sig_int_fail_vseq + reseed: 50 } { name: ${module_instance_name}_entropy uvm_test_seq: alert_handler_entropy_vseq run_opts: ["+test_timeout_ns=1_000_000_000"] + reseed: 25 } { name: ${module_instance_name}_ping_timeout uvm_test_seq: alert_handler_ping_timeout_vseq run_opts: ["+test_timeout_ns=1_000_000_000"] + reseed: 50 } { name: ${module_instance_name}_lpg uvm_test_seq: alert_handler_lpg_vseq run_opts: ["+test_timeout_ns=1_000_000_000"] + reseed: 50 } { name: ${module_instance_name}_lpg_stub_clk uvm_test_seq: alert_handler_lpg_stub_clk_vseq run_opts: ["+test_timeout_ns=1_000_000_000"] + reseed: 50 } { @@ -125,6 +133,7 @@ { name: ${module_instance_name}_stress_all run_opts: ["+test_timeout_ns=15_000_000_000"] + reseed: 50 } { diff --git a/hw/vendor/lowrisc_ip/ip_templates/alert_handler/dv/env/alert_handler_env.core.tpl b/hw/vendor/lowrisc_ip/ip_templates/alert_handler/dv/env/alert_handler_env.core.tpl index 2ae063223..273351b77 100644 --- a/hw/vendor/lowrisc_ip/ip_templates/alert_handler/dv/env/alert_handler_env.core.tpl +++ b/hw/vendor/lowrisc_ip/ip_templates/alert_handler/dv/env/alert_handler_env.core.tpl @@ -51,4 +51,4 @@ targets: filesets: - files_dv generate: - - ral + - "!chip_level ? (ral)" diff --git a/hw/vendor/lowrisc_ip/ip_templates/clkmgr/dv/clkmgr_sim_cfg.hjson.tpl b/hw/vendor/lowrisc_ip/ip_templates/clkmgr/dv/clkmgr_sim_cfg.hjson.tpl index 7a869dc33..7035c6920 100644 --- a/hw/vendor/lowrisc_ip/ip_templates/clkmgr/dv/clkmgr_sim_cfg.hjson.tpl +++ b/hw/vendor/lowrisc_ip/ip_templates/clkmgr/dv/clkmgr_sim_cfg.hjson.tpl @@ -42,7 +42,7 @@ "sec_cm_prim_onehot_check_bind"] // Default iterations for all tests - each test entry can override this. - reseed: 50 + reseed: 10 // CLKMGR exclusion files. vcs_cov_excl_files: ["{self_dir}/cov/clkmgr_cov_manual_excl.el", diff --git a/hw/vendor/lowrisc_ip/ip_templates/clkmgr/dv/env/clkmgr_env.core.tpl b/hw/vendor/lowrisc_ip/ip_templates/clkmgr/dv/env/clkmgr_env.core.tpl index 63cccf80d..45d754a1f 100644 --- a/hw/vendor/lowrisc_ip/ip_templates/clkmgr/dv/env/clkmgr_env.core.tpl +++ b/hw/vendor/lowrisc_ip/ip_templates/clkmgr/dv/env/clkmgr_env.core.tpl @@ -50,4 +50,4 @@ targets: filesets: - files_dv generate: - - ral + - "!chip_level ? (ral)" diff --git a/hw/vendor/lowrisc_ip/ip_templates/gpio/dv/env/gpio_env.core.tpl b/hw/vendor/lowrisc_ip/ip_templates/gpio/dv/env/gpio_env.core.tpl index 7af894707..e68cdf16b 100644 --- a/hw/vendor/lowrisc_ip/ip_templates/gpio/dv/env/gpio_env.core.tpl +++ b/hw/vendor/lowrisc_ip/ip_templates/gpio/dv/env/gpio_env.core.tpl @@ -48,4 +48,4 @@ targets: filesets: - files_dv generate: - - ral + - "!chip_level ? (ral)" diff --git a/hw/vendor/lowrisc_ip/ip_templates/gpio/dv/gpio_sim_cfg.hjson.tpl b/hw/vendor/lowrisc_ip/ip_templates/gpio/dv/gpio_sim_cfg.hjson.tpl index fd51546c6..b0d617448 100644 --- a/hw/vendor/lowrisc_ip/ip_templates/gpio/dv/gpio_sim_cfg.hjson.tpl +++ b/hw/vendor/lowrisc_ip/ip_templates/gpio/dv/gpio_sim_cfg.hjson.tpl @@ -39,7 +39,7 @@ sim_tops: ["${module_instance_name}_bind", "sec_cm_prim_onehot_check_bind"] // Default iterations for all tests - each test entry can override this. - reseed: 50 + reseed: 10 // Default UVM test and seq class name. uvm_test: ${module_instance_name}_base_test @@ -84,6 +84,7 @@ { name: gpio_inp_prd_cnt uvm_test_seq: ${module_instance_name}_inp_prd_cnt_vseq + reseed: 50 } % endif diff --git a/hw/vendor/lowrisc_ip/ip_templates/pwrmgr/dv/env/pwrmgr_env.core.tpl b/hw/vendor/lowrisc_ip/ip_templates/pwrmgr/dv/env/pwrmgr_env.core.tpl index 4d028dd2d..63fcfc9fb 100644 --- a/hw/vendor/lowrisc_ip/ip_templates/pwrmgr/dv/env/pwrmgr_env.core.tpl +++ b/hw/vendor/lowrisc_ip/ip_templates/pwrmgr/dv/env/pwrmgr_env.core.tpl @@ -55,4 +55,4 @@ targets: filesets: - files_dv generate: - - ral + - "!chip_level ? (ral)" diff --git a/hw/vendor/lowrisc_ip/ip_templates/pwrmgr/dv/env/seq_lib/pwrmgr_glitch_vseq.sv b/hw/vendor/lowrisc_ip/ip_templates/pwrmgr/dv/env/seq_lib/pwrmgr_glitch_vseq.sv index 1a21ff7d3..3162ac81f 100644 --- a/hw/vendor/lowrisc_ip/ip_templates/pwrmgr/dv/env/seq_lib/pwrmgr_glitch_vseq.sv +++ b/hw/vendor/lowrisc_ip/ip_templates/pwrmgr/dv/env/seq_lib/pwrmgr_glitch_vseq.sv @@ -30,11 +30,11 @@ class pwrmgr_glitch_vseq extends pwrmgr_base_vseq; cfg.clk_rst_vif.wait_clks(cycles_before_reset); `DV_SPINWAIT(wait(cfg.pwrmgr_vif.fast_state == pwrmgr_pkg::FastPwrStateResetPrep && - cfg.pwrmgr_vif.pwr_rst_req.rstreqs[pwrmgr_reg_pkg::ResetMainPwrIdx] == 1);, $sformatf( - "checker timeout : fast_state %s, pwr_rst_req 0x%x", - cfg.pwrmgr_vif.fast_state.name, - cfg.pwrmgr_vif.pwr_rst_req.rstreqs - ), 10000) + cfg.pwrmgr_vif.pwr_rst_req.rstreqs[pwrmgr_reg_pkg::ResetMainPwrIdx] == 1);, + $sformatf("checker timeout : fast_state %s, pwr_rst_req 0x%x", + cfg.pwrmgr_vif.fast_state.name, + cfg.pwrmgr_vif.pwr_rst_req.rstreqs[pwrmgr_reg_pkg::ResetMainPwrIdx]), + 10000) dut_init(); end diff --git a/hw/vendor/lowrisc_ip/ip_templates/pwrmgr/dv/env/seq_lib/pwrmgr_repeat_wakeup_reset_vseq.sv b/hw/vendor/lowrisc_ip/ip_templates/pwrmgr/dv/env/seq_lib/pwrmgr_repeat_wakeup_reset_vseq.sv index 894574879..755fe881c 100644 --- a/hw/vendor/lowrisc_ip/ip_templates/pwrmgr/dv/env/seq_lib/pwrmgr_repeat_wakeup_reset_vseq.sv +++ b/hw/vendor/lowrisc_ip/ip_templates/pwrmgr/dv/env/seq_lib/pwrmgr_repeat_wakeup_reset_vseq.sv @@ -11,9 +11,6 @@ class pwrmgr_repeat_wakeup_reset_vseq extends pwrmgr_wakeup_reset_vseq; bit [lc_ctrl_pkg::TxWidth-1:0] bad_lc_tx; - int cycles_from_reset; - int micros_to_release; - bit super_sequence_done; task body(); @@ -27,38 +24,58 @@ class pwrmgr_repeat_wakeup_reset_vseq extends pwrmgr_wakeup_reset_vseq; super.body(); super_sequence_done = 1; end - drv_stim(mubi_mode); + drv_stim(); join endtask : body - task drv_stim(pwrmgr_mubi_e mubi_mode); - if (mubi_mode == PwrmgrMubiLcCtrl) drv_lc_ctrl(); - endtask : drv_stim - - task drv_lc_ctrl(); - int delay; - - `DV_CHECK_STD_RANDOMIZE_WITH_FATAL(cycles_from_reset, cycles_from_reset inside {[2 : 8]};) - `DV_CHECK_STD_RANDOMIZE_WITH_FATAL(micros_to_release, micros_to_release inside {[2 : 4]};) + task drv_stim(); + int unsigned cycles_from_reset = $urandom_range(2, 8); + int unsigned micros_to_release = $urandom_range(2, 4); repeat (50) begin : repeat_50 wait(cfg.esc_clk_rst_vif.rst_n); cfg.clk_rst_vif.wait_clks(cycles_from_reset); - if (super_sequence_done) begin - `uvm_info(`gfn, "Break from drv_lc_ctrl", UVM_MEDIUM) - break; - end - `uvm_info(`gfn, "Injection to lc_hw_debug_en", UVM_MEDIUM) - cfg.pwrmgr_vif.lc_hw_debug_en = get_rand_lc_tx_val( - .t_weight(1), .f_weight(1), .other_weight(2) - ); + if (super_sequence_done) break; + + drive_inputs(1); #(micros_to_release * 1us); - `uvm_info(`gfn, "Injection to lc_dft_en", UVM_MEDIUM) if (super_sequence_done) break; - cfg.pwrmgr_vif.lc_dft_en = get_rand_lc_tx_val(.t_weight(1), .f_weight(1), .other_weight(2)); + + drive_inputs(0); #(micros_to_release * 1us); end : repeat_50 - `uvm_info(`gfn, "ended drv_lc_ctrl", UVM_MEDIUM) - endtask : drv_lc_ctrl + `uvm_info(`gfn, "ended drv_stim", UVM_MEDIUM) + endtask : drv_stim + + task drive_inputs(bit phase0); + case (mubi_mode) + PwrmgrMubiLcCtrl: drive_lc_ctrl_inputs(phase0); + PwrmgrMubiRomCtrl: drive_rom_ctrl_inputs(phase0); + default: `uvm_fatal(get_full_name(), $sformatf("Unknown mubi_mode: %s", mubi_mode.name())) + endcase + endtask : drive_inputs + + task drive_rom_ctrl_inputs(bit phase0); + if (phase0) begin + for (int r = 0; r < NumRomInputs; r++) begin + mubi4_t rand_done = get_rand_mubi4_val(.t_weight(1), .f_weight(1), .other_weight(2)); + mubi4_t rand_good = get_rand_mubi4_val(.t_weight(1), .f_weight(1), .other_weight(2)); + `uvm_info(`gfn, $sformatf("Injection to rom_ctrl[%0d]", r), UVM_MEDIUM) + cfg.pwrmgr_vif.update_rom_ctrl('{done: rand_done, good: rand_good}, r); + end + end else begin + update_roms_response(.done(MuBi4True), .good(MuBi4True)); + end + endtask : drive_rom_ctrl_inputs + + task drive_lc_ctrl_inputs(bit phase0); + if (phase0) begin + cfg.pwrmgr_vif.lc_hw_debug_en = get_rand_lc_tx_val(.t_weight(1), + .f_weight(1), + .other_weight(2)); + end else begin + cfg.pwrmgr_vif.lc_dft_en = get_rand_lc_tx_val(.t_weight(1), .f_weight(1), .other_weight(2)); + end + endtask : drive_lc_ctrl_inputs endclass : pwrmgr_repeat_wakeup_reset_vseq diff --git a/hw/vendor/lowrisc_ip/ip_templates/pwrmgr/dv/pwrmgr_sim_cfg.hjson.tpl b/hw/vendor/lowrisc_ip/ip_templates/pwrmgr/dv/pwrmgr_sim_cfg.hjson.tpl index 0be2d6bd0..020be0b79 100644 --- a/hw/vendor/lowrisc_ip/ip_templates/pwrmgr/dv/pwrmgr_sim_cfg.hjson.tpl +++ b/hw/vendor/lowrisc_ip/ip_templates/pwrmgr/dv/pwrmgr_sim_cfg.hjson.tpl @@ -51,7 +51,7 @@ "sec_cm_prim_onehot_check_bind"] // Default iterations for all tests - each test entry can override this. - reseed: 50 + reseed: 10 // Default UVM test and seq class name. uvm_test: pwrmgr_base_test @@ -87,6 +87,11 @@ uvm_test_seq: pwrmgr_wakeup_reset_vseq run_opts: ["+test_timeout_ns=1000000"] } + { + name: pwrmgr_repeat_wakeup_reset + uvm_test_seq: pwrmgr_repeat_wakeup_reset_vseq + run_opts: ["+test_timeout_ns=4000000", "+pwrmgr_mubi_mode=PwrmgrMubiRomCtrl"] + } { name: pwrmgr_aborted_low_power uvm_test_seq: pwrmgr_aborted_low_power_vseq diff --git a/hw/vendor/lowrisc_ip/ip_templates/rstmgr/dv/env/rstmgr_env.core.tpl b/hw/vendor/lowrisc_ip/ip_templates/rstmgr/dv/env/rstmgr_env.core.tpl index 473d55514..ef22a7d8e 100644 --- a/hw/vendor/lowrisc_ip/ip_templates/rstmgr/dv/env/rstmgr_env.core.tpl +++ b/hw/vendor/lowrisc_ip/ip_templates/rstmgr/dv/env/rstmgr_env.core.tpl @@ -52,4 +52,4 @@ targets: - files_dv - files_rtl generate: - - ral + - "!chip_level ? (ral)" diff --git a/hw/vendor/lowrisc_ip/ip_templates/rstmgr/dv/rstmgr_sim_cfg.hjson.tpl b/hw/vendor/lowrisc_ip/ip_templates/rstmgr/dv/rstmgr_sim_cfg.hjson.tpl index 3c504393c..cc0902321 100644 --- a/hw/vendor/lowrisc_ip/ip_templates/rstmgr/dv/rstmgr_sim_cfg.hjson.tpl +++ b/hw/vendor/lowrisc_ip/ip_templates/rstmgr/dv/rstmgr_sim_cfg.hjson.tpl @@ -54,7 +54,7 @@ "sec_cm_prim_onehot_check_bind"] // Default iterations for all tests - each test entry can override this. - reseed: 50 + reseed: 5 // Default UVM test and seq class name. uvm_test: rstmgr_base_test @@ -92,6 +92,7 @@ { name: rstmgr_leaf_rst_cnsty uvm_test_seq: rstmgr_leaf_rst_cnsty_vseq + reseed: 25 } { name: rstmgr_leaf_rst_shadow_attack diff --git a/hw/vendor/lowrisc_ip_dv.lock.hjson b/hw/vendor/lowrisc_ip_dv.lock.hjson new file mode 100644 index 000000000..bbc5fb091 --- /dev/null +++ b/hw/vendor/lowrisc_ip_dv.lock.hjson @@ -0,0 +1,14 @@ +// Copyright lowRISC contributors (OpenTitan project). +// Licensed under the Apache License, Version 2.0, see LICENSE for details. +// SPDX-License-Identifier: Apache-2.0 + +// This file is generated by the util/vendor script. Please do not modify it +// manually. + +{ + upstream: + { + url: https://github.com/lowRISC/opentitan + rev: b5058fb9477f2417077dcd47326583d558f43022 + } +} diff --git a/hw/vendor/lowrisc_ip_dv.vendor.hjson b/hw/vendor/lowrisc_ip_dv.vendor.hjson new file mode 100644 index 000000000..c8821595c --- /dev/null +++ b/hw/vendor/lowrisc_ip_dv.vendor.hjson @@ -0,0 +1,63 @@ +// Copyright lowRISC contributors. +// Licensed under the Apache License, Version 2.0, see LICENSE for details. +// SPDX-License-Identifier: Apache-2.0 +// +// DV half of the lowRISC vendoring split. This config shares its target_dir +// ("lowrisc_ip") with hw/vendor/lowrisc_ip.vendor.hjson (the DD/RTL half): +// the DD config vendors the RTL under ip/ and excludes */dv, while this +// config vendors only the DV subtrees. The two halves are pinned to +// independent upstream revisions via their separate lock files. +// +// Run order matters: vendor the DD config first, then this DV config. A DD run +// deletes each ip/ directory (including its dv/ subdir) before +// re-importing, so running the DD vendor after the DV vendor wipes the DV +// content until this DV vendor is re-run. util/artefacts.py runs both in this +// order before a single dirty-check. +{ + name: "lowrisc_ip_dv", + target_dir: "lowrisc_ip", + patch_dir: "patches/lowrisc_ip", + + upstream: { + url: "https://github.com/lowRISC/opentitan" + // Pinned revision of main branch + rev: "master" + } + + mapping: [ + // Shared DV infrastructure. + {from: "hw/dv/dpi/gpiodpi", to: "dv/dpi/gpiodpi", patch_dir: "gpiodpi"}, + {from: "hw/dv/dpi/spidpi", to: "dv/dpi/spidpi"}, + {from: "hw/dv/dpi/uartdpi", to: "dv/dpi/uartdpi"}, + {from: "hw/dv/dpi/jtagdpi", to: "dv/dpi/jtagdpi"}, + {from: "hw/dv/dpi/common/tcp_server", to: "dv/dpi/common/tcp_server"}, + {from: "hw/dv/sv", to: "dv/sv", patch_dir: "dv_sv"}, + {from: "hw/dv/verilator", to: "dv/verilator", patch_dir: "dv_verilator"}, + {from: "hw/dv/tools", to: "dv/tools", patch_dir: "dv_tools"}, + {from: "hw/formal/tools", to: "formal/tools", patch_dir: "formal_tools"}, + + // Per-IP DV environments. + {from: "hw/ip/entropy_src/dv", to: "ip/entropy_src/dv", patch_dir: "entropy_src_dv"}, + {from: "hw/ip/i2c/dv", to: "ip/i2c/dv", patch_dir: "i2c_dv"}, + {from: "hw/ip/kmac/dv", to: "ip/kmac/dv", patch_dir: "kmac_dv"}, + {from: "hw/ip/lc_ctrl/dv", to: "ip/lc_ctrl/dv"}, + {from: "hw/ip/prim/dv", to: "ip/prim/dv", patch_dir: "prim_dv"}, + {from: "hw/ip/rom_ctrl/dv", to: "ip/rom_ctrl/dv", patch_dir: "rom_ctrl_dv"}, + {from: "hw/ip/rv_timer/dv", to: "ip/rv_timer/dv", patch_dir: "rv_timer_dv"}, + {from: "hw/ip/spi_device/dv", to: "ip/spi_device/dv", patch_dir: "spi_device_dv"}, + {from: "hw/ip/spi_host/dv", to: "ip/spi_host/dv", patch_dir: "spi_host_dv"}, + {from: "hw/ip/uart/dv", to: "ip/uart/dv", patch_dir: "uart_dv"}, + + // Per-IP-template DV environments. + {from: "hw/ip_templates/alert_handler/dv", to: "ip_templates/alert_handler/dv"}, + {from: "hw/ip_templates/clkmgr/dv", to: "ip_templates/clkmgr/dv"}, + {from: "hw/ip_templates/gpio/dv", to: "ip_templates/gpio/dv", patch_dir: "gpio_dv"}, + {from: "hw/ip_templates/pwrmgr/dv", to: "ip_templates/pwrmgr/dv", patch_dir: "pwrmgr_dv"}, + {from: "hw/ip_templates/rstmgr/dv", to: "ip_templates/rstmgr/dv", patch_dir: "rstmgr_dv"}, + ], + + exclude_from_upstream: [ + "**/BUILD", + "hw/dv/tools/vcs", + ], +} diff --git a/hw/vendor/patches/lowrisc_ip/dv_sv/0002-kmac_dv_agents_drop_keymgr_pkg.patch b/hw/vendor/patches/lowrisc_ip/dv_sv/0002-kmac_dv_agents_drop_keymgr_pkg.patch index 232a0788e..cd3df1c7a 100644 --- a/hw/vendor/patches/lowrisc_ip/dv_sv/0002-kmac_dv_agents_drop_keymgr_pkg.patch +++ b/hw/vendor/patches/lowrisc_ip/dv_sv/0002-kmac_dv_agents_drop_keymgr_pkg.patch @@ -1,23 +1,32 @@ diff --git a/key_sideload_agent/key_sideload_agent.core b/key_sideload_agent/key_sideload_agent.core -index 72a73045..45332fa9 100644 --- a/key_sideload_agent/key_sideload_agent.core +++ b/key_sideload_agent/key_sideload_agent.core -@@ -9,7 +9,7 @@ filesets: +@@ -9,7 +9,6 @@ depend: - lowrisc:dv:dv_utils - lowrisc:dv:dv_lib - - lowrisc:ip:keymgr_pkg -+ - lowrisc:ip:kmac_pkg files: - key_sideload_if.sv - key_sideload_agent_pkg.sv +diff --git a/key_sideload_agent/key_sideload_if.sv b/key_sideload_agent/key_sideload_if.sv +--- a/key_sideload_agent/key_sideload_if.sv ++++ b/key_sideload_agent/key_sideload_if.sv +@@ -3,7 +3,7 @@ + // SPDX-License-Identifier: Apache-2.0 + + interface key_sideload_if #( +- parameter type KEY_T = keymgr_pkg::hw_key_req_t ++ parameter type KEY_T = kmac_pkg::hw_key_req_t + ) ( + input logic clk_i, + input logic rst_ni, diff --git a/key_sideload_agent/key_sideload_agent.sv b/key_sideload_agent/key_sideload_agent.sv -index 1f6e3c80..b9e35257 100644 --- a/key_sideload_agent/key_sideload_agent.sv +++ b/key_sideload_agent/key_sideload_agent.sv @@ -3,7 +3,7 @@ // SPDX-License-Identifier: Apache-2.0 - + class key_sideload_agent#( - parameter type KEY_T = keymgr_pkg::hw_key_req_t + parameter type KEY_T = kmac_pkg::hw_key_req_t @@ -25,80 +34,61 @@ index 1f6e3c80..b9e35257 100644 .CFG_T (key_sideload_agent_cfg#(KEY_T)), .DRIVER_T (key_sideload_driver#(KEY_T)), diff --git a/key_sideload_agent/key_sideload_agent_cfg.sv b/key_sideload_agent/key_sideload_agent_cfg.sv -index 9726e0c9..3423a21b 100644 --- a/key_sideload_agent/key_sideload_agent_cfg.sv +++ b/key_sideload_agent/key_sideload_agent_cfg.sv @@ -3,7 +3,7 @@ // SPDX-License-Identifier: Apache-2.0 - + class key_sideload_agent_cfg #( - parameter type KEY_T = keymgr_pkg::hw_key_req_t + parameter type KEY_T = kmac_pkg::hw_key_req_t ) extends dv_base_agent_cfg; - - + + diff --git a/key_sideload_agent/key_sideload_agent_cov.sv b/key_sideload_agent/key_sideload_agent_cov.sv -index 32ec149e..c3a50e77 100644 --- a/key_sideload_agent/key_sideload_agent_cov.sv +++ b/key_sideload_agent/key_sideload_agent_cov.sv @@ -3,7 +3,7 @@ // SPDX-License-Identifier: Apache-2.0 - + class key_sideload_agent_cov #( - parameter type KEY_T = keymgr_pkg::hw_key_req_t + parameter type KEY_T = kmac_pkg::hw_key_req_t ) extends dv_base_agent_cov #(key_sideload_agent_cfg#(KEY_T)); `uvm_component_param_utils(key_sideload_agent_cov#(KEY_T)) - + diff --git a/key_sideload_agent/key_sideload_driver.sv b/key_sideload_agent/key_sideload_driver.sv -index 2ffb699a..4df961ac 100644 --- a/key_sideload_agent/key_sideload_driver.sv +++ b/key_sideload_agent/key_sideload_driver.sv @@ -3,7 +3,7 @@ // SPDX-License-Identifier: Apache-2.0 - + class key_sideload_driver#( - parameter type KEY_T = keymgr_pkg::hw_key_req_t + parameter type KEY_T = kmac_pkg::hw_key_req_t ) extends dv_base_driver #(.ITEM_T(key_sideload_item#(KEY_T)), .CFG_T (key_sideload_agent_cfg#(KEY_T))); `uvm_component_param_utils(key_sideload_driver#(KEY_T)) -diff --git a/key_sideload_agent/key_sideload_if.sv b/key_sideload_agent/key_sideload_if.sv -index 1f8b521e..31281c1b 100644 ---- a/key_sideload_agent/key_sideload_if.sv -+++ b/key_sideload_agent/key_sideload_if.sv -@@ -3,7 +3,7 @@ - // SPDX-License-Identifier: Apache-2.0 - - interface key_sideload_if #( -- parameter type KEY_T = keymgr_pkg::hw_key_req_t -+ parameter type KEY_T = kmac_pkg::hw_key_req_t - ) ( - input logic clk_i, - input logic rst_ni, diff --git a/key_sideload_agent/key_sideload_item.sv b/key_sideload_agent/key_sideload_item.sv -index 7754a65c..961d6863 100644 --- a/key_sideload_agent/key_sideload_item.sv +++ b/key_sideload_agent/key_sideload_item.sv -@@ -3,9 +3,9 @@ +@@ -3,8 +3,8 @@ // SPDX-License-Identifier: Apache-2.0 - + class key_sideload_item #( - parameter type KEY_T = keymgr_pkg::hw_key_req_t + parameter type KEY_T = kmac_pkg::hw_key_req_t ) extends uvm_sequence_item; - localparam int KeyWidth = ($bits(KEY_T)-1)/keymgr_pkg::Shares; + localparam int KeyWidth = ($bits(KEY_T)-1)/kmac_pkg::Shares; - + // random variables - rand bit valid; diff --git a/key_sideload_agent/key_sideload_monitor.sv b/key_sideload_agent/key_sideload_monitor.sv -index d5856895..a025b4fe 100644 --- a/key_sideload_agent/key_sideload_monitor.sv +++ b/key_sideload_agent/key_sideload_monitor.sv @@ -3,7 +3,7 @@ // SPDX-License-Identifier: Apache-2.0 - + class key_sideload_monitor #( - parameter type KEY_T = keymgr_pkg::hw_key_req_t + parameter type KEY_T = kmac_pkg::hw_key_req_t @@ -106,12 +96,11 @@ index d5856895..a025b4fe 100644 .ITEM_T (key_sideload_item#(KEY_T)), .CFG_T (key_sideload_agent_cfg#(KEY_T)), diff --git a/key_sideload_agent/key_sideload_sequencer.sv b/key_sideload_agent/key_sideload_sequencer.sv -index a9412175..4e37dc4d 100644 --- a/key_sideload_agent/key_sideload_sequencer.sv +++ b/key_sideload_agent/key_sideload_sequencer.sv @@ -3,7 +3,7 @@ // SPDX-License-Identifier: Apache-2.0 - + class key_sideload_sequencer #( - parameter type KEY_T = keymgr_pkg::hw_key_req_t + parameter type KEY_T = kmac_pkg::hw_key_req_t @@ -119,12 +108,11 @@ index a9412175..4e37dc4d 100644 .ITEM_T (key_sideload_item#(KEY_T)), .CFG_T (key_sideload_agent_cfg#(KEY_T)) diff --git a/key_sideload_agent/seq_lib/key_sideload_base_seq.sv b/key_sideload_agent/seq_lib/key_sideload_base_seq.sv -index 60def448..147c0f74 100644 --- a/key_sideload_agent/seq_lib/key_sideload_base_seq.sv +++ b/key_sideload_agent/seq_lib/key_sideload_base_seq.sv @@ -3,7 +3,7 @@ // SPDX-License-Identifier: Apache-2.0 - + class key_sideload_base_seq #( - parameter type KEY_T = keymgr_pkg::hw_key_req_t + parameter type KEY_T = kmac_pkg::hw_key_req_t @@ -132,23 +120,21 @@ index 60def448..147c0f74 100644 .REQ (key_sideload_item#(KEY_T)), .CFG_T (key_sideload_agent_cfg#(KEY_T)), diff --git a/key_sideload_agent/seq_lib/key_sideload_set_seq.sv b/key_sideload_agent/seq_lib/key_sideload_set_seq.sv -index b25bfb25..79857b60 100644 --- a/key_sideload_agent/seq_lib/key_sideload_set_seq.sv +++ b/key_sideload_agent/seq_lib/key_sideload_set_seq.sv @@ -3,7 +3,7 @@ // SPDX-License-Identifier: Apache-2.0 - + class key_sideload_set_seq #( - parameter type KEY_T = keymgr_pkg::hw_key_req_t + parameter type KEY_T = kmac_pkg::hw_key_req_t ) extends key_sideload_base_seq #(KEY_T); - + `uvm_object_utils(key_sideload_set_seq#(KEY_T)) diff --git a/kmac_app_agent/kmac_app_agent.core b/kmac_app_agent/kmac_app_agent.core -index 79527ccb..acaf70c5 100644 --- a/kmac_app_agent/kmac_app_agent.core +++ b/kmac_app_agent/kmac_app_agent.core -@@ -10,7 +10,6 @@ filesets: +@@ -10,7 +10,6 @@ - lowrisc:dv:dv_utils - lowrisc:dv:dv_lib - lowrisc:dv:push_pull_agent @@ -157,51 +143,90 @@ index 79527ccb..acaf70c5 100644 files: - kmac_app_agent_pkg.sv diff --git a/kmac_app_agent/kmac_app_agent_pkg.sv b/kmac_app_agent/kmac_app_agent_pkg.sv -index 6af1f15d..4da79b45 100644 --- a/kmac_app_agent/kmac_app_agent_pkg.sv +++ b/kmac_app_agent/kmac_app_agent_pkg.sv -@@ -8,7 +8,7 @@ package kmac_app_agent_pkg; +@@ -8,7 +8,6 @@ import dv_utils_pkg::*; import dv_base_agent_pkg::*; import dv_lib_pkg::*; - import keymgr_pkg::*; -+ import kmac_pkg::*; import push_pull_agent_pkg::*; - + // macro includes -@@ -16,9 +16,10 @@ package kmac_app_agent_pkg; - `include "dv_macros.svh" - - // parameters -- parameter int KMAC_REQ_DATA_WIDTH = keymgr_pkg::KmacDataIfWidth // data width -- + keymgr_pkg::KmacDataIfWidth / 8 // data mask width -- + 1; // bit last -+ parameter int KmacDataIfWidth = kmac_pkg::MsgWidth; -+ parameter int KMAC_REQ_DATA_WIDTH = KmacDataIfWidth // data width -+ + KmacDataIfWidth / 8 // data mask width -+ + 1; // bit last - - `define CONNECT_DATA_WIDTH .HostDataWidth(kmac_app_agent_pkg::KMAC_REQ_DATA_WIDTH) - diff --git a/kmac_app_agent/kmac_app_intf.sv b/kmac_app_agent/kmac_app_intf.sv -index 8fe2c411..b5c926cb 100644 --- a/kmac_app_agent/kmac_app_intf.sv +++ b/kmac_app_agent/kmac_app_intf.sv -@@ -5,8 +5,6 @@ +@@ -5,7 +5,7 @@ // verilog_lint: waive interface-name-style interface kmac_app_intf (input clk, input rst_n); - + - import keymgr_pkg::*; -- ++ import kmac_pkg::*; + dv_utils_pkg::if_mode_e if_mode; // interface mode - Host or Device - - // interface pins used to connect with DUT -@@ -60,7 +58,7 @@ interface kmac_app_intf (input clk, input rst_n); + +@@ -65,7 +65,7 @@ clk, !rst_n || if_mode == dv_utils_pkg::Host) - + // Check strb is aligned to LSB, for example: if strb[1]==0, strb[$:2] should be 0 too - for (genvar k = 1; k < KmacDataIfWidth / 8 - 1; k++) begin : gen_strb_check -+ for (genvar k = 1; k < kmac_app_agent_pkg::KmacDataIfWidth / 8 - 1; k++) begin : gen_strb_check - `ASSERT(StrbAlignLSB_A, kmac_data_req.valid && kmac_data_req.strb[k] === 0 |-> ++ for (genvar k = 1; k < MsgWidth / 8 - 1; k++) begin : gen_strb_check + `ASSERT(StrbAlignLSB_A, kmac_data_req.req_valid && kmac_data_req.strb[k] === 0 |-> kmac_data_req.strb[k+1] === 0, clk, !rst_n || if_mode == dv_utils_pkg::Host) +diff --git a/kmac_app_agent/kmac_app_monitor.sv b/kmac_app_agent/kmac_app_monitor.sv +--- a/kmac_app_agent/kmac_app_monitor.sv ++++ b/kmac_app_agent/kmac_app_monitor.sv +@@ -43,9 +43,9 @@ + kmac_app_item rsp; + + while (1) begin +- bit [KmacDataIfWidth-1:0] data_s0; +- bit [KmacDataIfWidth-1:0] data_s1; +- bit [KmacDataIfWidth/8-1:0] strb; ++ bit [kmac_pkg::MsgWidth-1:0] data_s0; ++ bit [kmac_pkg::MsgWidth-1:0] data_s1; ++ bit [kmac_pkg::MsgWidth/8-1:0] strb; + bit req_last; + bit rsp_ready; + push_pull_item#(`CONNECT_DATA_WIDTH) data_item; +@@ -61,7 +61,7 @@ + data_fifo.get(data_item); + {data_s0, data_s1, strb, req_last, rsp_ready} = data_item.h_data; + +- for (int i = 0; i < KmacDataIfWidth/8; i++) begin ++ for (int i = 0; i < kmac_pkg::MsgWidth/8; i++) begin + // Unmask the message before we collect it. + if (strb[i]) req.byte_data_q.push_back(data_s0[i*8+:8] ^ data_s1[i*8+:8]); + end +diff --git a/kmac_app_agent/seq_lib/kmac_app_host_seq.sv b/kmac_app_agent/seq_lib/kmac_app_host_seq.sv +--- a/kmac_app_agent/seq_lib/kmac_app_host_seq.sv ++++ b/kmac_app_agent/seq_lib/kmac_app_host_seq.sv +@@ -29,9 +29,9 @@ + while (msg_size_bytes > 0) begin + + // We send the data unmasked (share 1 is fixed to '0). +- bit [KmacDataIfWidth-1:0] req_data_s0 = '0; +- bit [KmacDataIfWidth-1:0] req_data_s1 = '0; +- bit [KmacDataIfWidth/8-1:0] req_strb = '1; ++ bit [kmac_pkg::MsgWidth-1:0] req_data_s0 = '0; ++ bit [kmac_pkg::MsgWidth-1:0] req_data_s1 = '0; ++ bit [kmac_pkg::MsgWidth/8-1:0] req_strb = '1; + bit req_last = 0; + + // create push_pull_host_seq +@@ -40,12 +40,12 @@ + `DV_CHECK_RANDOMIZE_FATAL(host_seq) + + // Assemble the message chunk and strb +- for (int i = 0; i < KmacDataIfWidth / 8; i ++) begin ++ for (int i = 0; i < kmac_pkg::MsgWidth / 8; i ++) begin + if (msg_size_bytes == 0) break; + + if (cfg.inject_zero_in_host_strb) begin + `DV_CHECK_STD_RANDOMIZE_WITH_FATAL(req_strb, +- ($countones(req_strb ^ {req_strb[KmacDataIfWidth/8-2:0], 1'b0}) <= 2);) ++ ($countones(req_strb ^ {req_strb[kmac_pkg::MsgWidth/8-2:0], 1'b0}) <= 2);) + end + if (req_strb[i] == 1) begin + req_data_s0[i*8 +: 8] = 8'(req.byte_data_q.pop_front()); diff --git a/hw/vendor/patches/lowrisc_ip/dv_sv/0003-kmac_app_agent_interface_fixes.patch b/hw/vendor/patches/lowrisc_ip/dv_sv/0003-kmac_app_agent_interface_fixes.patch new file mode 100644 index 000000000..2b3c0af39 --- /dev/null +++ b/hw/vendor/patches/lowrisc_ip/dv_sv/0003-kmac_app_agent_interface_fixes.patch @@ -0,0 +1,102 @@ +diff --git a/kmac_app_agent/kmac_app_intf.sv b/kmac_app_agent/kmac_app_intf.sv +--- a/kmac_app_agent/kmac_app_intf.sv ++++ b/kmac_app_agent/kmac_app_intf.sv +@@ -52,10 +52,8 @@ + assign {req_data_if.valid, req_data_if.h_data} = (if_mode == dv_utils_pkg::Device) ? + kmac_data_req : 'z; + +- assign {req_data_if.ready, rsp_valid, rsp_digest_share0, rsp_digest_share1, rsp_error, +- rsp_finish} = ++ assign {req_data_if.ready, rsp_valid, rsp_digest_share0, rsp_digest_share1, rsp_error} = + (if_mode == dv_utils_pkg::Host) ? kmac_data_rsp : 'z; + assign kmac_data_rsp = (if_mode == dv_utils_pkg::Device) ? +- {req_data_if.ready, rsp_valid, rsp_digest_share0, rsp_digest_share1, rsp_error, +- rsp_finish} : 'z; ++ {req_data_if.ready, rsp_valid, rsp_digest_share0, rsp_digest_share1, rsp_error} : 'z; + +@@ -62,5 +60,5 @@ + // The following assertions only apply to device mode. + // strb should never be 0 +- `ASSERT(StrbNotZero_A, kmac_data_req.req_valid |-> kmac_data_req.strb > 0, ++ `ASSERT(StrbNotZero_A, kmac_data_req.valid |-> kmac_data_req.strb > 0, + clk, !rst_n || if_mode == dv_utils_pkg::Host) + +@@ -67,6 +65,6 @@ + // Check strb is aligned to LSB, for example: if strb[1]==0, strb[$:2] should be 0 too + for (genvar k = 1; k < MsgWidth / 8 - 1; k++) begin : gen_strb_check +- `ASSERT(StrbAlignLSB_A, kmac_data_req.req_valid && kmac_data_req.strb[k] === 0 |-> ++ `ASSERT(StrbAlignLSB_A, kmac_data_req.valid && kmac_data_req.strb[k] === 0 |-> + kmac_data_req.strb[k+1] === 0, + clk, !rst_n || if_mode == dv_utils_pkg::Host) + end +@@ -74,8 +72,8 @@ + // The following assertions apply for this interface for all modes. + + // Done should be asserted after last, before we start another request + `ASSERT(DoneAssertAfterLast_A, +- (kmac_data_req.req_last && kmac_data_req.req_valid && kmac_data_rsp.req_ready) |=> +- !kmac_data_req.req_valid throughout rsp_valid[->1], clk, !rst_n || rsp_error) ++ (kmac_data_req.last && kmac_data_req.valid && kmac_data_rsp.ready) |=> ++ !kmac_data_req.valid throughout rsp_valid[->1], clk, !rst_n || rsp_error) + + endinterface +diff --git a/kmac_app_agent/kmac_app_agent_pkg.sv b/kmac_app_agent/kmac_app_agent_pkg.sv +--- a/kmac_app_agent/kmac_app_agent_pkg.sv ++++ b/kmac_app_agent/kmac_app_agent_pkg.sv +@@ -15,9 +15,9 @@ + `include "dv_macros.svh" + + // parameters +- parameter int KMAC_REQ_DATA_WIDTH = 2 * kmac_pkg::MsgWidth // share0 + share1 +- + kmac_pkg::MsgWidth / 8 // strobe +- + 2; // req_last + rsp_ready ++ parameter int KMAC_REQ_DATA_WIDTH = kmac_pkg::MsgWidth // data (single share) ++ + kmac_pkg::MsgWidth / 8 // strobe ++ + 1; // req_last + + `define CONNECT_DATA_WIDTH .HostDataWidth(kmac_app_agent_pkg::KMAC_REQ_DATA_WIDTH) + +diff --git a/kmac_app_agent/kmac_app_monitor.sv b/kmac_app_agent/kmac_app_monitor.sv +--- a/kmac_app_agent/kmac_app_monitor.sv ++++ b/kmac_app_agent/kmac_app_monitor.sv +@@ -46,8 +46,6 @@ + bit [kmac_pkg::MsgWidth-1:0] data_s0; +- bit [kmac_pkg::MsgWidth-1:0] data_s1; + bit [kmac_pkg::MsgWidth/8-1:0] strb; + bit req_last; +- bit rsp_ready; + push_pull_item#(`CONNECT_DATA_WIDTH) data_item; + + // KMAC (device) supports prematurely ending an App transaction and going back to Idle state +@@ -59,9 +57,9 @@ + // ok_to_end = 0 for the entire transaction. + ok_to_end = 1; + data_fifo.get(data_item); +- {data_s0, data_s1, strb, req_last, rsp_ready} = data_item.h_data; ++ {data_s0, strb, req_last} = data_item.h_data; + + for (int i = 0; i < kmac_pkg::MsgWidth/8; i++) begin + // Unmask the message before we collect it. +- if (strb[i]) req.byte_data_q.push_back(data_s0[i*8+:8] ^ data_s1[i*8+:8]); ++ if (strb[i]) req.byte_data_q.push_back(data_s0[i*8+:8]); + end +diff --git a/kmac_app_agent/seq_lib/kmac_app_host_seq.sv b/kmac_app_agent/seq_lib/kmac_app_host_seq.sv +--- a/kmac_app_agent/seq_lib/kmac_app_host_seq.sv ++++ b/kmac_app_agent/seq_lib/kmac_app_host_seq.sv +@@ -30,7 +30,6 @@ + + // We send the data unmasked (share 1 is fixed to '0). + bit [kmac_pkg::MsgWidth-1:0] req_data_s0 = '0; +- bit [kmac_pkg::MsgWidth-1:0] req_data_s1 = '0; + bit [kmac_pkg::MsgWidth/8-1:0] req_strb = '1; + bit req_last = 0; + +@@ -62,7 +61,7 @@ + + // For now, a static app is assumed to be always ready to accept a response. + cfg.m_data_push_agent_cfg.add_h_user_data( +- {req_data_s0, req_data_s1, req_strb, req_last, 1'b1}); ++ {req_data_s0, req_strb, req_last}); + + `uvm_send(host_seq) + diff --git a/hw/vendor/patches/lowrisc_ip/dv_sv/0004-key_sideload_agent_add_kmac_pkg_dep.patch b/hw/vendor/patches/lowrisc_ip/dv_sv/0004-key_sideload_agent_add_kmac_pkg_dep.patch new file mode 100644 index 000000000..7df17439e --- /dev/null +++ b/hw/vendor/patches/lowrisc_ip/dv_sv/0004-key_sideload_agent_add_kmac_pkg_dep.patch @@ -0,0 +1,10 @@ +--- a/key_sideload_agent/key_sideload_agent.core ++++ b/key_sideload_agent/key_sideload_agent.core +@@ -9,6 +9,7 @@ + depend: + - lowrisc:dv:dv_utils + - lowrisc:dv:dv_lib ++ - lowrisc:ip:kmac_pkg + files: + - key_sideload_if.sv + - key_sideload_agent_pkg.sv diff --git a/hw/vendor/patches/lowrisc_ip/entropy_src/0002_Fix_Testplan_Paths.patch b/hw/vendor/patches/lowrisc_ip/entropy_src/0002_Fix_Testplan_Paths.patch new file mode 100644 index 000000000..589840129 --- /dev/null +++ b/hw/vendor/patches/lowrisc_ip/entropy_src/0002_Fix_Testplan_Paths.patch @@ -0,0 +1,21 @@ +diff --git a/data/entropy_src_testplan.hjson b/data/entropy_src_testplan.hjson +index 4d296d9..29a4c0c 100644 +--- a/data/entropy_src_testplan.hjson ++++ b/data/entropy_src_testplan.hjson +@@ -3,11 +3,11 @@ + // SPDX-License-Identifier: Apache-2.0 + { + name: "entropy_src" +- import_testplans: ["hw/dv/tools/dvsim/testplans/csr_testplan.hjson", +- "hw/dv/tools/dvsim/testplans/intr_test_testplan.hjson", +- "hw/dv/tools/dvsim/testplans/alert_test_testplan.hjson", +- "hw/dv/tools/dvsim/testplans/tl_device_access_types_testplan.hjson", +- "hw/dv/tools/dvsim/testplans/stress_all_with_reset_testplan.hjson", ++ import_testplans: ["hw/vendor/lowrisc_ip/dv/tools/dvsim/testplans/csr_testplan.hjson", ++ "hw/vendor/lowrisc_ip/dv/tools/dvsim/testplans/intr_test_testplan.hjson", ++ "hw/vendor/lowrisc_ip/dv/tools/dvsim/testplans/alert_test_testplan.hjson", ++ "hw/vendor/lowrisc_ip/dv/tools/dvsim/testplans/tl_device_access_types_testplan.hjson", ++ "hw/vendor/lowrisc_ip/dv/tools/dvsim/testplans/stress_all_with_reset_testplan.hjson", + "entropy_src_sec_cm_testplan.hjson"] + testpoints: [ + { diff --git a/hw/vendor/patches/lowrisc_ip/entropy_src/0002_Fix_DV_Paths.patch b/hw/vendor/patches/lowrisc_ip/entropy_src_dv/0001_Fix_DV_Paths.patch similarity index 67% rename from hw/vendor/patches/lowrisc_ip/entropy_src/0002_Fix_DV_Paths.patch rename to hw/vendor/patches/lowrisc_ip/entropy_src_dv/0001_Fix_DV_Paths.patch index 84172a805..0672ac783 100644 --- a/hw/vendor/patches/lowrisc_ip/entropy_src/0002_Fix_DV_Paths.patch +++ b/hw/vendor/patches/lowrisc_ip/entropy_src_dv/0001_Fix_DV_Paths.patch @@ -1,39 +1,18 @@ -diff --git a/data/entropy_src_testplan.hjson b/data/entropy_src_testplan.hjson -index 4d296d9..29a4c0c 100644 ---- a/data/entropy_src_testplan.hjson -+++ b/data/entropy_src_testplan.hjson -@@ -3,11 +3,11 @@ - // SPDX-License-Identifier: Apache-2.0 - { - name: "entropy_src" -- import_testplans: ["hw/dv/tools/dvsim/testplans/csr_testplan.hjson", -- "hw/dv/tools/dvsim/testplans/intr_test_testplan.hjson", -- "hw/dv/tools/dvsim/testplans/alert_test_testplan.hjson", -- "hw/dv/tools/dvsim/testplans/tl_device_access_types_testplan.hjson", -- "hw/dv/tools/dvsim/testplans/stress_all_with_reset_testplan.hjson", -+ import_testplans: ["hw/vendor/lowrisc_ip/dv/tools/dvsim/testplans/csr_testplan.hjson", -+ "hw/vendor/lowrisc_ip/dv/tools/dvsim/testplans/intr_test_testplan.hjson", -+ "hw/vendor/lowrisc_ip/dv/tools/dvsim/testplans/alert_test_testplan.hjson", -+ "hw/vendor/lowrisc_ip/dv/tools/dvsim/testplans/tl_device_access_types_testplan.hjson", -+ "hw/vendor/lowrisc_ip/dv/tools/dvsim/testplans/stress_all_with_reset_testplan.hjson", - "entropy_src_sec_cm_testplan.hjson"] - testpoints: [ - { -diff --git a/dv/entropy_src_base_sim_cfg.hjson b/dv/entropy_src_base_sim_cfg.hjson +diff --git a/entropy_src_base_sim_cfg.hjson b/entropy_src_base_sim_cfg.hjson index 3a79a86..df6660a 100644 ---- a/dv/entropy_src_base_sim_cfg.hjson -+++ b/dv/entropy_src_base_sim_cfg.hjson -@@ -18,22 +18,22 @@ +--- a/entropy_src_base_sim_cfg.hjson ++++ b/entropy_src_base_sim_cfg.hjson +@@ -18,21 +18,21 @@ fusesoc_core: lowrisc:dv:entropy_src_sim:0.1 - + // Testplan hjson file. - testplan: "{proj_root}/hw/ip/entropy_src/data/entropy_src_testplan.hjson" + testplan: "{proj_root}/hw/vendor/lowrisc_ip/ip/entropy_src/data/entropy_src_testplan.hjson" - + // RAL spec - used to generate the RAL model. - ral_spec: "{proj_root}/hw/ip/entropy_src/data/entropy_src.hjson" + ral_spec: "{proj_root}/hw/vendor/lowrisc_ip/ip/entropy_src/data/entropy_src.hjson" - + // Import additional common sim cfg files. import_cfgs: [// Project wide common sim cfg file - "{proj_root}/hw/dv/tools/dvsim/common_sim_cfg.hjson", @@ -49,14 +28,13 @@ index 3a79a86..df6660a 100644 + "{proj_root}/hw/vendor/lowrisc_ip/dv/tools/dvsim/tests/alert_test.hjson", + "{proj_root}/hw/vendor/lowrisc_ip/dv/tools/dvsim/tests/tl_access_tests.hjson", + "{proj_root}/hw/vendor/lowrisc_ip/dv/tools/dvsim/tests/sec_cm_tests.hjson", - // TODO: import `stress_tests.hjson` once hanging issue is resolved. -- "{proj_root}/hw/dv/tools/dvsim/tests/stress_all_test.hjson"] -+ "{proj_root}/hw/vendor/lowrisc_ip/dv/tools/dvsim/tests/stress_all_test.hjson"] - +- "{proj_root}/hw/dv/tools/dvsim/tests/stress_tests.hjson"] ++ "{proj_root}/hw/vendor/lowrisc_ip/dv/tools/dvsim/tests/stress_tests.hjson"] + // Add additional tops for simulation. sim_tops: ["entropy_src_bind", "entropy_src_cov_bind", "sec_cm_prim_onehot_check_bind"] @@ -43,18 +43,18 @@ - + xcelium_cov_refine_files: [ // TODO(#16276): Finalize coverage on ExtHT ports & remove the following exclusion file - "{proj_root}/hw/ip/entropy_src/dv/cov/entropy_src_extht_exclusions.vRefine" @@ -78,31 +56,31 @@ index 3a79a86..df6660a 100644 - "{proj_root}/hw/ip/entropy_src/dv/cov/entropy_src_fifo_in_excl.vRefine", + "{proj_root}/hw/vendor/lowrisc_ip/ip/entropy_src/dv/cov/entropy_src_fifo_in_excl.vRefine", ] - + // Default UVM test and seq class name. -diff --git a/dv/entropy_src_rng16bits_sim_cfg.hjson b/dv/entropy_src_rng16bits_sim_cfg.hjson +diff --git a/entropy_src_rng16bits_sim_cfg.hjson b/entropy_src_rng16bits_sim_cfg.hjson index 0c2743b..bb36ab4 100644 ---- a/dv/entropy_src_rng16bits_sim_cfg.hjson -+++ b/dv/entropy_src_rng16bits_sim_cfg.hjson +--- a/entropy_src_rng16bits_sim_cfg.hjson ++++ b/entropy_src_rng16bits_sim_cfg.hjson @@ -7,7 +7,7 @@ variant: rng_16bits - + // Import the base entropy_src sim_cfg file - import_cfgs: ["{proj_root}/hw/ip/entropy_src/dv/entropy_src_base_sim_cfg.hjson"] + import_cfgs: ["{proj_root}/hw/vendor/lowrisc_ip/ip/entropy_src/dv/entropy_src_base_sim_cfg.hjson"] - + build_opts: ["+define+RNG_BUS_WIDTH=16", "+define+RNG_BUS_BIT_SEL_WIDTH=4", -diff --git a/dv/entropy_src_rng4bits_sim_cfg.hjson b/dv/entropy_src_rng4bits_sim_cfg.hjson +diff --git a/entropy_src_rng4bits_sim_cfg.hjson b/entropy_src_rng4bits_sim_cfg.hjson index cc7ccb7..d0a21ca 100644 ---- a/dv/entropy_src_rng4bits_sim_cfg.hjson -+++ b/dv/entropy_src_rng4bits_sim_cfg.hjson +--- a/entropy_src_rng4bits_sim_cfg.hjson ++++ b/entropy_src_rng4bits_sim_cfg.hjson @@ -7,7 +7,7 @@ variant: rng_4bits - + // Import the base entropy_src sim_cfg file - import_cfgs: ["{proj_root}/hw/ip/entropy_src/dv/entropy_src_base_sim_cfg.hjson"] + import_cfgs: ["{proj_root}/hw/vendor/lowrisc_ip/ip/entropy_src/dv/entropy_src_base_sim_cfg.hjson"] - + build_opts: ["+define+RNG_BUS_WIDTH=4", "+define+RNG_BUS_BIT_SEL_WIDTH=2", diff --git a/hw/vendor/patches/lowrisc_ip/gpio/0001_fix_paths_and_tool.patch b/hw/vendor/patches/lowrisc_ip/gpio/0001_fix_paths_and_tool.patch index e4adf3644..c27dd4edb 100644 --- a/hw/vendor/patches/lowrisc_ip/gpio/0001_fix_paths_and_tool.patch +++ b/hw/vendor/patches/lowrisc_ip/gpio/0001_fix_paths_and_tool.patch @@ -19,38 +19,3 @@ index c8a6fdd..8049038 100644 "gpio_sec_cm_testplan.hjson"] testpoints: [ { -diff --git a/dv/gpio_sim_cfg.hjson.tpl b/dv/gpio_sim_cfg.hjson.tpl -index 9a24e9b..fd51546 100644 ---- a/dv/gpio_sim_cfg.hjson.tpl -+++ b/dv/gpio_sim_cfg.hjson.tpl -@@ -12,7 +12,7 @@ - tb: tb - - // Simulator used to sign off this block -- tool: vcs -+ tool: xcelium - - // Fusesoc core file used for building the file list. - fusesoc_core: ${instance_vlnv(f"lowrisc:dv:{module_instance_name}_sim:0.1")} -@@ -26,14 +26,14 @@ - - // Import additional common sim cfg files. - import_cfgs: [// Project wide common sim cfg file -- "{proj_root}/hw/dv/tools/dvsim/common_sim_cfg.hjson", -+ "{proj_root}/hw/vendor/lowrisc_ip/dv/tools/dvsim/common_sim_cfg.hjson", - // Common CIP test lists -- "{proj_root}/hw/dv/tools/dvsim/tests/csr_tests.hjson", -- "{proj_root}/hw/dv/tools/dvsim/tests/alert_test.hjson", -- "{proj_root}/hw/dv/tools/dvsim/tests/intr_test.hjson", -- "{proj_root}/hw/dv/tools/dvsim/tests/tl_access_tests.hjson", -- "{proj_root}/hw/dv/tools/dvsim/tests/sec_cm_tests.hjson", -- "{proj_root}/hw/dv/tools/dvsim/tests/stress_tests.hjson"] -+ "{proj_root}/hw/vendor/lowrisc_ip/dv/tools/dvsim/tests/csr_tests.hjson", -+ "{proj_root}/hw/vendor/lowrisc_ip/dv/tools/dvsim/tests/alert_test.hjson", -+ "{proj_root}/hw/vendor/lowrisc_ip/dv/tools/dvsim/tests/intr_test.hjson", -+ "{proj_root}/hw/vendor/lowrisc_ip/dv/tools/dvsim/tests/tl_access_tests.hjson", -+ "{proj_root}/hw/vendor/lowrisc_ip/dv/tools/dvsim/tests/sec_cm_tests.hjson", -+ "{proj_root}/hw/vendor/lowrisc_ip/dv/tools/dvsim/tests/stress_tests.hjson"] - - // Add additional tops for simulation. - sim_tops: ["${module_instance_name}_bind", "sec_cm_prim_onehot_check_bind"] diff --git a/hw/vendor/patches/lowrisc_ip/gpio_dv/0001_fix_paths_and_tool.patch b/hw/vendor/patches/lowrisc_ip/gpio_dv/0001_fix_paths_and_tool.patch new file mode 100644 index 000000000..6a7b521a0 --- /dev/null +++ b/hw/vendor/patches/lowrisc_ip/gpio_dv/0001_fix_paths_and_tool.patch @@ -0,0 +1,35 @@ +diff --git a/gpio_sim_cfg.hjson.tpl b/gpio_sim_cfg.hjson.tpl +index 9a24e9b..fd51546 100644 +--- a/gpio_sim_cfg.hjson.tpl ++++ b/gpio_sim_cfg.hjson.tpl +@@ -12,7 +12,7 @@ + tb: tb + + // Simulator used to sign off this block +- tool: vcs ++ tool: xcelium + + // Fusesoc core file used for building the file list. + fusesoc_core: ${instance_vlnv(f"lowrisc:dv:{module_instance_name}_sim:0.1")} +@@ -26,14 +26,14 @@ + + // Import additional common sim cfg files. + import_cfgs: [// Project wide common sim cfg file +- "{proj_root}/hw/dv/tools/dvsim/common_sim_cfg.hjson", ++ "{proj_root}/hw/vendor/lowrisc_ip/dv/tools/dvsim/common_sim_cfg.hjson", + // Common CIP test lists +- "{proj_root}/hw/dv/tools/dvsim/tests/csr_tests.hjson", +- "{proj_root}/hw/dv/tools/dvsim/tests/alert_test.hjson", +- "{proj_root}/hw/dv/tools/dvsim/tests/intr_test.hjson", +- "{proj_root}/hw/dv/tools/dvsim/tests/tl_access_tests.hjson", +- "{proj_root}/hw/dv/tools/dvsim/tests/sec_cm_tests.hjson", +- "{proj_root}/hw/dv/tools/dvsim/tests/stress_tests.hjson"] ++ "{proj_root}/hw/vendor/lowrisc_ip/dv/tools/dvsim/tests/csr_tests.hjson", ++ "{proj_root}/hw/vendor/lowrisc_ip/dv/tools/dvsim/tests/alert_test.hjson", ++ "{proj_root}/hw/vendor/lowrisc_ip/dv/tools/dvsim/tests/intr_test.hjson", ++ "{proj_root}/hw/vendor/lowrisc_ip/dv/tools/dvsim/tests/tl_access_tests.hjson", ++ "{proj_root}/hw/vendor/lowrisc_ip/dv/tools/dvsim/tests/sec_cm_tests.hjson", ++ "{proj_root}/hw/vendor/lowrisc_ip/dv/tools/dvsim/tests/stress_tests.hjson"] + + // Add additional tops for simulation. + sim_tops: ["${module_instance_name}_bind", "sec_cm_prim_onehot_check_bind"] diff --git a/hw/vendor/patches/lowrisc_ip/i2c/0001-Fix-Paths-and-Tool.patch b/hw/vendor/patches/lowrisc_ip/i2c/0001-Fix-Paths-and-Tool.patch index 3f544277c..52f4a798c 100644 --- a/hw/vendor/patches/lowrisc_ip/i2c/0001-Fix-Paths-and-Tool.patch +++ b/hw/vendor/patches/lowrisc_ip/i2c/0001-Fix-Paths-and-Tool.patch @@ -17,59 +17,3 @@ index 1fc121e..a6a2c84 100644 "i2c_sec_cm_testplan.hjson"] testpoints: [ //----------------------------------------------- -diff --git a/dv/i2c_sim_cfg.hjson b/dv/i2c_sim_cfg.hjson -index 392dba0..db081a6 100644 ---- a/dv/i2c_sim_cfg.hjson -+++ b/dv/i2c_sim_cfg.hjson -@@ -12,32 +12,32 @@ - tb: tb - - // Simulator used to sign off this block -- tool: vcs -+ tool: xcelium - - // Fusesoc core file used for building the file list. - fusesoc_core: lowrisc:dv:i2c_sim:0.1 - - // Testplan hjson file. -- testplan: "{proj_root}/hw/ip/i2c/data/i2c_testplan.hjson" -+ testplan: "{proj_root}/hw/vendor/lowrisc_ip/ip/i2c/data/i2c_testplan.hjson" - - // RAL spec - used to generate the RAL model. -- ral_spec: "{proj_root}/hw/ip/i2c/data/i2c.hjson" -+ ral_spec: "{proj_root}/hw/vendor/lowrisc_ip/ip/i2c/data/i2c.hjson" - - // Import additional common sim cfg files. - import_cfgs: [// Project wide common sim cfg file -- "{proj_root}/hw/dv/tools/dvsim/common_sim_cfg.hjson", -+ "{proj_root}/hw/vendor/lowrisc_ip/dv/tools/dvsim/common_sim_cfg.hjson", - // Common CIP test lists -- "{proj_root}/hw/dv/tools/dvsim/tests/csr_tests.hjson", -- "{proj_root}/hw/dv/tools/dvsim/tests/alert_test.hjson", -- "{proj_root}/hw/dv/tools/dvsim/tests/intr_test.hjson", -- "{proj_root}/hw/dv/tools/dvsim/tests/sec_cm_tests.hjson", -- "{proj_root}/hw/dv/tools/dvsim/tests/tl_access_tests.hjson"] -+ "{proj_root}/hw/vendor/lowrisc_ip/dv/tools/dvsim/tests/csr_tests.hjson", -+ "{proj_root}/hw/vendor/lowrisc_ip/dv/tools/dvsim/tests/alert_test.hjson", -+ "{proj_root}/hw/vendor/lowrisc_ip/dv/tools/dvsim/tests/intr_test.hjson", -+ "{proj_root}/hw/vendor/lowrisc_ip/dv/tools/dvsim/tests/sec_cm_tests.hjson", -+ "{proj_root}/hw/vendor/lowrisc_ip/dv/tools/dvsim/tests/tl_access_tests.hjson"] - - // Add additional tops for simulation. - sim_tops: ["i2c_bind", "sec_cm_prim_onehot_check_bind"] - - // Add coverage exclusion file -- vcs_cov_excl_files: ["{proj_root}/hw/ip/i2c/dv/cov/i2c_cov_excl.el"] -+ vcs_cov_excl_files: ["{proj_root}/hw/vendor/lowrisc_ip/ip/i2c/dv/cov/i2c_cov_excl.el"] - - // Default iterations for all tests - each test entry can override this. - reseed: 50 -@@ -53,7 +53,7 @@ - overrides: [ - { - name: default_vcs_cov_cfg_file -- value: "-cm_hier {proj_root}/hw/dv/tools/vcs/cover.cfg+{proj_root}/hw/dv/tools/vcs/common_cov_excl.cfg+{proj_root}/hw/ip/i2c/dv/cov/cov_excl.cfg" -+ value: "-cm_hier {proj_root}/hw/vendor/lowrisc_ip/dv/tools/vcs/cover.cfg+{proj_root}/hw/vendor/lowrisc_ip/dv/tools/vcs/common_cov_excl.cfg+{proj_root}/hw/vendor/lowrisc_ip/ip/i2c/dv/cov/cov_excl.cfg" - } - ] - diff --git a/hw/vendor/patches/lowrisc_ip/i2c_dv/0001_Fix_Paths_And_Tool.patch b/hw/vendor/patches/lowrisc_ip/i2c_dv/0001_Fix_Paths_And_Tool.patch new file mode 100644 index 000000000..8ba350d1c --- /dev/null +++ b/hw/vendor/patches/lowrisc_ip/i2c_dv/0001_Fix_Paths_And_Tool.patch @@ -0,0 +1,56 @@ +diff --git a/i2c_sim_cfg.hjson b/i2c_sim_cfg.hjson +index 392dba0..db081a6 100644 +--- a/i2c_sim_cfg.hjson ++++ b/i2c_sim_cfg.hjson +@@ -12,32 +12,32 @@ + tb: tb + + // Simulator used to sign off this block +- tool: vcs ++ tool: xcelium + + // Fusesoc core file used for building the file list. + fusesoc_core: lowrisc:dv:i2c_sim:0.1 + + // Testplan hjson file. +- testplan: "{proj_root}/hw/ip/i2c/data/i2c_testplan.hjson" ++ testplan: "{proj_root}/hw/vendor/lowrisc_ip/ip/i2c/data/i2c_testplan.hjson" + + // RAL spec - used to generate the RAL model. +- ral_spec: "{proj_root}/hw/ip/i2c/data/i2c.hjson" ++ ral_spec: "{proj_root}/hw/vendor/lowrisc_ip/ip/i2c/data/i2c.hjson" + + // Import additional common sim cfg files. + import_cfgs: [// Project wide common sim cfg file +- "{proj_root}/hw/dv/tools/dvsim/common_sim_cfg.hjson", ++ "{proj_root}/hw/vendor/lowrisc_ip/dv/tools/dvsim/common_sim_cfg.hjson", + // Common CIP test lists +- "{proj_root}/hw/dv/tools/dvsim/tests/csr_tests.hjson", +- "{proj_root}/hw/dv/tools/dvsim/tests/alert_test.hjson", +- "{proj_root}/hw/dv/tools/dvsim/tests/intr_test.hjson", +- "{proj_root}/hw/dv/tools/dvsim/tests/sec_cm_tests.hjson", +- "{proj_root}/hw/dv/tools/dvsim/tests/tl_access_tests.hjson"] ++ "{proj_root}/hw/vendor/lowrisc_ip/dv/tools/dvsim/tests/csr_tests.hjson", ++ "{proj_root}/hw/vendor/lowrisc_ip/dv/tools/dvsim/tests/alert_test.hjson", ++ "{proj_root}/hw/vendor/lowrisc_ip/dv/tools/dvsim/tests/intr_test.hjson", ++ "{proj_root}/hw/vendor/lowrisc_ip/dv/tools/dvsim/tests/sec_cm_tests.hjson", ++ "{proj_root}/hw/vendor/lowrisc_ip/dv/tools/dvsim/tests/tl_access_tests.hjson"] + + // Add additional tops for simulation. + sim_tops: ["i2c_bind", "sec_cm_prim_onehot_check_bind"] + + // Add coverage exclusion file +- vcs_cov_excl_files: ["{proj_root}/hw/ip/i2c/dv/cov/i2c_cov_excl.el"] ++ vcs_cov_excl_files: ["{proj_root}/hw/vendor/lowrisc_ip/ip/i2c/dv/cov/i2c_cov_excl.el"] + + // Default iterations for all tests - each test entry can override this. + reseed: 10 +@@ -53,7 +53,7 @@ + overrides: [ + { + name: default_vcs_cov_cfg_file +- value: "-cm_hier {proj_root}/hw/dv/tools/vcs/cover.cfg+{proj_root}/hw/dv/tools/vcs/common_cov_excl.cfg+{proj_root}/hw/ip/i2c/dv/cov/cov_excl.cfg" ++ value: "-cm_hier {proj_root}/hw/vendor/lowrisc_ip/dv/tools/vcs/cover.cfg+{proj_root}/hw/vendor/lowrisc_ip/dv/tools/vcs/common_cov_excl.cfg+{proj_root}/hw/vendor/lowrisc_ip/ip/i2c/dv/cov/cov_excl.cfg" + } + ] + diff --git a/hw/vendor/patches/lowrisc_ip/i2c_dv/0002_Fix_RAM_cfg_constant.patch b/hw/vendor/patches/lowrisc_ip/i2c_dv/0002_Fix_RAM_cfg_constant.patch new file mode 100644 index 000000000..2c32abc3b --- /dev/null +++ b/hw/vendor/patches/lowrisc_ip/i2c_dv/0002_Fix_RAM_cfg_constant.patch @@ -0,0 +1,14 @@ +diff --git a/tb/tb.sv b/tb/tb.sv +--- a/tb/tb.sv ++++ b/tb/tb.sv +@@ -79,8 +79,8 @@ + // dut + i2c dut ( + .clk_i (clk ), + .rst_ni (rst_n ), +- .ram_cfg_i (prim_ram_1p_pkg::RAM_1P_CFG_REQ_DEFAULT), +- .ram_cfg_o ( ), ++ .ram_cfg_i (prim_ram_1p_pkg::RAM_1P_CFG_DEFAULT), ++ .ram_cfg_rsp_o ( ), + + .tl_i (tl_if.h2d ), diff --git a/hw/vendor/patches/lowrisc_ip/kmac/0002-Fix-DV-Paths.patch b/hw/vendor/patches/lowrisc_ip/kmac/0002-Fix-DV-Paths.patch index 35323ad43..8494a8715 100644 --- a/hw/vendor/patches/lowrisc_ip/kmac/0002-Fix-DV-Paths.patch +++ b/hw/vendor/patches/lowrisc_ip/kmac/0002-Fix-DV-Paths.patch @@ -23,96 +23,3 @@ index 2a28bf54..f9b33bbf 100644 "kmac_sec_cm_testplan.hjson"] testpoints: [ { -diff --git a/dv/kmac_base_sim_cfg.hjson b/dv/kmac_base_sim_cfg.hjson -index 98cdb52a..7ffdffb7 100644 ---- a/dv/kmac_base_sim_cfg.hjson -+++ b/dv/kmac_base_sim_cfg.hjson -@@ -12,29 +12,29 @@ - tb: tb - - // Simulator used to sign off this block -- tool: vcs -+ tool: xcelium - - // Fusesoc core file used for building the file list. - fusesoc_core: lowrisc:dv:kmac_sim:0.1 - - // Testplan hjson file -- testplan: "{proj_root}/hw/ip/kmac/data/kmac_testplan.hjson" -+ testplan: "{proj_root}/hw/vendor/lowrisc_ip/ip/kmac/data/kmac_testplan.hjson" - - // RAL spec - used to generate the RAL model. -- ral_spec: "{proj_root}/hw/ip/kmac/data/kmac.hjson" -+ ral_spec: "{proj_root}/hw/vendor/lowrisc_ip/ip/kmac/data/kmac.hjson" - - // Import additional common sim cfg files. - import_cfgs: [// Project wide common sim cfg file -- "{proj_root}/hw/dv/tools/dvsim/common_sim_cfg.hjson", -+ "{proj_root}/hw/vendor/lowrisc_ip/dv/tools/dvsim/common_sim_cfg.hjson", - // Common CIP test lists -- "{proj_root}/hw/dv/tools/dvsim/tests/csr_tests.hjson", -- "{proj_root}/hw/dv/tools/dvsim/tests/intr_test.hjson", -- "{proj_root}/hw/dv/tools/dvsim/tests/tl_access_tests.hjson", -- "{proj_root}/hw/dv/tools/dvsim/tests/mem_tests.hjson", -- "{proj_root}/hw/dv/tools/dvsim/tests/alert_test.hjson", -- "{proj_root}/hw/dv/tools/dvsim/tests/shadow_reg_errors_tests.hjson", -- "{proj_root}/hw/dv/tools/dvsim/tests/sec_cm_tests.hjson", -- "{proj_root}/hw/dv/tools/dvsim/tests/stress_tests.hjson"] -+ "{proj_root}/hw/vendor/lowrisc_ip/dv/tools/dvsim/tests/csr_tests.hjson", -+ "{proj_root}/hw/vendor/lowrisc_ip/dv/tools/dvsim/tests/intr_test.hjson", -+ "{proj_root}/hw/vendor/lowrisc_ip/dv/tools/dvsim/tests/tl_access_tests.hjson", -+ "{proj_root}/hw/vendor/lowrisc_ip/dv/tools/dvsim/tests/mem_tests.hjson", -+ "{proj_root}/hw/vendor/lowrisc_ip/dv/tools/dvsim/tests/alert_test.hjson", -+ "{proj_root}/hw/vendor/lowrisc_ip/dv/tools/dvsim/tests/shadow_reg_errors_tests.hjson", -+ "{proj_root}/hw/vendor/lowrisc_ip/dv/tools/dvsim/tests/sec_cm_tests.hjson", -+ "{proj_root}/hw/vendor/lowrisc_ip/dv/tools/dvsim/tests/stress_tests.hjson"] - - // Add additional tops for simulation. - sim_tops: ["kmac_bind", -@@ -56,7 +56,7 @@ - } - { - name: rel_path -- value: "hw/ip/{name}_{variant}/dv" -+ value: "hw/vendor/lowrisc_ip/ip/{name}_{variant}/dv" - } - ] - -diff --git a/dv/kmac_masked_sim_cfg.hjson b/dv/kmac_masked_sim_cfg.hjson -index d339bb09..45e2b019 100644 ---- a/dv/kmac_masked_sim_cfg.hjson -+++ b/dv/kmac_masked_sim_cfg.hjson -@@ -8,11 +8,11 @@ - variant: masked - - // Import additional common sim cfg files. -- import_cfgs: ["{proj_root}/hw/ip/kmac/dv/kmac_base_sim_cfg.hjson"] -+ import_cfgs: ["{proj_root}/hw/vendor/lowrisc_ip/ip/kmac/dv/kmac_base_sim_cfg.hjson"] - - // Enable this build mode for all tests - en_build_modes: ["enable_mask_mode"] - - // exclusion files -- vcs_cov_excl_files: ["{proj_root}/hw/ip/kmac/dv/cov/kmac_masked_terminal_st_excl.el"] -+ vcs_cov_excl_files: ["{proj_root}/hw/vendor/lowrisc_ip/ip/kmac/dv/cov/kmac_masked_terminal_st_excl.el"] - } -diff --git a/dv/kmac_unmasked_sim_cfg.hjson b/dv/kmac_unmasked_sim_cfg.hjson -index 8b68da19..fba0750a 100644 ---- a/dv/kmac_unmasked_sim_cfg.hjson -+++ b/dv/kmac_unmasked_sim_cfg.hjson -@@ -8,12 +8,12 @@ - variant: unmasked - - // Import additional common sim cfg files. -- import_cfgs: ["{proj_root}/hw/ip/kmac/dv/kmac_base_sim_cfg.hjson"] -+ import_cfgs: ["{proj_root}/hw/vendor/lowrisc_ip/ip/kmac/dv/kmac_base_sim_cfg.hjson"] - - // Enable this build mode for all tests - en_build_modes: ["disable_mask_mode"] - - // exclusion files -- vcs_cov_excl_files: ["{proj_root}/hw/ip/kmac/dv/cov/kmac_unmasked_terminal_st_excl.el", -- "{proj_root}/hw/ip/kmac/dv/cov/kmac_unmasked_cov_excl.el"] -+ vcs_cov_excl_files: ["{proj_root}/hw/vendor/lowrisc_ip/ip/kmac/dv/cov/kmac_unmasked_terminal_st_excl.el", -+ "{proj_root}/hw/vendor/lowrisc_ip/ip/kmac/dv/cov/kmac_unmasked_cov_excl.el"] - } diff --git a/hw/vendor/patches/lowrisc_ip/kmac_dv/0001_Fix_DV_Paths.patch b/hw/vendor/patches/lowrisc_ip/kmac_dv/0001_Fix_DV_Paths.patch new file mode 100644 index 000000000..831b11eb1 --- /dev/null +++ b/hw/vendor/patches/lowrisc_ip/kmac_dv/0001_Fix_DV_Paths.patch @@ -0,0 +1,93 @@ +diff --git a/kmac_base_sim_cfg.hjson b/kmac_base_sim_cfg.hjson +index 98cdb52a..7ffdffb7 100644 +--- a/kmac_base_sim_cfg.hjson ++++ b/kmac_base_sim_cfg.hjson +@@ -12,29 +12,29 @@ + tb: tb + + // Simulator used to sign off this block +- tool: vcs ++ tool: xcelium + + // Fusesoc core file used for building the file list. + fusesoc_core: lowrisc:dv:kmac_sim:0.1 + + // Testplan hjson file +- testplan: "{proj_root}/hw/ip/kmac/data/kmac_testplan.hjson" ++ testplan: "{proj_root}/hw/vendor/lowrisc_ip/ip/kmac/data/kmac_testplan.hjson" + + // RAL spec - used to generate the RAL model. +- ral_spec: "{proj_root}/hw/ip/kmac/data/kmac.hjson" ++ ral_spec: "{proj_root}/hw/vendor/lowrisc_ip/ip/kmac/data/kmac.hjson" + + // Import additional common sim cfg files. + import_cfgs: [// Project wide common sim cfg file +- "{proj_root}/hw/dv/tools/dvsim/common_sim_cfg.hjson", ++ "{proj_root}/hw/vendor/lowrisc_ip/dv/tools/dvsim/common_sim_cfg.hjson", + // Common CIP test lists +- "{proj_root}/hw/dv/tools/dvsim/tests/csr_tests.hjson", +- "{proj_root}/hw/dv/tools/dvsim/tests/intr_test.hjson", +- "{proj_root}/hw/dv/tools/dvsim/tests/tl_access_tests.hjson", +- "{proj_root}/hw/dv/tools/dvsim/tests/mem_tests.hjson", +- "{proj_root}/hw/dv/tools/dvsim/tests/alert_test.hjson", +- "{proj_root}/hw/dv/tools/dvsim/tests/shadow_reg_errors_tests.hjson", +- "{proj_root}/hw/dv/tools/dvsim/tests/sec_cm_tests.hjson", +- "{proj_root}/hw/dv/tools/dvsim/tests/stress_tests.hjson"] ++ "{proj_root}/hw/vendor/lowrisc_ip/dv/tools/dvsim/tests/csr_tests.hjson", ++ "{proj_root}/hw/vendor/lowrisc_ip/dv/tools/dvsim/tests/intr_test.hjson", ++ "{proj_root}/hw/vendor/lowrisc_ip/dv/tools/dvsim/tests/tl_access_tests.hjson", ++ "{proj_root}/hw/vendor/lowrisc_ip/dv/tools/dvsim/tests/mem_tests.hjson", ++ "{proj_root}/hw/vendor/lowrisc_ip/dv/tools/dvsim/tests/alert_test.hjson", ++ "{proj_root}/hw/vendor/lowrisc_ip/dv/tools/dvsim/tests/shadow_reg_errors_tests.hjson", ++ "{proj_root}/hw/vendor/lowrisc_ip/dv/tools/dvsim/tests/sec_cm_tests.hjson", ++ "{proj_root}/hw/vendor/lowrisc_ip/dv/tools/dvsim/tests/stress_tests.hjson"] + + // Add additional tops for simulation. + sim_tops: ["kmac_bind", +@@ -56,7 +56,7 @@ + } + { + name: rel_path +- value: "hw/ip/{name}_{variant}/dv" ++ value: "hw/vendor/lowrisc_ip/ip/{name}_{variant}/dv" + } + ] + +diff --git a/kmac_masked_sim_cfg.hjson b/kmac_masked_sim_cfg.hjson +index d339bb09..45e2b019 100644 +--- a/kmac_masked_sim_cfg.hjson ++++ b/kmac_masked_sim_cfg.hjson +@@ -8,11 +8,11 @@ + variant: masked + + // Import additional common sim cfg files. +- import_cfgs: ["{proj_root}/hw/ip/kmac/dv/kmac_base_sim_cfg.hjson"] ++ import_cfgs: ["{proj_root}/hw/vendor/lowrisc_ip/ip/kmac/dv/kmac_base_sim_cfg.hjson"] + + // Enable this build mode for all tests + en_build_modes: ["enable_mask_mode"] + + // exclusion files +- vcs_cov_excl_files: ["{proj_root}/hw/ip/kmac/dv/cov/kmac_masked_terminal_st_excl.el"] ++ vcs_cov_excl_files: ["{proj_root}/hw/vendor/lowrisc_ip/ip/kmac/dv/cov/kmac_masked_terminal_st_excl.el"] + } +diff --git a/kmac_unmasked_sim_cfg.hjson b/kmac_unmasked_sim_cfg.hjson +index 8b68da19..fba0750a 100644 +--- a/kmac_unmasked_sim_cfg.hjson ++++ b/kmac_unmasked_sim_cfg.hjson +@@ -8,12 +8,12 @@ + variant: unmasked + + // Import additional common sim cfg files. +- import_cfgs: ["{proj_root}/hw/ip/kmac/dv/kmac_base_sim_cfg.hjson"] ++ import_cfgs: ["{proj_root}/hw/vendor/lowrisc_ip/ip/kmac/dv/kmac_base_sim_cfg.hjson"] + + // Enable this build mode for all tests + en_build_modes: ["disable_mask_mode"] + + // exclusion files +- vcs_cov_excl_files: ["{proj_root}/hw/ip/kmac/dv/cov/kmac_unmasked_terminal_st_excl.el", +- "{proj_root}/hw/ip/kmac/dv/cov/kmac_unmasked_cov_excl.el"] ++ vcs_cov_excl_files: ["{proj_root}/hw/vendor/lowrisc_ip/ip/kmac/dv/cov/kmac_unmasked_terminal_st_excl.el", ++ "{proj_root}/hw/vendor/lowrisc_ip/ip/kmac/dv/cov/kmac_unmasked_cov_excl.el"] + } diff --git a/hw/vendor/patches/lowrisc_ip/kmac/0003-kmac-dv-env-fixes.patch b/hw/vendor/patches/lowrisc_ip/kmac_dv/0002_kmac_dv_env_fixes.patch similarity index 86% rename from hw/vendor/patches/lowrisc_ip/kmac/0003-kmac-dv-env-fixes.patch rename to hw/vendor/patches/lowrisc_ip/kmac_dv/0002_kmac_dv_env_fixes.patch index f7a810fb8..b9b623093 100644 --- a/hw/vendor/patches/lowrisc_ip/kmac/0003-kmac-dv-env-fixes.patch +++ b/hw/vendor/patches/lowrisc_ip/kmac_dv/0002_kmac_dv_env_fixes.patch @@ -1,10 +1,10 @@ -diff --git a/dv/env/kmac_env.sv b/dv/env/kmac_env.sv +diff --git a/env/kmac_env.sv b/env/kmac_env.sv index 93c5c02c..c78784b8 100644 ---- a/dv/env/kmac_env.sv -+++ b/dv/env/kmac_env.sv +--- a/env/kmac_env.sv ++++ b/env/kmac_env.sv @@ -25,9 +25,9 @@ class kmac_env extends cip_base_env #( end - + // get ext interfaces - keymgr_sideload_agent = key_sideload_agent#(keymgr_pkg::hw_key_req_t)::type_id::create( + keymgr_sideload_agent = key_sideload_agent#(kmac_pkg::hw_key_req_t)::type_id::create( @@ -12,12 +12,12 @@ index 93c5c02c..c78784b8 100644 - uvm_config_db#(key_sideload_agent_cfg#(keymgr_pkg::hw_key_req_t))::set( + uvm_config_db#(key_sideload_agent_cfg#(kmac_pkg::hw_key_req_t))::set( this, "keymgr_sideload_agent*", "cfg", cfg.keymgr_sideload_agent_cfg); - + // config kmac virtual interface -diff --git a/dv/env/kmac_env_cfg.sv b/dv/env/kmac_env_cfg.sv +diff --git a/env/kmac_env_cfg.sv b/env/kmac_env_cfg.sv index efbb3905..bbd7bbba 100644 ---- a/dv/env/kmac_env_cfg.sv -+++ b/dv/env/kmac_env_cfg.sv +--- a/env/kmac_env_cfg.sv ++++ b/env/kmac_env_cfg.sv @@ -61,7 +61,7 @@ class kmac_env_cfg extends cip_base_env_cfg #(.RAL_T(kmac_reg_block)); m_kmac_app_agent_cfg[i] = kmac_app_agent_cfg::type_id::create(name); m_kmac_app_agent_cfg[i].if_mode = dv_utils_pkg::Host; @@ -27,10 +27,10 @@ index efbb3905..bbd7bbba 100644 ::create("keymgr_sideload_agent_cfg"); void'($value$plusargs("enable_masking=%0d", enable_masking)); void'($value$plusargs("sw_key_masked=%0d", sw_key_masked)); -diff --git a/dv/env/kmac_env_cov.sv b/dv/env/kmac_env_cov.sv +diff --git a/env/kmac_env_cov.sv b/env/kmac_env_cov.sv index 18206d81..6b1897fc 100644 ---- a/dv/env/kmac_env_cov.sv -+++ b/dv/env/kmac_env_cov.sv +--- a/env/kmac_env_cov.sv ++++ b/env/kmac_env_cov.sv @@ -125,7 +125,7 @@ endgroup class app_cg_wrap; // done signal is sent while Keccak rounds are running @@ -41,23 +41,23 @@ index 18206d81..6b1897fc 100644 bit is_done, bit in_keccak); @@ -177,11 +177,11 @@ class app_cg_wrap; - + function new(string name = "app_cg"); app_cg = new(name); - app_cfg_reg_cg = new(name); + app_cfg_reg_cg = new({name, "_cfg_reg"}); endfunction - + function void app_sample(bit single_beat, - bit [keymgr_pkg::KmacDataIfWidth/8-1:0] strb, + bit [kmac_pkg::MsgWidth/8-1:0] strb, bit err, bit is_done, bit in_keccak); -diff --git a/dv/env/kmac_env_pkg.sv b/dv/env/kmac_env_pkg.sv +diff --git a/env/kmac_env_pkg.sv b/env/kmac_env_pkg.sv index 3cf6e591..88ebe476 100644 ---- a/dv/env/kmac_env_pkg.sv -+++ b/dv/env/kmac_env_pkg.sv +--- a/env/kmac_env_pkg.sv ++++ b/env/kmac_env_pkg.sv @@ -19,7 +19,6 @@ package kmac_env_pkg; import kmac_app_agent_pkg::*; import kmac_ral_pkg::*; @@ -65,33 +65,33 @@ index 3cf6e591..88ebe476 100644 - import keymgr_pkg::*; import key_sideload_agent_pkg::*; import sec_cm_pkg::*; - -diff --git a/dv/env/kmac_scoreboard.sv b/dv/env/kmac_scoreboard.sv + +diff --git a/env/kmac_scoreboard.sv b/env/kmac_scoreboard.sv index a6222f68..018009c7 100644 ---- a/dv/env/kmac_scoreboard.sv -+++ b/dv/env/kmac_scoreboard.sv +--- a/env/kmac_scoreboard.sv ++++ b/env/kmac_scoreboard.sv @@ -110,8 +110,8 @@ class kmac_scoreboard extends cip_base_scoreboard #( // key length enum key_len_e key_len; - + - bit [keymgr_pkg::KmacDataIfWidth-1:0] kmac_app_block_data; - bit [keymgr_pkg::KmacDataIfWidth/8-1:0] kmac_app_block_strb; + bit [kmac_pkg::MsgWidth-1:0] kmac_app_block_data; + bit [kmac_pkg::MsgWidth/8-1:0] kmac_app_block_strb; int kmac_app_block_strb_size = 0; bit kmac_app_last; - + @@ -263,13 +263,13 @@ class kmac_scoreboard extends cip_base_scoreboard #( - + // Once valid sideload keys have been seen, update scoreboard state. // - // Note: max size of sideloaded key is keymgr_pkg::KeyWidth + // Note: max size of sideloaded key is kmac_pkg::KeyWidth - + sideload_key = cfg.keymgr_sideload_agent_cfg.vif.sideload_key; - + `uvm_info(`gfn, $sformatf("detected valid sideload_key: %0p", sideload_key), UVM_HIGH) - + - for (int i = 0; i < keymgr_pkg::KeyWidth / 32; i++) begin + for (int i = 0; i < kmac_pkg::KeyWidth / 32; i++) begin keymgr_keys[0][i] = sideload_key.key[0][i*32 +: 32]; @@ -103,7 +103,7 @@ index a6222f68..018009c7 100644 bit [KMAC_NUM_SHARES-1:0][KMAC_NUM_KEYS_PER_SHARE-1:0][31:0] keymgr_keys; - keymgr_pkg::hw_key_req_t sideload_key; + kmac_pkg::hw_key_req_t sideload_key; - + if (cfg.keymgr_sideload_agent_cfg.vif.sideload_key.valid) begin sideload_key = cfg.keymgr_sideload_agent_cfg.vif.sideload_key; `uvm_info(`gfn, $sformatf("get valid sideload_key: %0p", sideload_key), UVM_HIGH) @@ -112,34 +112,34 @@ index a6222f68..018009c7 100644 keymgr_keys[0][i] = sideload_key.key[0][i*32 +: 32]; keymgr_keys[1][i] = sideload_key.key[1][i*32 +: 32]; end -@@ -561,7 +561,7 @@ class kmac_scoreboard extends cip_base_scoreboard #( +@@ -570,7 +570,7 @@ class kmac_scoreboard extends cip_base_scoreboard #( // sample coverage if (cfg.en_cov) begin cov.app_cg_wrappers[app_mode].app_sample( - kmac_app_rsp.byte_data_q.size() <= keymgr_pkg::KmacDataIfWidth/8, + kmac_app_rsp.byte_data_q.size() <= kmac_pkg::MsgWidth/8, '0, - kmac_app_rsp.rsp_error, + kmac_app_rsp.error, 1, -diff --git a/dv/env/seq_lib/kmac_smoke_vseq.sv b/dv/env/seq_lib/kmac_smoke_vseq.sv +diff --git a/env/seq_lib/kmac_smoke_vseq.sv b/env/seq_lib/kmac_smoke_vseq.sv index ddb1021b..70ee26ba 100644 ---- a/dv/env/seq_lib/kmac_smoke_vseq.sv -+++ b/dv/env/seq_lib/kmac_smoke_vseq.sv +--- a/env/seq_lib/kmac_smoke_vseq.sv ++++ b/env/seq_lib/kmac_smoke_vseq.sv @@ -103,8 +103,8 @@ class kmac_smoke_vseq extends kmac_base_vseq; // Do a full message hash, repeated num_trans times task body(); - + - logic [keymgr_pkg::KeyWidth-1:0] sideload_share0; - logic [keymgr_pkg::KeyWidth-1:0] sideload_share1; + logic [kmac_pkg::KeyWidth-1:0] sideload_share0; + logic [kmac_pkg::KeyWidth-1:0] sideload_share1; key_sideload_set_seq sideload_seq; - + `uvm_info(`gfn, $sformatf("Starting %0d message hashes", num_trans), UVM_LOW) -diff --git a/dv/tb.sv b/dv/tb.sv +diff --git a/tb.sv b/tb.sv index 3c145ca1..ac702a7c 100644 ---- a/dv/tb.sv -+++ b/dv/tb.sv +--- a/tb.sv ++++ b/tb.sv @@ -17,7 +17,7 @@ module tb; wire clk, rst_n, rst_shadowed_n; wire [NUM_MAX_INTERRUPTS-1:0] interrupts; diff --git a/hw/vendor/patches/lowrisc_ip/kmac/0004-Guard-masked-entropy-asserts.patch b/hw/vendor/patches/lowrisc_ip/kmac_dv/0003_Guard_masked_entropy_asserts.patch similarity index 75% rename from hw/vendor/patches/lowrisc_ip/kmac/0004-Guard-masked-entropy-asserts.patch rename to hw/vendor/patches/lowrisc_ip/kmac_dv/0003_Guard_masked_entropy_asserts.patch index 6d19c6ee0..432b24a8c 100644 --- a/hw/vendor/patches/lowrisc_ip/kmac/0004-Guard-masked-entropy-asserts.patch +++ b/hw/vendor/patches/lowrisc_ip/kmac_dv/0003_Guard_masked_entropy_asserts.patch @@ -1,7 +1,7 @@ -diff --git a/dv/env/seq_lib/kmac_common_vseq.sv b/dv/env/seq_lib/kmac_common_vseq.sv +diff --git a/env/seq_lib/kmac_common_vseq.sv b/env/seq_lib/kmac_common_vseq.sv index 481e7451..1382fc16 100644 ---- a/dv/env/seq_lib/kmac_common_vseq.sv -+++ b/dv/env/seq_lib/kmac_common_vseq.sv +--- a/env/seq_lib/kmac_common_vseq.sv ++++ b/env/seq_lib/kmac_common_vseq.sv @@ -18,10 +18,12 @@ class kmac_common_vseq extends kmac_base_vseq; if (common_seq_type inside {"shadow_reg_errors", "shadow_reg_errors_with_csr_rw"}) begin csr_excl_item csr_excl = ral.get_excl_item(); @@ -15,13 +15,13 @@ index 481e7451..1382fc16 100644 $assertoff(0, "tb.edn_if[0].ReqHighUntilAck_A"); $assertoff(0, "tb.edn_if[0].AckAssertedOnlyWhenReqAsserted_A"); end -diff --git a/dv/env/seq_lib/kmac_lc_escalation_vseq.sv b/dv/env/seq_lib/kmac_lc_escalation_vseq.sv +diff --git a/env/seq_lib/kmac_lc_escalation_vseq.sv b/env/seq_lib/kmac_lc_escalation_vseq.sv index bbf9e55d..d7ba893f 100644 ---- a/dv/env/seq_lib/kmac_lc_escalation_vseq.sv -+++ b/dv/env/seq_lib/kmac_lc_escalation_vseq.sv +--- a/env/seq_lib/kmac_lc_escalation_vseq.sv ++++ b/env/seq_lib/kmac_lc_escalation_vseq.sv @@ -8,8 +8,10 @@ class kmac_lc_escalation_vseq extends kmac_app_vseq; `uvm_object_new - + virtual function void disable_asserts(); +`ifdef KMAC_MASKING $assertoff(0, @@ -30,10 +30,10 @@ index bbf9e55d..d7ba893f 100644 $assertoff(0, "tb.edn_if[0].ReqHighUntilAck_A"); $assertoff(0, "tb.edn_if[0].AckAssertedOnlyWhenReqAsserted_A"); endfunction -diff --git a/dv/kmac_base_sim_cfg.hjson b/dv/kmac_base_sim_cfg.hjson +diff --git a/kmac_base_sim_cfg.hjson b/kmac_base_sim_cfg.hjson index 7ffdffb7..d07d3ef5 100644 ---- a/dv/kmac_base_sim_cfg.hjson -+++ b/dv/kmac_base_sim_cfg.hjson +--- a/kmac_base_sim_cfg.hjson ++++ b/kmac_base_sim_cfg.hjson @@ -63,7 +63,7 @@ build_modes: [ { diff --git a/hw/vendor/patches/lowrisc_ip/kmac_dv/0004_Fix_App_Config_And_Req_Rsp_Fields.patch b/hw/vendor/patches/lowrisc_ip/kmac_dv/0004_Fix_App_Config_And_Req_Rsp_Fields.patch new file mode 100644 index 000000000..01953c1d1 --- /dev/null +++ b/hw/vendor/patches/lowrisc_ip/kmac_dv/0004_Fix_App_Config_And_Req_Rsp_Fields.patch @@ -0,0 +1,203 @@ +diff --git a/env/kmac_env_pkg.sv b/env/kmac_env_pkg.sv +--- a/env/kmac_env_pkg.sv ++++ b/env/kmac_env_pkg.sv +@@ -70,10 +70,10 @@ + parameter uint NUM_EDN = 1; + + // Earlgrey has 3 application interfaces +- parameter uint NUM_APP_INTF = 4; ++ parameter uint NUM_APP_INTF = 3; + parameter app_config_t APP_CFG[NUM_APP_INTF] = + '{kmac_pkg::AppCfgKeyMgr, kmac_pkg::AppCfgLcCtrl, +- kmac_pkg::AppCfgRomCtrl, kmac_pkg::AppCfgOtbn}; ++ kmac_pkg::AppCfgRomCtrl}; + + ///////////////////////////// + // Timing Model Parameters // +diff --git a/env/kmac_scoreboard.sv b/env/kmac_scoreboard.sv +--- a/env/kmac_scoreboard.sv ++++ b/env/kmac_scoreboard.sv +@@ -330,16 +330,16 @@ + `uvm_info(`gfn, "Raised in_kmac_app and sha3_absorb. Dropped sha3_idle.", UVM_HIGH) + + // we need to choose the correct application interface + if (`KMAC_APP_VALID_TRANS(AppKeymgr)) begin + app_mode = AppKeymgr; +- strength = APP_CFG[app_mode].session_cfg.kstrength; ++ strength = APP_CFG[app_mode].KeccakStrength; + if (entropy_ready) incr_and_predict_hash_cnt(); + end else if (`KMAC_APP_VALID_TRANS(AppLc)) begin + app_mode = AppLc; +- strength = APP_CFG[app_mode].session_cfg.kstrength; ++ strength = APP_CFG[app_mode].KeccakStrength; + end else if (`KMAC_APP_VALID_TRANS(AppRom)) begin + app_mode = AppRom; +- strength = APP_CFG[app_mode].session_cfg.kstrength; ++ strength = APP_CFG[app_mode].KeccakStrength; + end else if (`KMAC_APP_VALID_TRANS(AppOtbn)) begin + `uvm_fatal(get_full_name(), + "Cannot start KMAC app for OTBN (no support for dynamic apps yet)") +@@ -1748,8 +1748,8 @@ + byte fname_arr[]; + byte custom_str_arr[]; + +- if (en_kmac_app && APP_CFG[app_mode].session_cfg.prefix_mode) begin +- prefix_bytes = {<< byte {APP_CFG[app_mode].prefix}}; ++ if (en_kmac_app && APP_CFG[app_mode].PrefixMode) begin ++ prefix_bytes = {<< byte {APP_CFG[app_mode].Prefix}}; + end else begin + prefix_bytes = {<< 32 {prefix}}; + prefix_bytes = {<< byte {prefix_bytes}}; +--- a/env/kmac_if.sv ++++ b/env/kmac_if.sv +@@ -19,11 +19,11 @@ + `ASSERT(KmacMaskingO_A, `EN_MASKING == en_masking_o) + + `ASSERT(AppKeymgrErrOutputZeros_A, app_rsp[AppKeymgr].error |-> +- app_rsp[AppKeymgr].digest_s0 == 0 && app_rsp[AppKeymgr].digest_s1 == 0) ++ app_rsp[AppKeymgr].digest_share0 == 0 && app_rsp[AppKeymgr].digest_share1 == 0) + + `ASSERT(AppLcErrOutputZeros_A, app_rsp[AppLc].error |-> +- app_rsp[AppLc].digest_s0 == 0 && app_rsp[AppLc].digest_s1 == 0) ++ app_rsp[AppLc].digest_share0 == 0 && app_rsp[AppLc].digest_share1 == 0) + + `ASSERT(AppRomErrOutputZeros_A, app_rsp[AppRom].error |-> +- app_rsp[AppRom].digest_s0 == 0 && app_rsp[AppRom].digest_s1 == 0) ++ app_rsp[AppRom].digest_share0 == 0 && app_rsp[AppRom].digest_share1 == 0) + endinterface +--- a/env/kmac_scoreboard.sv ++++ b/env/kmac_scoreboard.sv +@@ -473,8 +473,8 @@ + + // It's possible for SW to not clear the error until after the hash is done. + // In this case the hash will be garbage data, so do not check it. +- if (cfg.m_kmac_app_agent_cfg[app_mode].vif.kmac_data_req.req_valid && +- cfg.m_kmac_app_agent_cfg[app_mode].vif.kmac_data_req.req_last) begin ++ if (cfg.m_kmac_app_agent_cfg[app_mode].vif.kmac_data_req.valid && ++ cfg.m_kmac_app_agent_cfg[app_mode].vif.kmac_data_req.last) begin + do_check_digest = 0; + end + +--- a/env/seq_lib/kmac_smoke_vseq.sv ++++ b/env/seq_lib/kmac_smoke_vseq.sv +@@ -195,7 +195,7 @@ + bit [TL_DW-1:0] rand_data; + `DV_CHECK_MEMBER_RANDOMIZE_FATAL(fifo_addr) + `DV_CHECK_STD_RANDOMIZE_FATAL(rand_data) +- wait (cfg.m_kmac_app_agent_cfg[app_mode].vif.kmac_data_req.req_valid); ++ wait (cfg.m_kmac_app_agent_cfg[app_mode].vif.kmac_data_req.valid); + tl_access(.addr(ral.get_addr_from_offset(fifo_addr)), + .write(1), + .data(rand_data), +@@ -211,7 +211,7 @@ + // the only command that will trigger this particular error is CmdStart. + if (kmac_err_type == kmac_pkg::ErrSwIssuedCmdInAppActive) begin : sw_cmd_in_app + kmac_pkg::kmac_cmd_e invalid_cmd = kmac_pkg::CmdStart; +- wait (cfg.m_kmac_app_agent_cfg[app_mode].vif.kmac_data_req.req_valid); ++ wait (cfg.m_kmac_app_agent_cfg[app_mode].vif.kmac_data_req.valid); + cfg.clk_rst_vif.wait_clks($urandom_range(25, 250)); + issue_cmd(invalid_cmd); + error_injected = 1; +@@ -221,7 +221,7 @@ + // provided to an AppKeymgr operation that is in progress. + if (kmac_err_type == kmac_pkg::ErrKeyNotValid) begin : check_invalid_key_err + // wait until the first valid request is seen +- wait (cfg.m_kmac_app_agent_cfg[app_mode].vif.kmac_data_req.req_valid); ++ wait (cfg.m_kmac_app_agent_cfg[app_mode].vif.kmac_data_req.valid); + if (process_key_err_before_app_done) begin + disable send_kmac_req; + check_err(); +--- a/env/seq_lib/kmac_sideload_invalid_vseq.sv ++++ b/env/seq_lib/kmac_sideload_invalid_vseq.sv +@@ -76,8 +76,8 @@ + // TODO(lowrisc/opentitan#24739): Currently, when invalidating the key when the + // app_i.last was received, exiting the StErrorAwaitApp is not possible anymore. + // After resolving this issue, we simply can wait until we got kmac_done. +- wait(cfg.m_kmac_app_agent_cfg[app_mode].vif.kmac_data_req.req_valid && +- cfg.m_kmac_app_agent_cfg[app_mode].vif.kmac_data_req.req_last); ++ wait(cfg.m_kmac_app_agent_cfg[app_mode].vif.kmac_data_req.valid && ++ cfg.m_kmac_app_agent_cfg[app_mode].vif.kmac_data_req.last); + kmac_done = 1; + end else begin + // Issue Start cmd. +@@ -136,7 +136,7 @@ + // app_i.last was received, exiting the StErrorAwaitApp is not possible anymore. + // After resolving this issue, the last condition can be removed. + if (invalidate_key && !kmac_done && +- (!en_app || !cfg.m_kmac_app_agent_cfg[app_mode].vif.kmac_data_req.req_last)) begin ++ (!en_app || !cfg.m_kmac_app_agent_cfg[app_mode].vif.kmac_data_req.last)) begin + // We got the FSM state, the key is valid, and the operation is not yet done. + // Invalidate the key and wait for the expected error code. + `uvm_info(`gfn, $sformatf("invalidated key in state %0b", curr_state), UVM_LOW) +--- a/env/seq_lib/kmac_key_error_vseq.sv ++++ b/env/seq_lib/kmac_key_error_vseq.sv +@@ -45,8 +45,8 @@ + fork begin : isolation_fork + fork + send_kmac_app_req(app_mode); +- wait (cfg.m_kmac_app_agent_cfg[app_mode].vif.kmac_data_req.req_valid && +- cfg.m_kmac_app_agent_cfg[app_mode].vif.kmac_data_req.req_last); ++ wait (cfg.m_kmac_app_agent_cfg[app_mode].vif.kmac_data_req.valid && ++ cfg.m_kmac_app_agent_cfg[app_mode].vif.kmac_data_req.last); + join_any; + disable fork; + end join +@@ -76,18 +76,18 @@ + virtual task check_keymgr_rsp_nonblocking(); + fork begin + while (cfg.en_scb == 0) begin +- wait (cfg.m_kmac_app_agent_cfg[app_mode].vif.kmac_data_rsp.req_ready == 1); +- `DV_CHECK_EQ(cfg.m_kmac_app_agent_cfg[app_mode].vif.kmac_data_rsp.digest_s0, '0) +- `DV_CHECK_EQ(cfg.m_kmac_app_agent_cfg[app_mode].vif.kmac_data_rsp.digest_s1, '0) +- wait (cfg.m_kmac_app_agent_cfg[app_mode].vif.kmac_data_rsp.req_ready == 0); ++ wait (cfg.m_kmac_app_agent_cfg[app_mode].vif.kmac_data_rsp.ready == 1); ++ `DV_CHECK_EQ(cfg.m_kmac_app_agent_cfg[app_mode].vif.kmac_data_rsp.digest_share0, '0) ++ `DV_CHECK_EQ(cfg.m_kmac_app_agent_cfg[app_mode].vif.kmac_data_rsp.digest_share1, '0) ++ wait (cfg.m_kmac_app_agent_cfg[app_mode].vif.kmac_data_rsp.ready == 0); + end + end join_none + + fork begin + while (cfg.en_scb == 0) begin +- wait (cfg.m_kmac_app_agent_cfg[app_mode].vif.kmac_data_rsp.rsp_valid == 1); ++ wait (cfg.m_kmac_app_agent_cfg[app_mode].vif.kmac_data_rsp.done == 1); + `DV_CHECK_EQ(cfg.m_kmac_app_agent_cfg[app_mode].vif.kmac_data_rsp.error, 1) +- wait (cfg.m_kmac_app_agent_cfg[app_mode].vif.kmac_data_rsp.rsp_valid == 0); ++ wait (cfg.m_kmac_app_agent_cfg[app_mode].vif.kmac_data_rsp.done == 0); + end + end join_none + endtask +--- a/env/seq_lib/kmac_edn_timeout_error_vseq.sv ++++ b/env/seq_lib/kmac_edn_timeout_error_vseq.sv +@@ -63,11 +63,11 @@ + virtual task check_keymgr_rsp_nonblocking(); + fork begin + while (cfg.en_scb == 0 && entropy_fetched == 0) begin +- wait (cfg.m_kmac_app_agent_cfg[AppKeymgr].vif.kmac_data_rsp.rsp_valid == 1); ++ wait (cfg.m_kmac_app_agent_cfg[AppKeymgr].vif.kmac_data_rsp.done == 1); + if (cfg.enable_masking && entropy_mode == EntropyModeEdn) begin + `DV_CHECK_EQ(cfg.m_kmac_app_agent_cfg[AppKeymgr].vif.kmac_data_rsp.error, 1) + end +- wait (cfg.m_kmac_app_agent_cfg[AppKeymgr].vif.kmac_data_rsp.rsp_valid == 0); ++ wait (cfg.m_kmac_app_agent_cfg[AppKeymgr].vif.kmac_data_rsp.done == 0); + end + end join_none + endtask +--- a/env/seq_lib/kmac_entropy_mode_error_vseq.sv ++++ b/env/seq_lib/kmac_entropy_mode_error_vseq.sv +@@ -31,13 +31,13 @@ + virtual task check_keymgr_rsp_nonblocking(); + fork begin + while (cfg.en_scb == 0 && entropy_fetched == 0) begin +- wait (cfg.m_kmac_app_agent_cfg[AppKeymgr].vif.kmac_data_rsp.rsp_valid == 1); ++ wait (cfg.m_kmac_app_agent_cfg[AppKeymgr].vif.kmac_data_rsp.done == 1); + if (cfg.enable_masking && kmac_err_type == ErrIncorrectEntropyMode) begin + if (entropy_fetched == 0) begin + `DV_CHECK_EQ(cfg.m_kmac_app_agent_cfg[AppKeymgr].vif.kmac_data_rsp.error, 1) + end + end +- wait (cfg.m_kmac_app_agent_cfg[AppKeymgr].vif.kmac_data_rsp.rsp_valid == 0); ++ wait (cfg.m_kmac_app_agent_cfg[AppKeymgr].vif.kmac_data_rsp.done == 0); + end + end join_none + endtask diff --git a/hw/vendor/patches/lowrisc_ip/prim/0001_fix_paths.patch b/hw/vendor/patches/lowrisc_ip/prim_dv/0001_fix_paths.patch similarity index 67% rename from hw/vendor/patches/lowrisc_ip/prim/0001_fix_paths.patch rename to hw/vendor/patches/lowrisc_ip/prim_dv/0001_fix_paths.patch index f5e174f4e..5e78f7edd 100644 --- a/hw/vendor/patches/lowrisc_ip/prim/0001_fix_paths.patch +++ b/hw/vendor/patches/lowrisc_ip/prim_dv/0001_fix_paths.patch @@ -1,7 +1,7 @@ -diff --git a/dv/prim_alert/prim_alert_sim_cfg.hjson b/dv/prim_alert/prim_alert_sim_cfg.hjson +diff --git a/prim_alert/prim_alert_sim_cfg.hjson b/prim_alert/prim_alert_sim_cfg.hjson index 4febee8..e768cd3 100644 ---- a/dv/prim_alert/prim_alert_sim_cfg.hjson -+++ b/dv/prim_alert/prim_alert_sim_cfg.hjson +--- a/prim_alert/prim_alert_sim_cfg.hjson ++++ b/prim_alert/prim_alert_sim_cfg.hjson @@ -21,7 +21,7 @@ testplan: "{proj_root}/hw/ip/prim/dv/prim_alert/data/prim_alert_testplan.hjson" @@ -10,11 +10,11 @@ index 4febee8..e768cd3 100644 + import_cfgs: ["{proj_root}/hw/vendor/lowrisc_ip/dv/tools/dvsim/common_sim_cfg.hjson"] // Default iterations for all tests - each test entry can override this. - reseed: 20 -diff --git a/dv/prim_esc/prim_esc_sim_cfg.hjson b/dv/prim_esc/prim_esc_sim_cfg.hjson + reseed: 10 +diff --git a/prim_esc/prim_esc_sim_cfg.hjson b/prim_esc/prim_esc_sim_cfg.hjson index 23d297e..a102b9b 100644 ---- a/dv/prim_esc/prim_esc_sim_cfg.hjson -+++ b/dv/prim_esc/prim_esc_sim_cfg.hjson +--- a/prim_esc/prim_esc_sim_cfg.hjson ++++ b/prim_esc/prim_esc_sim_cfg.hjson @@ -21,7 +21,7 @@ testplan: "{proj_root}/hw/ip/prim/dv/prim_esc/data/prim_esc_testplan.hjson" @@ -24,10 +24,10 @@ index 23d297e..a102b9b 100644 // Default iterations for all tests - each test entry can override this. reseed: 20 -diff --git a/dv/prim_lfsr/prim_lfsr_sim_cfg.hjson b/dv/prim_lfsr/prim_lfsr_sim_cfg.hjson +diff --git a/prim_lfsr/prim_lfsr_sim_cfg.hjson b/prim_lfsr/prim_lfsr_sim_cfg.hjson index ea96e83..0a33d8f 100644 ---- a/dv/prim_lfsr/prim_lfsr_sim_cfg.hjson -+++ b/dv/prim_lfsr/prim_lfsr_sim_cfg.hjson +--- a/prim_lfsr/prim_lfsr_sim_cfg.hjson ++++ b/prim_lfsr/prim_lfsr_sim_cfg.hjson @@ -18,7 +18,7 @@ fusesoc_core: lowrisc:dv:prim_lfsr_sim:0.1 @@ -36,11 +36,11 @@ index ea96e83..0a33d8f 100644 + import_cfgs: ["{proj_root}/hw/vendor/lowrisc_ip/dv/tools/dvsim/common_sim_cfg.hjson"] // Default iterations for all tests - each test entry can override this. - reseed: 50 -diff --git a/dv/prim_present/prim_present_sim_cfg.hjson b/dv/prim_present/prim_present_sim_cfg.hjson + reseed: 1 +diff --git a/prim_present/prim_present_sim_cfg.hjson b/prim_present/prim_present_sim_cfg.hjson index 03c62c6..1fe2df0 100644 ---- a/dv/prim_present/prim_present_sim_cfg.hjson -+++ b/dv/prim_present/prim_present_sim_cfg.hjson +--- a/prim_present/prim_present_sim_cfg.hjson ++++ b/prim_present/prim_present_sim_cfg.hjson @@ -18,7 +18,7 @@ fusesoc_core: lowrisc:dv:prim_present_sim:0.1 @@ -49,4 +49,4 @@ index 03c62c6..1fe2df0 100644 + import_cfgs: ["{proj_root}/hw/vendor/lowrisc_ip/dv/tools/dvsim/common_sim_cfg.hjson"] // Default iterations for all tests - each test entry can override this. - reseed: 50 + reseed: 1 diff --git a/hw/vendor/patches/lowrisc_ip/prim/0002_default_tool.patch b/hw/vendor/patches/lowrisc_ip/prim_dv/0002_default_tool.patch similarity index 57% rename from hw/vendor/patches/lowrisc_ip/prim/0002_default_tool.patch rename to hw/vendor/patches/lowrisc_ip/prim_dv/0002_default_tool.patch index 9f62fcc33..82b9c54f6 100644 --- a/hw/vendor/patches/lowrisc_ip/prim/0002_default_tool.patch +++ b/hw/vendor/patches/lowrisc_ip/prim_dv/0002_default_tool.patch @@ -1,7 +1,7 @@ -diff --git a/dv/prim_alert/prim_alert_sim_cfg.hjson b/dv/prim_alert/prim_alert_sim_cfg.hjson +diff --git a/prim_alert/prim_alert_sim_cfg.hjson b/prim_alert/prim_alert_sim_cfg.hjson index 7f9e137..e768cd3 100644 ---- a/dv/prim_alert/prim_alert_sim_cfg.hjson -+++ b/dv/prim_alert/prim_alert_sim_cfg.hjson +--- a/prim_alert/prim_alert_sim_cfg.hjson ++++ b/prim_alert/prim_alert_sim_cfg.hjson @@ -12,7 +12,7 @@ tb: prim_alert_tb @@ -11,10 +11,10 @@ index 7f9e137..e768cd3 100644 // Fusesoc core file used for building the file list. fusesoc_core: lowrisc:dv:prim_alert_sim:0.1 -diff --git a/dv/prim_esc/prim_esc_sim_cfg.hjson b/dv/prim_esc/prim_esc_sim_cfg.hjson +diff --git a/prim_esc/prim_esc_sim_cfg.hjson b/prim_esc/prim_esc_sim_cfg.hjson index 24d9905..a102b9b 100644 ---- a/dv/prim_esc/prim_esc_sim_cfg.hjson -+++ b/dv/prim_esc/prim_esc_sim_cfg.hjson +--- a/prim_esc/prim_esc_sim_cfg.hjson ++++ b/prim_esc/prim_esc_sim_cfg.hjson @@ -12,7 +12,7 @@ tb: prim_esc_tb @@ -24,10 +24,10 @@ index 24d9905..a102b9b 100644 // Fusesoc core file used for building the file list. fusesoc_core: lowrisc:dv:prim_esc_sim:0.1 -diff --git a/dv/prim_lfsr/prim_lfsr_sim_cfg.hjson b/dv/prim_lfsr/prim_lfsr_sim_cfg.hjson +diff --git a/prim_lfsr/prim_lfsr_sim_cfg.hjson b/prim_lfsr/prim_lfsr_sim_cfg.hjson index 7adc99e..0a33d8f 100644 ---- a/dv/prim_lfsr/prim_lfsr_sim_cfg.hjson -+++ b/dv/prim_lfsr/prim_lfsr_sim_cfg.hjson +--- a/prim_lfsr/prim_lfsr_sim_cfg.hjson ++++ b/prim_lfsr/prim_lfsr_sim_cfg.hjson @@ -12,7 +12,7 @@ tb: prim_lfsr_tb @@ -37,10 +37,10 @@ index 7adc99e..0a33d8f 100644 // Fusesoc core file used for building the file list. fusesoc_core: lowrisc:dv:prim_lfsr_sim:0.1 -diff --git a/dv/prim_present/prim_present_sim_cfg.hjson b/dv/prim_present/prim_present_sim_cfg.hjson +diff --git a/prim_present/prim_present_sim_cfg.hjson b/prim_present/prim_present_sim_cfg.hjson index cf76a0a..1fe2df0 100644 ---- a/dv/prim_present/prim_present_sim_cfg.hjson -+++ b/dv/prim_present/prim_present_sim_cfg.hjson +--- a/prim_present/prim_present_sim_cfg.hjson ++++ b/prim_present/prim_present_sim_cfg.hjson @@ -12,7 +12,7 @@ tb: prim_present_tb diff --git a/hw/vendor/patches/lowrisc_ip/prim/0003_fix_cov.patch b/hw/vendor/patches/lowrisc_ip/prim_dv/0003_fix_cov.patch similarity index 72% rename from hw/vendor/patches/lowrisc_ip/prim/0003_fix_cov.patch rename to hw/vendor/patches/lowrisc_ip/prim_dv/0003_fix_cov.patch index ff3de44c7..93479fc0d 100644 --- a/hw/vendor/patches/lowrisc_ip/prim/0003_fix_cov.patch +++ b/hw/vendor/patches/lowrisc_ip/prim_dv/0003_fix_cov.patch @@ -1,7 +1,7 @@ -diff --git a/dv/prim_alert/prim_alert_sim_cfg.hjson b/dv/prim_alert/prim_alert_sim_cfg.hjson +diff --git a/prim_alert/prim_alert_sim_cfg.hjson b/prim_alert/prim_alert_sim_cfg.hjson index e768cd3..8c1cb12 100644 ---- a/dv/prim_alert/prim_alert_sim_cfg.hjson -+++ b/dv/prim_alert/prim_alert_sim_cfg.hjson +--- a/prim_alert/prim_alert_sim_cfg.hjson ++++ b/prim_alert/prim_alert_sim_cfg.hjson @@ -6,7 +6,7 @@ name: prim_alert @@ -20,10 +20,10 @@ index e768cd3..8c1cb12 100644 } ] } -diff --git a/dv/prim_esc/prim_esc_sim_cfg.hjson b/dv/prim_esc/prim_esc_sim_cfg.hjson +diff --git a/prim_esc/prim_esc_sim_cfg.hjson b/prim_esc/prim_esc_sim_cfg.hjson index a102b9b..42d0543 100644 ---- a/dv/prim_esc/prim_esc_sim_cfg.hjson -+++ b/dv/prim_esc/prim_esc_sim_cfg.hjson +--- a/prim_esc/prim_esc_sim_cfg.hjson ++++ b/prim_esc/prim_esc_sim_cfg.hjson @@ -6,7 +6,7 @@ name: prim_esc @@ -43,10 +43,10 @@ index a102b9b..42d0543 100644 + } ] } -diff --git a/dv/prim_lfsr/prim_lfsr_sim_cfg.hjson b/dv/prim_lfsr/prim_lfsr_sim_cfg.hjson +diff --git a/prim_lfsr/prim_lfsr_sim_cfg.hjson b/prim_lfsr/prim_lfsr_sim_cfg.hjson index 0a33d8f..5f9be63 100644 ---- a/dv/prim_lfsr/prim_lfsr_sim_cfg.hjson -+++ b/dv/prim_lfsr/prim_lfsr_sim_cfg.hjson +--- a/prim_lfsr/prim_lfsr_sim_cfg.hjson ++++ b/prim_lfsr/prim_lfsr_sim_cfg.hjson @@ -6,7 +6,7 @@ name: prim_lfsr @@ -68,11 +68,11 @@ index 0a33d8f..5f9be63 100644 + } + ] } -diff --git a/dv/prim_alert/data/prim_alert_cover.ccf b/dv/prim_alert/data/prim_alert_cover.ccf +diff --git a/prim_alert/data/prim_alert_cover.ccf b/prim_alert/data/prim_alert_cover.ccf new file mode 100644 index 0000000..343d8f2 --- /dev/null -+++ b/dv/prim_alert/data/prim_alert_cover.ccf ++++ b/prim_alert/data/prim_alert_cover.ccf @@ -0,0 +1,9 @@ +// Copyright lowRISC contributors (OpenTitan project). +// Licensed under the Apache License, Version 2.0, see LICENSE for details. @@ -83,11 +83,11 @@ index 0000000..343d8f2 + +select_coverage -all -module prim_alert_sender +select_coverage -all -module prim_alert_receiver -diff --git a/dv/prim_esc/data/prim_esc_cover.ccf b/dv/prim_esc/data/prim_esc_cover.ccf +diff --git a/prim_esc/data/prim_esc_cover.ccf b/prim_esc/data/prim_esc_cover.ccf new file mode 100644 index 0000000..8264faf --- /dev/null -+++ b/dv/prim_esc/data/prim_esc_cover.ccf ++++ b/prim_esc/data/prim_esc_cover.ccf @@ -0,0 +1,9 @@ +// Copyright lowRISC contributors (OpenTitan project). +// Licensed under the Apache License, Version 2.0, see LICENSE for details. @@ -98,11 +98,11 @@ index 0000000..8264faf + +select_coverage -all -module prim_esc_sender +select_coverage -all -module prim_esc_receiver -diff --git a/dv/prim_lfsr/data/prim_lfsr_cover.ccf b/dv/prim_lfsr/data/prim_lfsr_cover.ccf +diff --git a/prim_lfsr/data/prim_lfsr_cover.ccf b/prim_lfsr/data/prim_lfsr_cover.ccf new file mode 100644 index 0000000..d709b33 --- /dev/null -+++ b/dv/prim_lfsr/data/prim_lfsr_cover.ccf ++++ b/prim_lfsr/data/prim_lfsr_cover.ccf @@ -0,0 +1,8 @@ +// Copyright lowRISC contributors (OpenTitan project). +// Licensed under the Apache License, Version 2.0, see LICENSE for details. diff --git a/hw/vendor/patches/lowrisc_ip/pwrmgr/0001_Fix_testplan_paths.patch b/hw/vendor/patches/lowrisc_ip/pwrmgr/0001_Fix_testplan_paths.patch new file mode 100644 index 000000000..611db78b7 --- /dev/null +++ b/hw/vendor/patches/lowrisc_ip/pwrmgr/0001_Fix_testplan_paths.patch @@ -0,0 +1,23 @@ +diff --git a/data/pwrmgr_testplan.hjson b/data/pwrmgr_testplan.hjson +index 1bdb7ab..5366ffb 100644 +--- a/data/pwrmgr_testplan.hjson ++++ b/data/pwrmgr_testplan.hjson +@@ -3,12 +3,12 @@ + // SPDX-License-Identifier: Apache-2.0 + { + name: "pwrmgr" +- import_testplans: ["hw/dv/tools/dvsim/testplans/csr_testplan.hjson", +- "hw/dv/tools/dvsim/testplans/intr_test_testplan.hjson", +- "hw/dv/tools/dvsim/testplans/tl_device_access_types_testplan.hjson", +- "hw/dv/tools/dvsim/testplans/stress_all_with_reset_testplan.hjson", +- "hw/dv/tools/dvsim/testplans/sec_cm_count_testplan.hjson", +- "hw/dv/tools/dvsim/testplans/sec_cm_fsm_testplan.hjson", ++ import_testplans: ["hw/vendor/lowrisc_ip/dv/tools/dvsim/testplans/csr_testplan.hjson", ++ "hw/vendor/lowrisc_ip/dv/tools/dvsim/testplans/intr_test_testplan.hjson", ++ "hw/vendor/lowrisc_ip/dv/tools/dvsim/testplans/tl_device_access_types_testplan.hjson", ++ "hw/vendor/lowrisc_ip/dv/tools/dvsim/testplans/stress_all_with_reset_testplan.hjson", ++ "hw/vendor/lowrisc_ip/dv/tools/dvsim/testplans/sec_cm_count_testplan.hjson", ++ "hw/vendor/lowrisc_ip/dv/tools/dvsim/testplans/sec_cm_fsm_testplan.hjson", + "pwrmgr_sec_cm_testplan.hjson"] + testpoints: [ + { diff --git a/hw/vendor/patches/lowrisc_ip/pwrmgr/0002_Fix_DV_Paths.patch b/hw/vendor/patches/lowrisc_ip/pwrmgr/0002_Fix_DV_Paths.patch deleted file mode 100644 index b7438d264..000000000 --- a/hw/vendor/patches/lowrisc_ip/pwrmgr/0002_Fix_DV_Paths.patch +++ /dev/null @@ -1,56 +0,0 @@ -diff --git a/data/pwrmgr_testplan.hjson b/data/pwrmgr_testplan.hjson -index 1bdb7ab..5366ffb 100644 ---- a/data/pwrmgr_testplan.hjson -+++ b/data/pwrmgr_testplan.hjson -@@ -3,12 +3,12 @@ - // SPDX-License-Identifier: Apache-2.0 - { - name: "pwrmgr" -- import_testplans: ["hw/dv/tools/dvsim/testplans/csr_testplan.hjson", -- "hw/dv/tools/dvsim/testplans/intr_test_testplan.hjson", -- "hw/dv/tools/dvsim/testplans/tl_device_access_types_testplan.hjson", -- "hw/dv/tools/dvsim/testplans/stress_all_with_reset_testplan.hjson", -- "hw/dv/tools/dvsim/testplans/sec_cm_count_testplan.hjson", -- "hw/dv/tools/dvsim/testplans/sec_cm_fsm_testplan.hjson", -+ import_testplans: ["hw/vendor/lowrisc_ip/dv/tools/dvsim/testplans/csr_testplan.hjson", -+ "hw/vendor/lowrisc_ip/dv/tools/dvsim/testplans/intr_test_testplan.hjson", -+ "hw/vendor/lowrisc_ip/dv/tools/dvsim/testplans/tl_device_access_types_testplan.hjson", -+ "hw/vendor/lowrisc_ip/dv/tools/dvsim/testplans/stress_all_with_reset_testplan.hjson", -+ "hw/vendor/lowrisc_ip/dv/tools/dvsim/testplans/sec_cm_count_testplan.hjson", -+ "hw/vendor/lowrisc_ip/dv/tools/dvsim/testplans/sec_cm_fsm_testplan.hjson", - "pwrmgr_sec_cm_testplan.hjson"] - testpoints: [ - { -diff --git a/dv/pwrmgr_sim_cfg.hjson.tpl b/dv/pwrmgr_sim_cfg.hjson.tpl -index a5637dd..379897a 100644 ---- a/dv/pwrmgr_sim_cfg.hjson.tpl -+++ b/dv/pwrmgr_sim_cfg.hjson.tpl -@@ -12,7 +12,7 @@ - tb: tb - - // Simulator used to sign off this block -- tool: vcs -+ tool: xcelium - - // Fusesoc core file used for building the file list. - fusesoc_core: ${instance_vlnv("lowrisc:dv:pwrmgr_sim:0.1")} -@@ -22,13 +22,13 @@ - - // Import additional common sim cfg files. - import_cfgs: [// Project wide common sim cfg file -- "{proj_root}/hw/dv/tools/dvsim/common_sim_cfg.hjson", -+ "{proj_root}/hw/vendor/lowrisc_ip/dv/tools/dvsim/common_sim_cfg.hjson", - // Common CIP test lists -- "{proj_root}/hw/dv/tools/dvsim/tests/csr_tests.hjson", -- "{proj_root}/hw/dv/tools/dvsim/tests/intr_test.hjson", -- "{proj_root}/hw/dv/tools/dvsim/tests/stress_tests.hjson", -- "{proj_root}/hw/dv/tools/dvsim/tests/sec_cm_tests.hjson", -- "{proj_root}/hw/dv/tools/dvsim/tests/tl_access_tests.hjson"] -+ "{proj_root}/hw/vendor/lowrisc_ip/dv/tools/dvsim/tests/csr_tests.hjson", -+ "{proj_root}/hw/vendor/lowrisc_ip/dv/tools/dvsim/tests/intr_test.hjson", -+ "{proj_root}/hw/vendor/lowrisc_ip/dv/tools/dvsim/tests/stress_tests.hjson", -+ "{proj_root}/hw/vendor/lowrisc_ip/dv/tools/dvsim/tests/sec_cm_tests.hjson", -+ "{proj_root}/hw/vendor/lowrisc_ip/dv/tools/dvsim/tests/tl_access_tests.hjson"] - - // Exclusion files - vcs_cov_excl_files: ["{self_dir}/cov/pwrmgr_cov_manual_excl.el"] diff --git a/hw/vendor/patches/lowrisc_ip/pwrmgr/0004_Use_Reset_Index_Params.patch b/hw/vendor/patches/lowrisc_ip/pwrmgr/0004_Use_Reset_Index_Params.patch deleted file mode 100644 index 7e48c85a1..000000000 --- a/hw/vendor/patches/lowrisc_ip/pwrmgr/0004_Use_Reset_Index_Params.patch +++ /dev/null @@ -1,43 +0,0 @@ -diff --git a/dv/env/seq_lib/pwrmgr_glitch_vseq.sv b/dv/env/seq_lib/pwrmgr_glitch_vseq.sv -index b7369f1..1a21ff7 100644 ---- a/dv/env/seq_lib/pwrmgr_glitch_vseq.sv -+++ b/dv/env/seq_lib/pwrmgr_glitch_vseq.sv -@@ -30,7 +30,7 @@ class pwrmgr_glitch_vseq extends pwrmgr_base_vseq; - cfg.clk_rst_vif.wait_clks(cycles_before_reset); - - `DV_SPINWAIT(wait(cfg.pwrmgr_vif.fast_state == pwrmgr_pkg::FastPwrStateResetPrep && -- cfg.pwrmgr_vif.pwr_rst_req.rstreqs[2] == 1);, $sformatf( -+ cfg.pwrmgr_vif.pwr_rst_req.rstreqs[pwrmgr_reg_pkg::ResetMainPwrIdx] == 1);, $sformatf( - "checker timeout : fast_state %s, pwr_rst_req 0x%x", - cfg.pwrmgr_vif.fast_state.name, - cfg.pwrmgr_vif.pwr_rst_req.rstreqs -diff --git a/dv/env/seq_lib/pwrmgr_global_esc_vseq.sv b/dv/env/seq_lib/pwrmgr_global_esc_vseq.sv -index 1209fa5..7ec133e 100644 ---- a/dv/env/seq_lib/pwrmgr_global_esc_vseq.sv -+++ b/dv/env/seq_lib/pwrmgr_global_esc_vseq.sv -@@ -37,7 +37,7 @@ class pwrmgr_global_esc_vseq extends pwrmgr_base_vseq; - while (trans_cnt < num_trans) begin - @(cfg.clk_rst_vif.cb); - wait(cfg.pwrmgr_vif.fast_state != pwrmgr_pkg::FastPwrStateActive && -- cfg.pwrmgr_vif.pwr_rst_req.rstreqs[3] == 1'b1); -+ cfg.pwrmgr_vif.pwr_rst_req.rstreqs[pwrmgr_reg_pkg::ResetEscIdx] == 1'b1); - trans_cnt++; - - // Make sure previous dut_init is done -diff --git a/dv/sva/pwrmgr_bind.sv.tpl b/dv/sva/pwrmgr_bind.sv.tpl -index 59865e7..3117bf8 100644 ---- a/dv/sva/pwrmgr_bind.sv.tpl -+++ b/dv/sva/pwrmgr_bind.sv.tpl -@@ -63,10 +63,10 @@ module pwrmgr_bind; - % if 'io' in src_clks: - .io_clk_en(pwr_clk_o.io_ip_clk_en), - % endif - .pwr_rst_o, - .esc_timeout(esc_timeout_lc_q), -- .slow_esc_rst_req(slow_peri_reqs.rstreqs[3]), -- .slow_mp_rst_req(slow_peri_reqs.rstreqs[2]), -+ .slow_esc_rst_req(slow_peri_reqs.rstreqs[pwrmgr_reg_pkg::ResetEscIdx]), -+ .slow_mp_rst_req(slow_peri_reqs.rstreqs[pwrmgr_reg_pkg::ResetMainPwrIdx]), - .slow_fsm_invalid, - .fast_fsm_invalid(u_fsm.u_state_regs.unused_err_o), - .rom_intg_chk_dis(u_fsm.rom_intg_chk_dis), diff --git a/hw/vendor/patches/lowrisc_ip/pwrmgr/0001_Mocha_Clock_Ratio.patch b/hw/vendor/patches/lowrisc_ip/pwrmgr_dv/0001_Mocha_Clock_Ratio.patch similarity index 74% rename from hw/vendor/patches/lowrisc_ip/pwrmgr/0001_Mocha_Clock_Ratio.patch rename to hw/vendor/patches/lowrisc_ip/pwrmgr_dv/0001_Mocha_Clock_Ratio.patch index e8d2e87d4..298c10f9a 100644 --- a/hw/vendor/patches/lowrisc_ip/pwrmgr/0001_Mocha_Clock_Ratio.patch +++ b/hw/vendor/patches/lowrisc_ip/pwrmgr_dv/0001_Mocha_Clock_Ratio.patch @@ -1,7 +1,7 @@ -diff --git a/dv/sva/pwrmgr_rstreqs_sva_if.sv.tpl b/dv/sva/pwrmgr_rstreqs_sva_if.sv.tpl +diff --git a/sva/pwrmgr_rstreqs_sva_if.sv.tpl b/sva/pwrmgr_rstreqs_sva_if.sv.tpl index bf64e38..d88abeb 100644 ---- a/dv/sva/pwrmgr_rstreqs_sva_if.sv.tpl -+++ b/dv/sva/pwrmgr_rstreqs_sva_if.sv.tpl +--- a/sva/pwrmgr_rstreqs_sva_if.sv.tpl ++++ b/sva/pwrmgr_rstreqs_sva_if.sv.tpl @@ -38,6 +38,9 @@ interface pwrmgr_rstreqs_sva_if % elif topname == "darjeeling": // Darjeeling has a 16x clock ratio between the slow and fast clocks. (1GHz / 62.5MHz = 16) diff --git a/hw/vendor/patches/lowrisc_ip/pwrmgr_dv/0002_Fix_DV_Paths.patch b/hw/vendor/patches/lowrisc_ip/pwrmgr_dv/0002_Fix_DV_Paths.patch new file mode 100644 index 000000000..6aa4b0189 --- /dev/null +++ b/hw/vendor/patches/lowrisc_ip/pwrmgr_dv/0002_Fix_DV_Paths.patch @@ -0,0 +1,33 @@ +diff --git a/pwrmgr_sim_cfg.hjson.tpl b/pwrmgr_sim_cfg.hjson.tpl +index a5637dd..379897a 100644 +--- a/pwrmgr_sim_cfg.hjson.tpl ++++ b/pwrmgr_sim_cfg.hjson.tpl +@@ -12,7 +12,7 @@ + tb: tb + + // Simulator used to sign off this block +- tool: vcs ++ tool: xcelium + + // Fusesoc core file used for building the file list. + fusesoc_core: ${instance_vlnv("lowrisc:dv:pwrmgr_sim:0.1")} +@@ -22,13 +22,13 @@ + + // Import additional common sim cfg files. + import_cfgs: [// Project wide common sim cfg file +- "{proj_root}/hw/dv/tools/dvsim/common_sim_cfg.hjson", ++ "{proj_root}/hw/vendor/lowrisc_ip/dv/tools/dvsim/common_sim_cfg.hjson", + // Common CIP test lists +- "{proj_root}/hw/dv/tools/dvsim/tests/csr_tests.hjson", +- "{proj_root}/hw/dv/tools/dvsim/tests/intr_test.hjson", +- "{proj_root}/hw/dv/tools/dvsim/tests/stress_tests.hjson", +- "{proj_root}/hw/dv/tools/dvsim/tests/sec_cm_tests.hjson", +- "{proj_root}/hw/dv/tools/dvsim/tests/tl_access_tests.hjson"] ++ "{proj_root}/hw/vendor/lowrisc_ip/dv/tools/dvsim/tests/csr_tests.hjson", ++ "{proj_root}/hw/vendor/lowrisc_ip/dv/tools/dvsim/tests/intr_test.hjson", ++ "{proj_root}/hw/vendor/lowrisc_ip/dv/tools/dvsim/tests/stress_tests.hjson", ++ "{proj_root}/hw/vendor/lowrisc_ip/dv/tools/dvsim/tests/sec_cm_tests.hjson", ++ "{proj_root}/hw/vendor/lowrisc_ip/dv/tools/dvsim/tests/tl_access_tests.hjson"] + + // Exclusion files + vcs_cov_excl_files: ["{self_dir}/cov/pwrmgr_cov_manual_excl.el"] diff --git a/hw/vendor/patches/lowrisc_ip/pwrmgr/0003_Fix_Mocha_Reset_Reg_Names.patch b/hw/vendor/patches/lowrisc_ip/pwrmgr_dv/0003_Fix_Mocha_Reset_Reg_Names.patch similarity index 84% rename from hw/vendor/patches/lowrisc_ip/pwrmgr/0003_Fix_Mocha_Reset_Reg_Names.patch rename to hw/vendor/patches/lowrisc_ip/pwrmgr_dv/0003_Fix_Mocha_Reset_Reg_Names.patch index c90b24111..b60bd8690 100644 --- a/hw/vendor/patches/lowrisc_ip/pwrmgr/0003_Fix_Mocha_Reset_Reg_Names.patch +++ b/hw/vendor/patches/lowrisc_ip/pwrmgr_dv/0003_Fix_Mocha_Reset_Reg_Names.patch @@ -1,7 +1,7 @@ -diff --git a/dv/env/pwrmgr_if.sv b/dv/env/pwrmgr_if.sv +diff --git a/env/pwrmgr_if.sv b/env/pwrmgr_if.sv index 00ec532..5f6ace2 100644 ---- a/dv/env/pwrmgr_if.sv -+++ b/dv/env/pwrmgr_if.sv +--- a/env/pwrmgr_if.sv ++++ b/env/pwrmgr_if.sv @@ -87,12 +87,8 @@ interface pwrmgr_if ( always_comb lowpwr_cfg_wen = `PATH_TO_DUT.lowpwr_cfg_wen; diff --git a/hw/vendor/patches/lowrisc_ip/rom_ctrl/0001_Path_And_Tool_Fixes.patch b/hw/vendor/patches/lowrisc_ip/rom_ctrl/0001_Path_And_Tool_Fixes.patch index 256ebe834..8397a71be 100644 --- a/hw/vendor/patches/lowrisc_ip/rom_ctrl/0001_Path_And_Tool_Fixes.patch +++ b/hw/vendor/patches/lowrisc_ip/rom_ctrl/0001_Path_And_Tool_Fixes.patch @@ -25,96 +25,6 @@ index 71e2a2d..db8d78a 100644 "rom_ctrl_sec_cm_testplan.hjson"] testpoints: [ { -diff --git a/dv/env/rom_ctrl_bkdr_util.core b/dv/env/rom_ctrl_bkdr_util.core -index 42e75ec..70a2dd6 100644 ---- a/dv/env/rom_ctrl_bkdr_util.core -+++ b/dv/env/rom_ctrl_bkdr_util.core -@@ -13,6 +13,8 @@ filesets: - - lowrisc:dv:crypto_dpi_prince:0.1 - - lowrisc:dv:crypto_dpi_present:0.1 - - lowrisc:prim:secded:0.1 -+ - lowrisc:dv:digestpp_dpi:0.1 -+ - lowrisc:ip:kmac_pkg - - lowrisc:dv:sram_ctrl_bkdr_util - files: - - rom_ctrl_bkdr_util_pkg.sv -diff --git a/dv/rom_ctrl_32kB_sim_cfg.hjson b/dv/rom_ctrl_32kB_sim_cfg.hjson -index 941e953..a0b4a0a 100644 ---- a/dv/rom_ctrl_32kB_sim_cfg.hjson -+++ b/dv/rom_ctrl_32kB_sim_cfg.hjson -@@ -7,7 +7,7 @@ - variant: 32kB - - // Import the base rom_ctrl sim_cfg file -- import_cfgs: ["{proj_root}/hw/ip/rom_ctrl/dv/rom_ctrl_base_sim_cfg.hjson"] -+ import_cfgs: ["{proj_root}/hw/vendor/lowrisc_ip/ip/rom_ctrl/dv/rom_ctrl_base_sim_cfg.hjson"] - - build_opts: ["+define+ROM_BYTE_ADDR_WIDTH=15"] - } -diff --git a/dv/rom_ctrl_base_sim_cfg.hjson b/dv/rom_ctrl_base_sim_cfg.hjson -index 9062c0f..228a0ec 100644 ---- a/dv/rom_ctrl_base_sim_cfg.hjson -+++ b/dv/rom_ctrl_base_sim_cfg.hjson -@@ -12,30 +12,30 @@ - tb: tb - - // Simulator used to sign off this block -- tool: vcs -+ tool: xcelium - - // Fusesoc core file used for building the file list. - fusesoc_core: lowrisc:dv:rom_ctrl_sim:0.1 - - // Testplan hjson file. -- testplan: "{proj_root}/hw/ip/rom_ctrl/data/rom_ctrl_testplan.hjson" -+ testplan: "{proj_root}/hw/vendor/lowrisc_ip/ip/rom_ctrl/data/rom_ctrl_testplan.hjson" - - // RAL spec - used to generate the RAL model. -- ral_spec: "{proj_root}/hw/ip/rom_ctrl/data/rom_ctrl.hjson" -+ ral_spec: "{proj_root}/hw/vendor/lowrisc_ip/ip/rom_ctrl/data/rom_ctrl.hjson" - - // Import additional common sim cfg files. - import_cfgs: [// Project wide common sim cfg file -- "{proj_root}/hw/dv/tools/dvsim/common_sim_cfg.hjson", -+ "{proj_root}/hw/vendor/lowrisc_ip/dv/tools/dvsim/common_sim_cfg.hjson", - // Config files to get the correct flags for crypto_dpi_prince -- "{proj_root}/hw/ip/prim/dv/prim_prince/crypto_dpi_prince/crypto_dpi_prince_sim_opts.hjson", -+ "{proj_root}/hw/vendor/lowrisc_ip/ip/prim/dv/prim_prince/crypto_dpi_prince/crypto_dpi_prince_sim_opts.hjson", - // Common CIP test lists -- "{proj_root}/hw/dv/tools/dvsim/tests/csr_tests.hjson", -- "{proj_root}/hw/dv/tools/dvsim/tests/mem_tests.hjson", -- "{proj_root}/hw/dv/tools/dvsim/tests/alert_test.hjson", -- "{proj_root}/hw/dv/tools/dvsim/tests/tl_access_tests.hjson", -- "{proj_root}/hw/dv/tools/dvsim/tests/passthru_mem_intg_tests.hjson", -- "{proj_root}/hw/dv/tools/dvsim/tests/sec_cm_tests.hjson", -- "{proj_root}/hw/dv/tools/dvsim/tests/stress_tests.hjson"] -+ "{proj_root}/hw/vendor/lowrisc_ip/dv/tools/dvsim/tests/csr_tests.hjson", -+ "{proj_root}/hw/vendor/lowrisc_ip/dv/tools/dvsim/tests/mem_tests.hjson", -+ "{proj_root}/hw/vendor/lowrisc_ip/dv/tools/dvsim/tests/alert_test.hjson", -+ "{proj_root}/hw/vendor/lowrisc_ip/dv/tools/dvsim/tests/tl_access_tests.hjson", -+ "{proj_root}/hw/vendor/lowrisc_ip/dv/tools/dvsim/tests/passthru_mem_intg_tests.hjson", -+ "{proj_root}/hw/vendor/lowrisc_ip/dv/tools/dvsim/tests/sec_cm_tests.hjson", -+ "{proj_root}/hw/vendor/lowrisc_ip/dv/tools/dvsim/tests/stress_tests.hjson"] - - en_build_modes: ["{tool}_crypto_dpi_prince_build_opts"] - -@@ -58,13 +58,13 @@ - } - { - name: cover_reg_top_vcs_cov_cfg_file -- value: "-cm_hier {proj_root}/hw/dv/tools/vcs/cover_reg_top.cfg+{proj_root}/hw/ip/rom_ctrl/dv/cov/cover_reg_top.cfg" -+ value: "-cm_hier {proj_root}/hw/vendor/lowrisc_ip/dv/tools/vcs/cover_reg_top.cfg+{proj_root}/hw/vendor/lowrisc_ip/ip/rom_ctrl/dv/cov/cover_reg_top.cfg" - } - ] - - // Add ROM_CTRL specific exclusion files. -- vcs_cov_excl_files: ["{proj_root}/hw/ip/rom_ctrl/dv/cov/rom_ctrl_cov_unr_excl.el", -- "{proj_root}/hw/ip/rom_ctrl/dv/cov/rom_ctrl_cov_excl.el"] -+ vcs_cov_excl_files: ["{proj_root}/hw/vendor/lowrisc_ip/ip/rom_ctrl/dv/cov/rom_ctrl_cov_unr_excl.el", -+ "{proj_root}/hw/vendor/lowrisc_ip/ip/rom_ctrl/dv/cov/rom_ctrl_cov_excl.el"] - - // Default UVM test and seq class name. - uvm_test: rom_ctrl_base_test diff --git a/util/scramble_image.py b/util/scramble_image.py index 91701d47..26f2f691 100755 --- a/util/scramble_image.py diff --git a/hw/vendor/patches/lowrisc_ip/rom_ctrl_dv/0001_Path_And_Tool_Fixes.patch b/hw/vendor/patches/lowrisc_ip/rom_ctrl_dv/0001_Path_And_Tool_Fixes.patch new file mode 100644 index 000000000..43a3d23b5 --- /dev/null +++ b/hw/vendor/patches/lowrisc_ip/rom_ctrl_dv/0001_Path_And_Tool_Fixes.patch @@ -0,0 +1,90 @@ +diff --git a/env/rom_ctrl_bkdr_util.core b/env/rom_ctrl_bkdr_util.core +index 42e75ec..70a2dd6 100644 +--- a/env/rom_ctrl_bkdr_util.core ++++ b/env/rom_ctrl_bkdr_util.core +@@ -13,6 +13,8 @@ filesets: + - lowrisc:dv:crypto_dpi_prince:0.1 + - lowrisc:dv:crypto_dpi_present:0.1 + - lowrisc:prim:secded:0.1 ++ - lowrisc:dv:digestpp_dpi:0.1 ++ - lowrisc:ip:kmac_pkg + - lowrisc:dv:sram_ctrl_bkdr_util + files: + - rom_ctrl_bkdr_util_pkg.sv +diff --git a/rom_ctrl_32kB_sim_cfg.hjson b/rom_ctrl_32kB_sim_cfg.hjson +index 941e953..a0b4a0a 100644 +--- a/rom_ctrl_32kB_sim_cfg.hjson ++++ b/rom_ctrl_32kB_sim_cfg.hjson +@@ -7,7 +7,7 @@ + variant: 32kB + + // Import the base rom_ctrl sim_cfg file +- import_cfgs: ["{proj_root}/hw/ip/rom_ctrl/dv/rom_ctrl_base_sim_cfg.hjson"] ++ import_cfgs: ["{proj_root}/hw/vendor/lowrisc_ip/ip/rom_ctrl/dv/rom_ctrl_base_sim_cfg.hjson"] + + build_opts: ["+define+ROM_SIZE_BYTES=2**15"] + } +diff --git a/rom_ctrl_base_sim_cfg.hjson b/rom_ctrl_base_sim_cfg.hjson +index 9062c0f..228a0ec 100644 +--- a/rom_ctrl_base_sim_cfg.hjson ++++ b/rom_ctrl_base_sim_cfg.hjson +@@ -12,30 +12,30 @@ + tb: tb + + // Simulator used to sign off this block +- tool: vcs ++ tool: xcelium + + // Fusesoc core file used for building the file list. + fusesoc_core: lowrisc:dv:rom_ctrl_sim:0.1 + + // Testplan hjson file. +- testplan: "{proj_root}/hw/ip/rom_ctrl/data/rom_ctrl_testplan.hjson" ++ testplan: "{proj_root}/hw/vendor/lowrisc_ip/ip/rom_ctrl/data/rom_ctrl_testplan.hjson" + + // RAL spec - used to generate the RAL model. +- ral_spec: "{proj_root}/hw/ip/rom_ctrl/data/rom_ctrl.hjson" ++ ral_spec: "{proj_root}/hw/vendor/lowrisc_ip/ip/rom_ctrl/data/rom_ctrl.hjson" + + // Import additional common sim cfg files. + import_cfgs: [// Project wide common sim cfg file +- "{proj_root}/hw/dv/tools/dvsim/common_sim_cfg.hjson", ++ "{proj_root}/hw/vendor/lowrisc_ip/dv/tools/dvsim/common_sim_cfg.hjson", + // Config files to get the correct flags for crypto_dpi_prince +- "{proj_root}/hw/ip/prim/dv/prim_prince/crypto_dpi_prince/crypto_dpi_prince_sim_opts.hjson", ++ "{proj_root}/hw/vendor/lowrisc_ip/ip/prim/dv/prim_prince/crypto_dpi_prince/crypto_dpi_prince_sim_opts.hjson", + // Common CIP test lists +- "{proj_root}/hw/dv/tools/dvsim/tests/csr_tests.hjson", +- "{proj_root}/hw/dv/tools/dvsim/tests/mem_tests.hjson", +- "{proj_root}/hw/dv/tools/dvsim/tests/alert_test.hjson", +- "{proj_root}/hw/dv/tools/dvsim/tests/tl_access_tests.hjson", +- "{proj_root}/hw/dv/tools/dvsim/tests/passthru_mem_intg_tests.hjson", +- "{proj_root}/hw/dv/tools/dvsim/tests/sec_cm_tests.hjson", +- "{proj_root}/hw/dv/tools/dvsim/tests/stress_tests.hjson"] ++ "{proj_root}/hw/vendor/lowrisc_ip/dv/tools/dvsim/tests/csr_tests.hjson", ++ "{proj_root}/hw/vendor/lowrisc_ip/dv/tools/dvsim/tests/mem_tests.hjson", ++ "{proj_root}/hw/vendor/lowrisc_ip/dv/tools/dvsim/tests/alert_test.hjson", ++ "{proj_root}/hw/vendor/lowrisc_ip/dv/tools/dvsim/tests/tl_access_tests.hjson", ++ "{proj_root}/hw/vendor/lowrisc_ip/dv/tools/dvsim/tests/passthru_mem_intg_tests.hjson", ++ "{proj_root}/hw/vendor/lowrisc_ip/dv/tools/dvsim/tests/sec_cm_tests.hjson", ++ "{proj_root}/hw/vendor/lowrisc_ip/dv/tools/dvsim/tests/stress_tests.hjson"] + + en_build_modes: ["{tool}_crypto_dpi_prince_build_opts"] + +@@ -58,13 +58,13 @@ + } + { + name: cover_reg_top_vcs_cov_cfg_file +- value: "-cm_hier {proj_root}/hw/dv/tools/vcs/cover_reg_top.cfg+{proj_root}/hw/ip/rom_ctrl/dv/cov/cover_reg_top.cfg" ++ value: "-cm_hier {proj_root}/hw/vendor/lowrisc_ip/dv/tools/vcs/cover_reg_top.cfg+{proj_root}/hw/vendor/lowrisc_ip/ip/rom_ctrl/dv/cov/cover_reg_top.cfg" + } + ] + + // Add ROM_CTRL specific exclusion files. +- vcs_cov_excl_files: ["{proj_root}/hw/ip/rom_ctrl/dv/cov/rom_ctrl_cov_unr_excl.el", +- "{proj_root}/hw/ip/rom_ctrl/dv/cov/rom_ctrl_cov_excl.el"] ++ vcs_cov_excl_files: ["{proj_root}/hw/vendor/lowrisc_ip/ip/rom_ctrl/dv/cov/rom_ctrl_cov_unr_excl.el", ++ "{proj_root}/hw/vendor/lowrisc_ip/ip/rom_ctrl/dv/cov/rom_ctrl_cov_excl.el"] + + // Default UVM test and seq class name. + uvm_test: rom_ctrl_base_test diff --git a/hw/vendor/patches/lowrisc_ip/rom_ctrl/0002_DV_Simplify_Dependency_Fixes.patch b/hw/vendor/patches/lowrisc_ip/rom_ctrl_dv/0002_DV_Simplify_Dependency_Fixes.patch similarity index 72% rename from hw/vendor/patches/lowrisc_ip/rom_ctrl/0002_DV_Simplify_Dependency_Fixes.patch rename to hw/vendor/patches/lowrisc_ip/rom_ctrl_dv/0002_DV_Simplify_Dependency_Fixes.patch index b4484980d..ebbf6ce29 100644 --- a/hw/vendor/patches/lowrisc_ip/rom_ctrl/0002_DV_Simplify_Dependency_Fixes.patch +++ b/hw/vendor/patches/lowrisc_ip/rom_ctrl_dv/0002_DV_Simplify_Dependency_Fixes.patch @@ -1,7 +1,7 @@ -diff --git a/dv/env/rom_ctrl_bkdr_util.core b/dv/env/rom_ctrl_bkdr_util.core +diff --git a/env/rom_ctrl_bkdr_util.core b/env/rom_ctrl_bkdr_util.core index 70a2dd6..6cfdfbc 100644 ---- a/dv/env/rom_ctrl_bkdr_util.core -+++ b/dv/env/rom_ctrl_bkdr_util.core +--- a/env/rom_ctrl_bkdr_util.core ++++ b/env/rom_ctrl_bkdr_util.core @@ -15,8 +15,9 @@ filesets: - lowrisc:prim:secded:0.1 - lowrisc:dv:digestpp_dpi:0.1 diff --git a/hw/vendor/patches/lowrisc_ip/rom_ctrl/0003_Sram_Scrambler_Added.patch b/hw/vendor/patches/lowrisc_ip/rom_ctrl_dv/0003_Sram_Scrambler_Added.patch similarity index 99% rename from hw/vendor/patches/lowrisc_ip/rom_ctrl/0003_Sram_Scrambler_Added.patch rename to hw/vendor/patches/lowrisc_ip/rom_ctrl_dv/0003_Sram_Scrambler_Added.patch index 509dea39f..db5b949ac 100644 --- a/hw/vendor/patches/lowrisc_ip/rom_ctrl/0003_Sram_Scrambler_Added.patch +++ b/hw/vendor/patches/lowrisc_ip/rom_ctrl_dv/0003_Sram_Scrambler_Added.patch @@ -1,8 +1,8 @@ -diff --git a/dv/env/sram_scrambler_pkg.sv b/dv/env/sram_scrambler_pkg.sv +diff --git a/env/sram_scrambler_pkg.sv b/env/sram_scrambler_pkg.sv new file mode 100644 index 0000000..a76718d --- /dev/null -+++ b/dv/env/sram_scrambler_pkg.sv ++++ b/env/sram_scrambler_pkg.sv @@ -0,0 +1,368 @@ +// Copyright lowRISC contributors (OpenTitan project). +// Licensed under the Apache License, Version 2.0, see LICENSE for details. diff --git a/hw/vendor/patches/lowrisc_ip/rom_ctrl_dv/0004_Sram_Scrambler_Add_Depth_Param.patch b/hw/vendor/patches/lowrisc_ip/rom_ctrl_dv/0004_Sram_Scrambler_Add_Depth_Param.patch new file mode 100644 index 000000000..c8449e76a --- /dev/null +++ b/hw/vendor/patches/lowrisc_ip/rom_ctrl_dv/0004_Sram_Scrambler_Add_Depth_Param.patch @@ -0,0 +1,23 @@ +diff --git a/env/sram_scrambler_pkg.sv b/env/sram_scrambler_pkg.sv +--- a/env/sram_scrambler_pkg.sv ++++ b/env/sram_scrambler_pkg.sv +@@ -192,7 +192,8 @@ + + // Encrypts the target SRAM address using the custom S&P network. + function automatic state_t encrypt_sram_addr(logic addr[], int addr_width, +- logic full_nonce[]); ++ int depth, ++ logic full_nonce[]); + + logic nonce[] = new[addr_width]; + logic encrypted_addr[] = new[addr_width]; +@@ -215,7 +216,8 @@ + + // Decrypts the target SRAM address using the custom S&P network. + function automatic state_t decrypt_sram_addr(logic addr[], int addr_width, +- logic full_nonce[]); ++ int depth, ++ logic full_nonce[]); + + logic nonce[] = new[addr_width]; + logic encrypted_addr[] = new[addr_width]; diff --git a/hw/vendor/patches/lowrisc_ip/rom_ctrl_dv/0005_Fix_ROM_cfg_constant.patch b/hw/vendor/patches/lowrisc_ip/rom_ctrl_dv/0005_Fix_ROM_cfg_constant.patch new file mode 100644 index 000000000..d375234cd --- /dev/null +++ b/hw/vendor/patches/lowrisc_ip/rom_ctrl_dv/0005_Fix_ROM_cfg_constant.patch @@ -0,0 +1,13 @@ +diff --git a/tb/tb.sv b/tb/tb.sv +--- a/tb/tb.sv ++++ b/tb/tb.sv +@@ -45,8 +45,7 @@ + .clk_i (clk), + .rst_ni (rst_n), + +- .rom_cfg_i (prim_rom_pkg::ROM_CFG_REQ_DEFAULT), +- .rom_cfg_o (), ++ .rom_cfg_i (prim_rom_pkg::ROM_CFG_DEFAULT), + + .rom_tl_i (tl_rom_if.h2d), + .rom_tl_o (tl_rom_if.d2h), diff --git a/hw/vendor/patches/lowrisc_ip/rom_ctrl_dv/0006_Fix_App_Req_Rsp_Field_Names.patch b/hw/vendor/patches/lowrisc_ip/rom_ctrl_dv/0006_Fix_App_Req_Rsp_Field_Names.patch new file mode 100644 index 000000000..d5cd13c6b --- /dev/null +++ b/hw/vendor/patches/lowrisc_ip/rom_ctrl_dv/0006_Fix_App_Req_Rsp_Field_Names.patch @@ -0,0 +1,61 @@ +--- a/tb/tb.sv ++++ b/tb/tb.sv +@@ -114,17 +114,17 @@ + run_test(); + end + // Only get one KMAC response +- `ASSERT(JustOneKmacResponse_A, kmac_data_in.rsp_valid |=> always !kmac_data_in.rsp_valid, ++ `ASSERT(JustOneKmacResponse_A, kmac_data_in.done |=> always !kmac_data_in.done, + clk, rst_n) + // Once we signal done to pwrmgr, the done signal stays high and the good signal stays stable. + `ASSERT(PwrmgrDoneOneWay_A, $rose(pwrmgr_data.done == prim_mubi_pkg::MuBi4True) |=> + always $stable(pwrmgr_data), clk, rst_n) + // Don't send any KMAC requests once we've had the response +- `ASSERT(KmacNotOutAfterIn_A, kmac_data_in.rsp_valid |=> always !kmac_data_out.req_valid, ++ `ASSERT(KmacNotOutAfterIn_A, kmac_data_in.done |=> always !kmac_data_out.valid, + clk, rst_n) + always_comb begin + if (!rst_n) kmac_digest_handshake_occured = 0; +- else if (kmac_data_in.rsp_valid) kmac_digest_handshake_occured = 1; ++ else if (kmac_data_in.done) kmac_digest_handshake_occured = 1; + end + // We see a response from KMAC before we assert that we're done to pwrmgr + `ASSERT(KmacResponseBeforePwmgrDone_A, +--- a/cov/rom_ctrl_cov_if.sv ++++ b/cov/rom_ctrl_cov_if.sv +@@ -31,7 +31,7 @@ + option.per_instance = 1; + + // Cover some basic stalling behavior on the kmac ready input +- cp_kmac_ready: coverpoint kmac_data_i.req_ready iff (kmac_data_o.req_valid) { ++ cp_kmac_ready: coverpoint kmac_data_i.ready iff (kmac_data_o.valid) { + bins zero_delay_5 = (1'b1[*5]); + bins stall_1 = (1'b1 => 1'b0 => 1'b1); + bins stall_long = (1'b0[*5:10] => 1'b1); +@@ -39,7 +39,7 @@ + } + + // Cover the different delays on the kmac response valid signal +- cp_kmac_digest_handshake: coverpoint {kmac_data_i.rsp_valid, exp_digest_de} { ++ cp_kmac_digest_handshake: coverpoint {kmac_data_i.done, exp_digest_de} { + bins kmac_first = {2'b11}; // kmac responds while still reading digest + bins rom_first = (2'b00 => 2'b10); // kmac responds after digest read + bins same_cycle = (2'b01 => 2'b10); // kmac responds as digest read completes +--- a/tb/rom_ctrl_if.sv ++++ b/tb/rom_ctrl_if.sv +@@ -36,12 +36,12 @@ + release dut.u_mux.sel_bus_qq; + endtask + +- // Override the kmac_data_i.rsp_valid signal to be true for a cycle, returning on the next ++ // Override the kmac_data_i.done signal to be true for a cycle, returning on the next + // negedge. This will be one cycle if we start before the posedge. + task static force_kmac_data_done(); +- force dut.kmac_data_i.rsp_valid = 1; ++ force dut.kmac_data_i.done = 1; + @(negedge dut.clk_i); +- release dut.kmac_data_i.rsp_valid; ++ release dut.kmac_data_i.done; + endtask + + endinterface diff --git a/hw/vendor/patches/lowrisc_ip/rstmgr/0001_Fix_Testplan_Paths.patch b/hw/vendor/patches/lowrisc_ip/rstmgr/0001_Fix_Testplan_Paths.patch new file mode 100644 index 000000000..b686d1ae0 --- /dev/null +++ b/hw/vendor/patches/lowrisc_ip/rstmgr/0001_Fix_Testplan_Paths.patch @@ -0,0 +1,23 @@ +diff --git a/data/rstmgr_testplan.hjson b/data/rstmgr_testplan.hjson +index be44e83..0fdfd52 100644 +--- a/data/rstmgr_testplan.hjson ++++ b/data/rstmgr_testplan.hjson +@@ -3,12 +3,12 @@ + // SPDX-License-Identifier: Apache-2.0 + { + name: "rstmgr" +- import_testplans: ["hw/dv/tools/dvsim/testplans/alert_test_testplan.hjson", +- "hw/dv/tools/dvsim/testplans/csr_testplan.hjson", +- "hw/dv/tools/dvsim/testplans/tl_device_access_types_testplan.hjson", +- "hw/dv/tools/dvsim/testplans/stress_all_with_reset_testplan.hjson", +- "hw/dv/tools/dvsim/testplans/sec_cm_count_testplan.hjson", +- "hw/dv/tools/dvsim/testplans/sec_cm_fsm_testplan.hjson", ++ import_testplans: ["hw/vendor/lowrisc_ip/dv/tools/dvsim/testplans/alert_test_testplan.hjson", ++ "hw/vendor/lowrisc_ip/dv/tools/dvsim/testplans/csr_testplan.hjson", ++ "hw/vendor/lowrisc_ip/dv/tools/dvsim/testplans/tl_device_access_types_testplan.hjson", ++ "hw/vendor/lowrisc_ip/dv/tools/dvsim/testplans/stress_all_with_reset_testplan.hjson", ++ "hw/vendor/lowrisc_ip/dv/tools/dvsim/testplans/sec_cm_count_testplan.hjson", ++ "hw/vendor/lowrisc_ip/dv/tools/dvsim/testplans/sec_cm_fsm_testplan.hjson", + "rstmgr_sec_cm_testplan.hjson"] + + testpoints: [ diff --git a/hw/vendor/patches/lowrisc_ip/rstmgr/0001_Fix_Paths_And_Tools.patch b/hw/vendor/patches/lowrisc_ip/rstmgr_dv/0001_Fix_Paths_And_Tools.patch similarity index 52% rename from hw/vendor/patches/lowrisc_ip/rstmgr/0001_Fix_Paths_And_Tools.patch rename to hw/vendor/patches/lowrisc_ip/rstmgr_dv/0001_Fix_Paths_And_Tools.patch index 6e545a611..b10116f65 100644 --- a/hw/vendor/patches/lowrisc_ip/rstmgr/0001_Fix_Paths_And_Tools.patch +++ b/hw/vendor/patches/lowrisc_ip/rstmgr_dv/0001_Fix_Paths_And_Tools.patch @@ -1,31 +1,7 @@ -diff --git a/data/rstmgr_testplan.hjson b/data/rstmgr_testplan.hjson -index be44e83..0fdfd52 100644 ---- a/data/rstmgr_testplan.hjson -+++ b/data/rstmgr_testplan.hjson -@@ -3,12 +3,12 @@ - // SPDX-License-Identifier: Apache-2.0 - { - name: "rstmgr" -- import_testplans: ["hw/dv/tools/dvsim/testplans/alert_test_testplan.hjson", -- "hw/dv/tools/dvsim/testplans/csr_testplan.hjson", -- "hw/dv/tools/dvsim/testplans/tl_device_access_types_testplan.hjson", -- "hw/dv/tools/dvsim/testplans/stress_all_with_reset_testplan.hjson", -- "hw/dv/tools/dvsim/testplans/sec_cm_count_testplan.hjson", -- "hw/dv/tools/dvsim/testplans/sec_cm_fsm_testplan.hjson", -+ import_testplans: ["hw/vendor/lowrisc_ip/dv/tools/dvsim/testplans/alert_test_testplan.hjson", -+ "hw/vendor/lowrisc_ip/dv/tools/dvsim/testplans/csr_testplan.hjson", -+ "hw/vendor/lowrisc_ip/dv/tools/dvsim/testplans/tl_device_access_types_testplan.hjson", -+ "hw/vendor/lowrisc_ip/dv/tools/dvsim/testplans/stress_all_with_reset_testplan.hjson", -+ "hw/vendor/lowrisc_ip/dv/tools/dvsim/testplans/sec_cm_count_testplan.hjson", -+ "hw/vendor/lowrisc_ip/dv/tools/dvsim/testplans/sec_cm_fsm_testplan.hjson", - "rstmgr_sec_cm_testplan.hjson"] - - testpoints: [ - -diff --git a/dv/rstmgr_sim_cfg.hjson.tpl b/dv/rstmgr_sim_cfg.hjson.tpl +diff --git a/rstmgr_sim_cfg.hjson.tpl b/rstmgr_sim_cfg.hjson.tpl index b12e73a..3c50439 100644 ---- a/dv/rstmgr_sim_cfg.hjson.tpl -+++ b/dv/rstmgr_sim_cfg.hjson.tpl +--- a/rstmgr_sim_cfg.hjson.tpl ++++ b/rstmgr_sim_cfg.hjson.tpl @@ -12,7 +12,7 @@ tb: tb @@ -58,10 +34,10 @@ index b12e73a..3c50439 100644 ] // Specific exclusion files. -diff --git a/dv/rstmgr_cnsty_chk/rstmgr_cnsty_chk_sim_cfg.hjson.tpl b/dv/rstmgr_cnsty_chk/rstmgr_cnsty_chk_sim_cfg.hjson.tpl +diff --git a/rstmgr_cnsty_chk/rstmgr_cnsty_chk_sim_cfg.hjson.tpl b/rstmgr_cnsty_chk/rstmgr_cnsty_chk_sim_cfg.hjson.tpl index 42f8b22..1107fe8 100644 ---- a/dv/rstmgr_cnsty_chk/rstmgr_cnsty_chk_sim_cfg.hjson.tpl -+++ b/dv/rstmgr_cnsty_chk/rstmgr_cnsty_chk_sim_cfg.hjson.tpl +--- a/rstmgr_cnsty_chk/rstmgr_cnsty_chk_sim_cfg.hjson.tpl ++++ b/rstmgr_cnsty_chk/rstmgr_cnsty_chk_sim_cfg.hjson.tpl @@ -21,7 +21,7 @@ testplan: "{self_dir}/data/rstmgr_cnsty_chk_testplan.hjson" diff --git a/hw/vendor/patches/lowrisc_ip/rstmgr/0002_Fix_Templates.patch b/hw/vendor/patches/lowrisc_ip/rstmgr_dv/0002_Fix_Templates.patch similarity index 79% rename from hw/vendor/patches/lowrisc_ip/rstmgr/0002_Fix_Templates.patch rename to hw/vendor/patches/lowrisc_ip/rstmgr_dv/0002_Fix_Templates.patch index bf35cb5d4..a161a401b 100644 --- a/hw/vendor/patches/lowrisc_ip/rstmgr/0002_Fix_Templates.patch +++ b/hw/vendor/patches/lowrisc_ip/rstmgr_dv/0002_Fix_Templates.patch @@ -1,7 +1,7 @@ -diff --git a/dv/env/rstmgr_if.sv.tpl b/dv/env/rstmgr_if.sv.tpl +diff --git a/env/rstmgr_if.sv.tpl b/env/rstmgr_if.sv.tpl index cb2102d..25c6fe2 100644 ---- a/dv/env/rstmgr_if.sv.tpl -+++ b/dv/env/rstmgr_if.sv.tpl +--- a/env/rstmgr_if.sv.tpl ++++ b/env/rstmgr_if.sv.tpl @@ -13,7 +13,7 @@ elif "io" in all_clks: else: assert 0, "No preferred clock available" @@ -11,10 +11,10 @@ index cb2102d..25c6fe2 100644 %>\ interface rstmgr_if ( -diff --git a/dv/env/seq_lib/rstmgr_reset_vseq.sv.tpl b/dv/env/seq_lib/rstmgr_reset_vseq.sv.tpl +diff --git a/env/seq_lib/rstmgr_reset_vseq.sv.tpl b/env/seq_lib/rstmgr_reset_vseq.sv.tpl index 356807f..1670853 100644 ---- a/dv/env/seq_lib/rstmgr_reset_vseq.sv.tpl -+++ b/dv/env/seq_lib/rstmgr_reset_vseq.sv.tpl +--- a/env/seq_lib/rstmgr_reset_vseq.sv.tpl ++++ b/env/seq_lib/rstmgr_reset_vseq.sv.tpl @@ -127,8 +127,8 @@ class rstmgr_reset_vseq extends rstmgr_base_vseq; expected_cpu_enable = 0; @@ -35,10 +35,10 @@ index 356807f..1670853 100644 check_reset_info(expected_reset_info_code); check_alert_info_after_reset(.alert_dump(expected_alert_dump), .enable(expected_alert_enable)); -diff --git a/dv/tb.sv.tpl b/dv/tb.sv.tpl +diff --git a/tb.sv.tpl b/tb.sv.tpl index c2e8ce4..49dbb57 100644 ---- a/dv/tb.sv.tpl -+++ b/dv/tb.sv.tpl +--- a/tb.sv.tpl ++++ b/tb.sv.tpl @@ -12,7 +12,7 @@ elif "io" in all_clks: else: assert 0, "No preferred clock available" diff --git a/hw/vendor/patches/lowrisc_ip/rstmgr/0003_Cascade_Assertion_Fix.patch b/hw/vendor/patches/lowrisc_ip/rstmgr_dv/0003_Cascade_Assertion_Fix.patch similarity index 92% rename from hw/vendor/patches/lowrisc_ip/rstmgr/0003_Cascade_Assertion_Fix.patch rename to hw/vendor/patches/lowrisc_ip/rstmgr_dv/0003_Cascade_Assertion_Fix.patch index 6302e9683..9eac55a49 100644 --- a/hw/vendor/patches/lowrisc_ip/rstmgr/0003_Cascade_Assertion_Fix.patch +++ b/hw/vendor/patches/lowrisc_ip/rstmgr_dv/0003_Cascade_Assertion_Fix.patch @@ -1,7 +1,7 @@ -diff --git a/dv/sva/rstmgr_cascading_sva_if.sv.tpl b/dv/sva/rstmgr_cascading_sva_if.sv.tpl +diff --git a/sva/rstmgr_cascading_sva_if.sv.tpl b/sva/rstmgr_cascading_sva_if.sv.tpl index 143d0ed5..f8853b04 100644 ---- a/dv/sva/rstmgr_cascading_sva_if.sv.tpl -+++ b/dv/sva/rstmgr_cascading_sva_if.sv.tpl +--- a/sva/rstmgr_cascading_sva_if.sv.tpl ++++ b/sva/rstmgr_cascading_sva_if.sv.tpl @@ -184,16 +184,22 @@ interface rstmgr_cascading_sva_if ( % endfor diff --git a/hw/vendor/patches/lowrisc_ip/rv_timer/0001_fix_paths.patch b/hw/vendor/patches/lowrisc_ip/rv_timer_dv/0001_fix_paths.patch similarity index 91% rename from hw/vendor/patches/lowrisc_ip/rv_timer/0001_fix_paths.patch rename to hw/vendor/patches/lowrisc_ip/rv_timer_dv/0001_fix_paths.patch index 22e4db860..8646b1205 100644 --- a/hw/vendor/patches/lowrisc_ip/rv_timer/0001_fix_paths.patch +++ b/hw/vendor/patches/lowrisc_ip/rv_timer_dv/0001_fix_paths.patch @@ -1,7 +1,7 @@ -diff --git a/dv/rv_timer_sim_cfg.hjson b/dv/rv_timer_sim_cfg.hjson +diff --git a/rv_timer_sim_cfg.hjson b/rv_timer_sim_cfg.hjson index cb97f40..e532389 100644 ---- a/dv/rv_timer_sim_cfg.hjson -+++ b/dv/rv_timer_sim_cfg.hjson +--- a/rv_timer_sim_cfg.hjson ++++ b/rv_timer_sim_cfg.hjson @@ -25,14 +25,14 @@ // Import additional common sim cfg files. diff --git a/hw/vendor/patches/lowrisc_ip/rv_timer/0002_default_tool.patch b/hw/vendor/patches/lowrisc_ip/rv_timer_dv/0002_default_tool.patch similarity index 64% rename from hw/vendor/patches/lowrisc_ip/rv_timer/0002_default_tool.patch rename to hw/vendor/patches/lowrisc_ip/rv_timer_dv/0002_default_tool.patch index 11cd3e405..d592ce7af 100644 --- a/hw/vendor/patches/lowrisc_ip/rv_timer/0002_default_tool.patch +++ b/hw/vendor/patches/lowrisc_ip/rv_timer_dv/0002_default_tool.patch @@ -1,7 +1,7 @@ -diff --git a/dv/rv_timer_sim_cfg.hjson b/dv/rv_timer_sim_cfg.hjson +diff --git a/rv_timer_sim_cfg.hjson b/rv_timer_sim_cfg.hjson index e532389..f55b819 100644 ---- a/dv/rv_timer_sim_cfg.hjson -+++ b/dv/rv_timer_sim_cfg.hjson +--- a/rv_timer_sim_cfg.hjson ++++ b/rv_timer_sim_cfg.hjson @@ -12,7 +12,7 @@ tb: tb diff --git a/hw/vendor/patches/lowrisc_ip/spi_device/0001_Fix_Paths.patch b/hw/vendor/patches/lowrisc_ip/spi_device/0001_Fix_Paths.patch index 20dc52b35..369ee11b7 100644 --- a/hw/vendor/patches/lowrisc_ip/spi_device/0001_Fix_Paths.patch +++ b/hw/vendor/patches/lowrisc_ip/spi_device/0001_Fix_Paths.patch @@ -21,105 +21,3 @@ index 1092cc1..352fc89 100644 "spi_device_sec_cm_testplan.hjson"] testpoints: [ { -diff --git a/dv/base_sim_cfg.hjson b/dv/base_sim_cfg.hjson -index ef9a7dd..d018345 100644 ---- a/dv/base_sim_cfg.hjson -+++ b/dv/base_sim_cfg.hjson -@@ -18,24 +18,24 @@ - fusesoc_core: lowrisc:dv:spi_device_sim:0.1 - - // Testplan hjson file. -- testplan: "{proj_root}/hw/ip/spi_device/data/spi_device_testplan.hjson" -+ testplan: "{proj_root}/hw/vendor/lowrisc_ip/ip/spi_device/data/spi_device_testplan.hjson" - - // RAL spec - used to generate the RAL model. -- ral_spec: "{proj_root}/hw/ip/spi_device/data/spi_device.hjson" -+ ral_spec: "{proj_root}/hw/vendor/lowrisc_ip/ip/spi_device/data/spi_device.hjson" - - // Import additional common sim cfg files. - import_cfgs: [// Project wide common sim cfg file -- "{proj_root}/hw/dv/tools/dvsim/common_sim_cfg.hjson", -+ "{proj_root}/hw/vendor/lowrisc_ip/dv/tools/dvsim/common_sim_cfg.hjson", - // Common CIP test lists -- "{proj_root}/hw/dv/tools/dvsim/tests/csr_tests.hjson", -- "{proj_root}/hw/dv/tools/dvsim/tests/mem_tests.hjson", -- "{proj_root}/hw/dv/tools/dvsim/tests/alert_test.hjson", -- "{proj_root}/hw/dv/tools/dvsim/tests/intr_test.hjson", -- "{proj_root}/hw/dv/tools/dvsim/tests/tl_access_tests.hjson" -- "{proj_root}/hw/dv/tools/dvsim/tests/sec_cm_tests.hjson", -- "{proj_root}/hw/dv/tools/dvsim/tests/stress_all_test.hjson" -+ "{proj_root}/hw/vendor/lowrisc_ip/dv/tools/dvsim/tests/csr_tests.hjson", -+ "{proj_root}/hw/vendor/lowrisc_ip/dv/tools/dvsim/tests/mem_tests.hjson", -+ "{proj_root}/hw/vendor/lowrisc_ip/dv/tools/dvsim/tests/alert_test.hjson", -+ "{proj_root}/hw/vendor/lowrisc_ip/dv/tools/dvsim/tests/intr_test.hjson", -+ "{proj_root}/hw/vendor/lowrisc_ip/dv/tools/dvsim/tests/tl_access_tests.hjson" -+ "{proj_root}/hw/vendor/lowrisc_ip/dv/tools/dvsim/tests/sec_cm_tests.hjson", -+ "{proj_root}/hw/vendor/lowrisc_ip/dv/tools/dvsim/tests/stress_all_test.hjson" - // TODO, enable stress_all_with_rand_reset later -- // "{proj_root}/hw/dv/tools/dvsim/tests/stress_tests.hjson" -+ // "{proj_root}/hw/vendor/lowrisc_ip/dv/tools/dvsim/tests/stress_tests.hjson" - ] - - // Add additional tops for simulation. -@@ -51,18 +51,6 @@ - uvm_test: spi_device_base_test - uvm_test_seq: spi_device_base_vseq - -- // Need to override the default output directory -- overrides: [ -- { -- name: scratch_path -- value: "{scratch_base_path}/{name}_{variant}-{flow}-{tool}" -- } -- { -- name: rel_path -- value: "hw/ip/{name}_{variant}/dv" -- } -- ] -- - // List of test specifications. - tests: [ - { -diff --git a/dv/spi_device_1r1w_sim_cfg.hjson b/dv/spi_device_1r1w_sim_cfg.hjson -index f48986d..83c257b 100644 ---- a/dv/spi_device_1r1w_sim_cfg.hjson -+++ b/dv/spi_device_1r1w_sim_cfg.hjson -@@ -6,13 +6,13 @@ - variant: 1r1w - - // Import the base spi_device sim_cfg file -- import_cfgs: ["{proj_root}/hw/ip/spi_device/dv/base_sim_cfg.hjson"] -+ import_cfgs: ["{proj_root}/hw/vendor/lowrisc_ip/ip/spi_device/dv/base_sim_cfg.hjson"] - - build_opts: ["+define+SRAM_TYPE=spi_device_pkg::SramType1r1w"] - - // Add UART specific exclusion files. - vcs_cov_excl_files: [ -- "{proj_root}/hw/ip/spi_device/dv/cov/spi_device_cov_excl.el", -- "{proj_root}/hw/ip/spi_device/dv/cov/spi_device_1r1w_unr_cov_excl.el", -+ "{proj_root}/hw/vendor/lowrisc_ip/ip/spi_device/dv/cov/spi_device_cov_excl.el", -+ "{proj_root}/hw/vendor/lowrisc_ip/ip/spi_device/dv/cov/spi_device_1r1w_unr_cov_excl.el", - ] - } -diff --git a/dv/spi_device_2p_sim_cfg.hjson b/dv/spi_device_2p_sim_cfg.hjson -index 23f0bc6..a7ba8c7 100644 ---- a/dv/spi_device_2p_sim_cfg.hjson -+++ b/dv/spi_device_2p_sim_cfg.hjson -@@ -6,14 +6,14 @@ - variant: 2p - - // Import the base spi_device sim_cfg file -- import_cfgs: ["{proj_root}/hw/ip/spi_device/dv/base_sim_cfg.hjson"] -+ import_cfgs: ["{proj_root}/hw/vendor/lowrisc_ip/ip/spi_device/dv/base_sim_cfg.hjson"] - - // Enable the appropriate build mode for all tests - build_opts: ["+define+SRAM_TYPE=spi_device_pkg::SramType2p"] - - // Add UART specific exclusion files. - vcs_cov_excl_files: [ -- "{proj_root}/hw/ip/spi_device/dv/cov/spi_device_cov_excl.el", -- "{proj_root}/hw/ip/spi_device/dv/cov/spi_device_2p_unr_cov_excl.el", -+ "{proj_root}/hw/vendor/lowrisc_ip/ip/spi_device/dv/cov/spi_device_cov_excl.el", -+ "{proj_root}/hw/vendor/lowrisc_ip/ip/spi_device/dv/cov/spi_device_2p_unr_cov_excl.el", - ] - } diff --git a/hw/vendor/patches/lowrisc_ip/spi_device_dv/0001_Fix_Paths.patch b/hw/vendor/patches/lowrisc_ip/spi_device_dv/0001_Fix_Paths.patch new file mode 100644 index 000000000..fbdb1f694 --- /dev/null +++ b/hw/vendor/patches/lowrisc_ip/spi_device_dv/0001_Fix_Paths.patch @@ -0,0 +1,102 @@ +diff --git a/base_sim_cfg.hjson b/base_sim_cfg.hjson +index ef9a7dd..d018345 100644 +--- a/base_sim_cfg.hjson ++++ b/base_sim_cfg.hjson +@@ -18,24 +18,24 @@ + fusesoc_core: lowrisc:dv:spi_device_sim:0.1 + + // Testplan hjson file. +- testplan: "{proj_root}/hw/ip/spi_device/data/spi_device_testplan.hjson" ++ testplan: "{proj_root}/hw/vendor/lowrisc_ip/ip/spi_device/data/spi_device_testplan.hjson" + + // RAL spec - used to generate the RAL model. +- ral_spec: "{proj_root}/hw/ip/spi_device/data/spi_device.hjson" ++ ral_spec: "{proj_root}/hw/vendor/lowrisc_ip/ip/spi_device/data/spi_device.hjson" + + // Import additional common sim cfg files. + import_cfgs: [// Project wide common sim cfg file +- "{proj_root}/hw/dv/tools/dvsim/common_sim_cfg.hjson", ++ "{proj_root}/hw/vendor/lowrisc_ip/dv/tools/dvsim/common_sim_cfg.hjson", + // Common CIP test lists +- "{proj_root}/hw/dv/tools/dvsim/tests/csr_tests.hjson", +- "{proj_root}/hw/dv/tools/dvsim/tests/mem_tests.hjson", +- "{proj_root}/hw/dv/tools/dvsim/tests/alert_test.hjson", +- "{proj_root}/hw/dv/tools/dvsim/tests/intr_test.hjson", +- "{proj_root}/hw/dv/tools/dvsim/tests/tl_access_tests.hjson" +- "{proj_root}/hw/dv/tools/dvsim/tests/sec_cm_tests.hjson", +- "{proj_root}/hw/dv/tools/dvsim/tests/stress_all_test.hjson" ++ "{proj_root}/hw/vendor/lowrisc_ip/dv/tools/dvsim/tests/csr_tests.hjson", ++ "{proj_root}/hw/vendor/lowrisc_ip/dv/tools/dvsim/tests/mem_tests.hjson", ++ "{proj_root}/hw/vendor/lowrisc_ip/dv/tools/dvsim/tests/alert_test.hjson", ++ "{proj_root}/hw/vendor/lowrisc_ip/dv/tools/dvsim/tests/intr_test.hjson", ++ "{proj_root}/hw/vendor/lowrisc_ip/dv/tools/dvsim/tests/tl_access_tests.hjson" ++ "{proj_root}/hw/vendor/lowrisc_ip/dv/tools/dvsim/tests/sec_cm_tests.hjson", ++ "{proj_root}/hw/vendor/lowrisc_ip/dv/tools/dvsim/tests/stress_all_test.hjson" + // TODO, enable stress_all_with_rand_reset later +- // "{proj_root}/hw/dv/tools/dvsim/tests/stress_tests.hjson" ++ // "{proj_root}/hw/vendor/lowrisc_ip/dv/tools/dvsim/tests/stress_tests.hjson" + ] + + // Add additional tops for simulation. +@@ -51,18 +51,6 @@ + uvm_test: spi_device_base_test + uvm_test_seq: spi_device_base_vseq + +- // Need to override the default output directory +- overrides: [ +- { +- name: scratch_path +- value: "{scratch_base_path}/{name}_{variant}-{flow}-{tool}" +- } +- { +- name: rel_path +- value: "hw/ip/{name}_{variant}/dv" +- } +- ] +- + // List of test specifications. + tests: [ + { +diff --git a/spi_device_1r1w_sim_cfg.hjson b/spi_device_1r1w_sim_cfg.hjson +index f48986d..83c257b 100644 +--- a/spi_device_1r1w_sim_cfg.hjson ++++ b/spi_device_1r1w_sim_cfg.hjson +@@ -6,13 +6,13 @@ + variant: 1r1w + + // Import the base spi_device sim_cfg file +- import_cfgs: ["{proj_root}/hw/ip/spi_device/dv/base_sim_cfg.hjson"] ++ import_cfgs: ["{proj_root}/hw/vendor/lowrisc_ip/ip/spi_device/dv/base_sim_cfg.hjson"] + + build_opts: ["+define+SRAM_TYPE=spi_device_pkg::SramType1r1w"] + + // Add UART specific exclusion files. + vcs_cov_excl_files: [ +- "{proj_root}/hw/ip/spi_device/dv/cov/spi_device_cov_excl.el", +- "{proj_root}/hw/ip/spi_device/dv/cov/spi_device_1r1w_unr_cov_excl.el", ++ "{proj_root}/hw/vendor/lowrisc_ip/ip/spi_device/dv/cov/spi_device_cov_excl.el", ++ "{proj_root}/hw/vendor/lowrisc_ip/ip/spi_device/dv/cov/spi_device_1r1w_unr_cov_excl.el", + ] + } +diff --git a/spi_device_2p_sim_cfg.hjson b/spi_device_2p_sim_cfg.hjson +index 23f0bc6..a7ba8c7 100644 +--- a/spi_device_2p_sim_cfg.hjson ++++ b/spi_device_2p_sim_cfg.hjson +@@ -6,14 +6,14 @@ + variant: 2p + + // Import the base spi_device sim_cfg file +- import_cfgs: ["{proj_root}/hw/ip/spi_device/dv/base_sim_cfg.hjson"] ++ import_cfgs: ["{proj_root}/hw/vendor/lowrisc_ip/ip/spi_device/dv/base_sim_cfg.hjson"] + + // Enable the appropriate build mode for all tests + build_opts: ["+define+SRAM_TYPE=spi_device_pkg::SramType2p"] + + // Add UART specific exclusion files. + vcs_cov_excl_files: [ +- "{proj_root}/hw/ip/spi_device/dv/cov/spi_device_cov_excl.el", +- "{proj_root}/hw/ip/spi_device/dv/cov/spi_device_2p_unr_cov_excl.el", ++ "{proj_root}/hw/vendor/lowrisc_ip/ip/spi_device/dv/cov/spi_device_cov_excl.el", ++ "{proj_root}/hw/vendor/lowrisc_ip/ip/spi_device/dv/cov/spi_device_2p_unr_cov_excl.el", + ] + } diff --git a/hw/vendor/patches/lowrisc_ip/spi_device/0002_update_sim_cfg.patch b/hw/vendor/patches/lowrisc_ip/spi_device_dv/0002_update_sim_cfg.patch similarity index 86% rename from hw/vendor/patches/lowrisc_ip/spi_device/0002_update_sim_cfg.patch rename to hw/vendor/patches/lowrisc_ip/spi_device_dv/0002_update_sim_cfg.patch index 63f0df875..64f066c2b 100644 --- a/hw/vendor/patches/lowrisc_ip/spi_device/0002_update_sim_cfg.patch +++ b/hw/vendor/patches/lowrisc_ip/spi_device_dv/0002_update_sim_cfg.patch @@ -1,7 +1,7 @@ -diff --git a/dv/base_sim_cfg.hjson b/dv/base_sim_cfg.hjson +diff --git a/base_sim_cfg.hjson b/base_sim_cfg.hjson index d018345..8bbf40c 100644 ---- a/dv/base_sim_cfg.hjson -+++ b/dv/base_sim_cfg.hjson +--- a/base_sim_cfg.hjson ++++ b/base_sim_cfg.hjson @@ -33,9 +33,7 @@ "{proj_root}/hw/vendor/lowrisc_ip/dv/tools/dvsim/tests/intr_test.hjson", "{proj_root}/hw/vendor/lowrisc_ip/dv/tools/dvsim/tests/tl_access_tests.hjson" diff --git a/hw/vendor/patches/lowrisc_ip/spi_device/0003_default_tool_sim_cfg.patch b/hw/vendor/patches/lowrisc_ip/spi_device_dv/0003_default_tool_sim_cfg.patch similarity index 67% rename from hw/vendor/patches/lowrisc_ip/spi_device/0003_default_tool_sim_cfg.patch rename to hw/vendor/patches/lowrisc_ip/spi_device_dv/0003_default_tool_sim_cfg.patch index 294014b7b..98e60287c 100644 --- a/hw/vendor/patches/lowrisc_ip/spi_device/0003_default_tool_sim_cfg.patch +++ b/hw/vendor/patches/lowrisc_ip/spi_device_dv/0003_default_tool_sim_cfg.patch @@ -1,7 +1,7 @@ -diff --git a/dv/base_sim_cfg.hjson b/dv/base_sim_cfg.hjson +diff --git a/base_sim_cfg.hjson b/base_sim_cfg.hjson index 8bbf40c..58e9c99 100644 ---- a/dv/base_sim_cfg.hjson -+++ b/dv/base_sim_cfg.hjson +--- a/base_sim_cfg.hjson ++++ b/base_sim_cfg.hjson @@ -12,7 +12,7 @@ tb: tb diff --git a/hw/vendor/patches/lowrisc_ip/spi_device_dv/0004_Fix_RAM_cfg_type.patch b/hw/vendor/patches/lowrisc_ip/spi_device_dv/0004_Fix_RAM_cfg_type.patch new file mode 100644 index 000000000..cb350be73 --- /dev/null +++ b/hw/vendor/patches/lowrisc_ip/spi_device_dv/0004_Fix_RAM_cfg_type.patch @@ -0,0 +1,48 @@ +diff --git a/tb/tb.sv b/tb/tb.sv +--- a/tb/tb.sv ++++ b/tb/tb.sv +@@ -41,8 +41,8 @@ + // Memory configuration signals. These signals are currently driven in: + // spi_device_ram_cfg_vseq. They are connected here to avoid a warning +- prim_ram_1r1w_pkg::ram_1r1w_cfg_req_t ram_cfg_sys2spi; +- prim_ram_1r1w_pkg::ram_1r1w_cfg_req_t ram_cfg_spi2sys; ++ prim_ram_2p_pkg::ram_2p_cfg_t ram_cfg_sys2spi; ++ prim_ram_2p_pkg::ram_2p_cfg_t ram_cfg_spi2sys; + assign ram_cfg_sys2spi = 0; + assign ram_cfg_spi2sys = 0; + + // RACL: +@@ -99,9 +99,9 @@ + .sck_monitor_o(), + + .ram_cfg_sys2spi_i(ram_cfg_sys2spi), +- .ram_cfg_sys2spi_o(), ++ .ram_cfg_rsp_sys2spi_o(), + .ram_cfg_spi2sys_i(ram_cfg_spi2sys), +- .ram_cfg_spi2sys_o(), ++ .ram_cfg_rsp_spi2sys_o(), + + .mbist_en_i (1'b0), + .scan_clk_i (1'b0), +diff --git a/env/seq_lib/spi_device_vseq_list.sv b/env/seq_lib/spi_device_vseq_list.sv +--- a/env/seq_lib/spi_device_vseq_list.sv ++++ b/env/seq_lib/spi_device_vseq_list.sv +@@ -7,7 +7,6 @@ + `include "spi_device_common_vseq.sv" + `include "spi_device_csb_read_vseq.sv" + `include "spi_device_mem_parity_vseq.sv" +-`include "spi_device_ram_cfg_vseq.sv" + `include "spi_device_tpm_base_vseq.sv" + `include "spi_device_tpm_read_hw_reg_vseq.sv" + `include "spi_device_tpm_all_vseq.sv" +diff --git a/env/spi_device_env.core b/env/spi_device_env.core +--- a/env/spi_device_env.core ++++ b/env/spi_device_env.core +@@ -23,7 +23,6 @@ + - seq_lib/spi_device_common_vseq.sv: {is_include_file: true} + - seq_lib/spi_device_csb_read_vseq.sv: {is_include_file: true} + - seq_lib/spi_device_mem_parity_vseq.sv: {is_include_file: true} +- - seq_lib/spi_device_ram_cfg_vseq.sv: {is_include_file: true} + - seq_lib/spi_device_tpm_base_vseq.sv: {is_include_file: true} + - seq_lib/spi_device_tpm_read_hw_reg_vseq.sv: {is_include_file: true} + - seq_lib/spi_device_tpm_all_vseq.sv: {is_include_file: true} diff --git a/hw/vendor/patches/lowrisc_ip/spi_host/0001_Sim_Path_Fixes.patch b/hw/vendor/patches/lowrisc_ip/spi_host/0001_Sim_Path_Fixes.patch index be4ada7ef..2dcf45308 100644 --- a/hw/vendor/patches/lowrisc_ip/spi_host/0001_Sim_Path_Fixes.patch +++ b/hw/vendor/patches/lowrisc_ip/spi_host/0001_Sim_Path_Fixes.patch @@ -21,49 +21,3 @@ index 70d3420..d5f35e2 100644 "spi_host_sec_cm_testplan.hjson"], testpoints: [ { -diff --git a/dv/spi_host_sim_cfg.hjson b/dv/spi_host_sim_cfg.hjson -index c27bc3f..d8df8d1 100644 ---- a/dv/spi_host_sim_cfg.hjson -+++ b/dv/spi_host_sim_cfg.hjson -@@ -18,29 +18,29 @@ - fusesoc_core: lowrisc:dv:spi_host_sim:1.0 - - // Testplan hjson file. -- testplan: "{proj_root}/hw/ip/spi_host/data/spi_host_testplan.hjson" -+ testplan: "{proj_root}/hw/vendor/lowrisc_ip/ip/spi_host/data/spi_host_testplan.hjson" - - // RAL spec - used to generate the RAL model. -- ral_spec: "{proj_root}/hw/ip/spi_host/data/spi_host.hjson" -+ ral_spec: "{proj_root}/hw/vendor/lowrisc_ip/ip/spi_host/data/spi_host.hjson" - - // Import additional common sim cfg files. - import_cfgs: [// Project wide common sim cfg file -- "{proj_root}/hw/dv/tools/dvsim/common_sim_cfg.hjson", -+ "{proj_root}/hw/vendor/lowrisc_ip/dv/tools/dvsim/common_sim_cfg.hjson", - // Common CIP test lists -- "{proj_root}/hw/dv/tools/dvsim/tests/csr_tests.hjson", -- "{proj_root}/hw/dv/tools/dvsim/tests/intr_test.hjson", -- "{proj_root}/hw/dv/tools/dvsim/tests/mem_tests.hjson", -- "{proj_root}/hw/dv/tools/dvsim/tests/alert_test.hjson", -- "{proj_root}/hw/dv/tools/dvsim/tests/intr_test.hjson", -- "{proj_root}/hw/dv/tools/dvsim/tests/sec_cm_tests.hjson", -- //"{proj_root}/hw/dv/tools/dvsim/tests/stress_tests.hjson", // TODO(#18886): enable for V3 -- "{proj_root}/hw/dv/tools/dvsim/tests/tl_access_tests.hjson"] -+ "{proj_root}/hw/vendor/lowrisc_ip/dv/tools/dvsim/tests/csr_tests.hjson", -+ "{proj_root}/hw/vendor/lowrisc_ip/dv/tools/dvsim/tests/intr_test.hjson", -+ "{proj_root}/hw/vendor/lowrisc_ip/dv/tools/dvsim/tests/mem_tests.hjson", -+ "{proj_root}/hw/vendor/lowrisc_ip/dv/tools/dvsim/tests/alert_test.hjson", -+ "{proj_root}/hw/vendor/lowrisc_ip/dv/tools/dvsim/tests/intr_test.hjson", -+ "{proj_root}/hw/vendor/lowrisc_ip/dv/tools/dvsim/tests/sec_cm_tests.hjson", -+ //"{proj_root}/hw/vendor/lowrisc_ip/dv/tools/dvsim/tests/stress_tests.hjson", // TODO(#18886): enable for V3 -+ "{proj_root}/hw/vendor/lowrisc_ip/dv/tools/dvsim/tests/tl_access_tests.hjson"] - - // Add additional tops for simulation. - sim_tops: ["spi_host_bind", "sec_cm_prim_onehot_check_bind"] - - // Coverage exclusion -- xcelium_cov_refine_files: ["{proj_root}/hw/ip/spi_host/dv/cov/spi_host_unr_excl.vRefine"] -+ xcelium_cov_refine_files: ["{proj_root}/hw/vendor/lowrisc_ip/ip/spi_host/dv/cov/spi_host_unr_excl.vRefine"] - - // Default iterations for all tests - each test entry can override this. - reseed: 50 diff --git a/hw/vendor/patches/lowrisc_ip/spi_host_dv/0001_Sim_Path_Fixes.patch b/hw/vendor/patches/lowrisc_ip/spi_host_dv/0001_Sim_Path_Fixes.patch new file mode 100644 index 000000000..fd4cc901e --- /dev/null +++ b/hw/vendor/patches/lowrisc_ip/spi_host_dv/0001_Sim_Path_Fixes.patch @@ -0,0 +1,46 @@ +diff --git a/spi_host_sim_cfg.hjson b/spi_host_sim_cfg.hjson +index c27bc3f..d8df8d1 100644 +--- a/spi_host_sim_cfg.hjson ++++ b/spi_host_sim_cfg.hjson +@@ -18,29 +18,29 @@ + fusesoc_core: lowrisc:dv:spi_host_sim:1.0 + + // Testplan hjson file. +- testplan: "{proj_root}/hw/ip/spi_host/data/spi_host_testplan.hjson" ++ testplan: "{proj_root}/hw/vendor/lowrisc_ip/ip/spi_host/data/spi_host_testplan.hjson" + + // RAL spec - used to generate the RAL model. +- ral_spec: "{proj_root}/hw/ip/spi_host/data/spi_host.hjson" ++ ral_spec: "{proj_root}/hw/vendor/lowrisc_ip/ip/spi_host/data/spi_host.hjson" + + // Import additional common sim cfg files. + import_cfgs: [// Project wide common sim cfg file +- "{proj_root}/hw/dv/tools/dvsim/common_sim_cfg.hjson", ++ "{proj_root}/hw/vendor/lowrisc_ip/dv/tools/dvsim/common_sim_cfg.hjson", + // Common CIP test lists +- "{proj_root}/hw/dv/tools/dvsim/tests/csr_tests.hjson", +- "{proj_root}/hw/dv/tools/dvsim/tests/intr_test.hjson", +- "{proj_root}/hw/dv/tools/dvsim/tests/mem_tests.hjson", +- "{proj_root}/hw/dv/tools/dvsim/tests/alert_test.hjson", +- "{proj_root}/hw/dv/tools/dvsim/tests/intr_test.hjson", +- "{proj_root}/hw/dv/tools/dvsim/tests/sec_cm_tests.hjson", +- //"{proj_root}/hw/dv/tools/dvsim/tests/stress_tests.hjson", // TODO(#18886): enable for V3 +- "{proj_root}/hw/dv/tools/dvsim/tests/tl_access_tests.hjson"] ++ "{proj_root}/hw/vendor/lowrisc_ip/dv/tools/dvsim/tests/csr_tests.hjson", ++ "{proj_root}/hw/vendor/lowrisc_ip/dv/tools/dvsim/tests/intr_test.hjson", ++ "{proj_root}/hw/vendor/lowrisc_ip/dv/tools/dvsim/tests/mem_tests.hjson", ++ "{proj_root}/hw/vendor/lowrisc_ip/dv/tools/dvsim/tests/alert_test.hjson", ++ "{proj_root}/hw/vendor/lowrisc_ip/dv/tools/dvsim/tests/intr_test.hjson", ++ "{proj_root}/hw/vendor/lowrisc_ip/dv/tools/dvsim/tests/sec_cm_tests.hjson", ++ //"{proj_root}/hw/vendor/lowrisc_ip/dv/tools/dvsim/tests/stress_tests.hjson", // TODO(#18886): enable for V3 ++ "{proj_root}/hw/vendor/lowrisc_ip/dv/tools/dvsim/tests/tl_access_tests.hjson"] + + // Add additional tops for simulation. + sim_tops: ["spi_host_bind", "sec_cm_prim_onehot_check_bind"] + + // Coverage exclusion +- xcelium_cov_refine_files: ["{proj_root}/hw/ip/spi_host/dv/cov/spi_host_unr_excl.vRefine"] ++ xcelium_cov_refine_files: ["{proj_root}/hw/vendor/lowrisc_ip/ip/spi_host/dv/cov/spi_host_unr_excl.vRefine"] + + // Default iterations for all tests - each test entry can override this. + reseed: 10 diff --git a/hw/vendor/patches/lowrisc_ip/uart/0001_Fix_Paths.patch b/hw/vendor/patches/lowrisc_ip/uart/0001_Fix_Paths.patch index 80ce397e5..74c7cc9b0 100644 --- a/hw/vendor/patches/lowrisc_ip/uart/0001_Fix_Paths.patch +++ b/hw/vendor/patches/lowrisc_ip/uart/0001_Fix_Paths.patch @@ -19,47 +19,3 @@ index 761fe4d..022ba4e 100644 "uart_sec_cm_testplan.hjson"] testpoints: [ { -diff --git a/dv/uart_sim_cfg.hjson b/dv/uart_sim_cfg.hjson -index 6d13daf..812dc65 100644 ---- a/dv/uart_sim_cfg.hjson -+++ b/dv/uart_sim_cfg.hjson -@@ -18,21 +18,21 @@ - fusesoc_core: lowrisc:dv:uart_sim:0.1 - - // Testplan hjson file. -- testplan: "{proj_root}/hw/ip/uart/data/uart_testplan.hjson" -+ testplan: "{proj_root}/hw/vendor/lowrisc_ip/ip/uart/data/uart_testplan.hjson" - - // RAL spec - used to generate the RAL model. -- ral_spec: "{proj_root}/hw/ip/uart/data/uart.hjson" -+ ral_spec: "{proj_root}/hw/vendor/lowrisc_ip/ip/uart/data/uart.hjson" - - // Import additional common sim cfg files. - import_cfgs: [// Project wide common sim cfg file -- "{proj_root}/hw/dv/tools/dvsim/common_sim_cfg.hjson", -+ "{proj_root}/hw/vendor/lowrisc_ip/dv/tools/dvsim/common_sim_cfg.hjson", - // Common CIP test lists -- "{proj_root}/hw/dv/tools/dvsim/tests/csr_tests.hjson", -- "{proj_root}/hw/dv/tools/dvsim/tests/alert_test.hjson", -- "{proj_root}/hw/dv/tools/dvsim/tests/intr_test.hjson", -- "{proj_root}/hw/dv/tools/dvsim/tests/tl_access_tests.hjson", -- "{proj_root}/hw/dv/tools/dvsim/tests/sec_cm_tests.hjson", -- "{proj_root}/hw/dv/tools/dvsim/tests/stress_tests.hjson"] -+ "{proj_root}/hw/vendor/lowrisc_ip/dv/tools/dvsim/tests/csr_tests.hjson", -+ "{proj_root}/hw/vendor/lowrisc_ip/dv/tools/dvsim/tests/alert_test.hjson", -+ "{proj_root}/hw/vendor/lowrisc_ip/dv/tools/dvsim/tests/intr_test.hjson", -+ "{proj_root}/hw/vendor/lowrisc_ip/dv/tools/dvsim/tests/tl_access_tests.hjson", -+ "{proj_root}/hw/vendor/lowrisc_ip/dv/tools/dvsim/tests/sec_cm_tests.hjson", -+ "{proj_root}/hw/vendor/lowrisc_ip/dv/tools/dvsim/tests/stress_tests.hjson"] - - // Add additional tops for simulation. - sim_tops: ["uart_bind", "sec_cm_prim_onehot_check_bind"] -@@ -48,7 +48,7 @@ - uvm_test_seq: uart_base_vseq - - // Add UART specific exclusion files. -- vcs_cov_excl_files: ["{proj_root}/hw/ip/uart/dv/cov/uart_cov_excl.el"] -+ vcs_cov_excl_files: ["{proj_root}/hw/vendor/lowrisc_ip/ip/uart/dv/cov/uart_cov_excl.el"] - - // List of test specifications. - tests: [ diff --git a/hw/vendor/patches/lowrisc_ip/uart_dv/0001_Fix_Paths.patch b/hw/vendor/patches/lowrisc_ip/uart_dv/0001_Fix_Paths.patch new file mode 100644 index 000000000..173f7280d --- /dev/null +++ b/hw/vendor/patches/lowrisc_ip/uart_dv/0001_Fix_Paths.patch @@ -0,0 +1,44 @@ +diff --git a/uart_sim_cfg.hjson b/uart_sim_cfg.hjson +index 6d13daf..812dc65 100644 +--- a/uart_sim_cfg.hjson ++++ b/uart_sim_cfg.hjson +@@ -18,21 +18,21 @@ + fusesoc_core: lowrisc:dv:uart_sim:0.1 + + // Testplan hjson file. +- testplan: "{proj_root}/hw/ip/uart/data/uart_testplan.hjson" ++ testplan: "{proj_root}/hw/vendor/lowrisc_ip/ip/uart/data/uart_testplan.hjson" + + // RAL spec - used to generate the RAL model. +- ral_spec: "{proj_root}/hw/ip/uart/data/uart.hjson" ++ ral_spec: "{proj_root}/hw/vendor/lowrisc_ip/ip/uart/data/uart.hjson" + + // Import additional common sim cfg files. + import_cfgs: [// Project wide common sim cfg file +- "{proj_root}/hw/dv/tools/dvsim/common_sim_cfg.hjson", ++ "{proj_root}/hw/vendor/lowrisc_ip/dv/tools/dvsim/common_sim_cfg.hjson", + // Common CIP test lists +- "{proj_root}/hw/dv/tools/dvsim/tests/csr_tests.hjson", +- "{proj_root}/hw/dv/tools/dvsim/tests/alert_test.hjson", +- "{proj_root}/hw/dv/tools/dvsim/tests/intr_test.hjson", +- "{proj_root}/hw/dv/tools/dvsim/tests/tl_access_tests.hjson", +- "{proj_root}/hw/dv/tools/dvsim/tests/sec_cm_tests.hjson", +- "{proj_root}/hw/dv/tools/dvsim/tests/stress_tests.hjson"] ++ "{proj_root}/hw/vendor/lowrisc_ip/dv/tools/dvsim/tests/csr_tests.hjson", ++ "{proj_root}/hw/vendor/lowrisc_ip/dv/tools/dvsim/tests/alert_test.hjson", ++ "{proj_root}/hw/vendor/lowrisc_ip/dv/tools/dvsim/tests/intr_test.hjson", ++ "{proj_root}/hw/vendor/lowrisc_ip/dv/tools/dvsim/tests/tl_access_tests.hjson", ++ "{proj_root}/hw/vendor/lowrisc_ip/dv/tools/dvsim/tests/sec_cm_tests.hjson", ++ "{proj_root}/hw/vendor/lowrisc_ip/dv/tools/dvsim/tests/stress_tests.hjson"] + + // Add additional tops for simulation. + sim_tops: ["uart_bind", "sec_cm_prim_onehot_check_bind"] +@@ -48,7 +48,7 @@ + uvm_test_seq: uart_base_vseq + + // Add UART specific exclusion files. +- vcs_cov_excl_files: ["{proj_root}/hw/ip/uart/dv/cov/uart_cov_excl.el"] ++ vcs_cov_excl_files: ["{proj_root}/hw/vendor/lowrisc_ip/ip/uart/dv/cov/uart_cov_excl.el"] + + // List of test specifications. + tests: [ diff --git a/hw/vendor/patches/lowrisc_ip/uart/0002_default_tool_sim_cfg.patch b/hw/vendor/patches/lowrisc_ip/uart_dv/0002_default_tool_sim_cfg.patch similarity index 66% rename from hw/vendor/patches/lowrisc_ip/uart/0002_default_tool_sim_cfg.patch rename to hw/vendor/patches/lowrisc_ip/uart_dv/0002_default_tool_sim_cfg.patch index 53719254f..aaf63c67a 100644 --- a/hw/vendor/patches/lowrisc_ip/uart/0002_default_tool_sim_cfg.patch +++ b/hw/vendor/patches/lowrisc_ip/uart_dv/0002_default_tool_sim_cfg.patch @@ -1,7 +1,7 @@ -diff --git a/dv/uart_sim_cfg.hjson b/dv/uart_sim_cfg.hjson +diff --git a/uart_sim_cfg.hjson b/uart_sim_cfg.hjson index 812dc65..e05d17e 100644 ---- a/dv/uart_sim_cfg.hjson -+++ b/dv/uart_sim_cfg.hjson +--- a/uart_sim_cfg.hjson ++++ b/uart_sim_cfg.hjson @@ -12,7 +12,7 @@ tb: tb diff --git a/util/artefacts.py b/util/artefacts.py index 7b6424280..afe96be23 100755 --- a/util/artefacts.py +++ b/util/artefacts.py @@ -14,8 +14,14 @@ import subprocess import sys +# A COMMANDS entry is either a single command, or a group of commands that run +# together before one dirty-check (e.g. the DD + DV vendor pair, which share a +# target_dir and must both run before the tree is checked). +Command = list[str] +CommandGroup = list[Command] + # the commands which generated committed files to be ran -COMMANDS: list[list[str]] = [ +COMMANDS: list[Command | CommandGroup] = [ # lockfiles ["uv", "lock"], ["nix", "flake", "lock"], @@ -58,8 +64,13 @@ ], # documentation ["d2", "doc/img/mocha.d2"], - # vendor OpenTitan before doing the IP generation because patches might change the template - ["util/vendor.py", "hw/vendor/lowrisc_ip.vendor.hjson"], + # vendor OpenTitan before doing the IP generation because patches might change the template. + # DD and DV vendors share a target_dir; run both before checking, since DD deletes IP dirs + # (including their dv/ subdirs) which the DV vendor then re-populates. + [ + ["util/vendor.py", "hw/vendor/lowrisc_ip.vendor.hjson"], + ["util/vendor.py", "hw/vendor/lowrisc_ip_dv.vendor.hjson"], + ], # crossbar generator [ "hw/vendor/lowrisc_ip/util/tlgen.py", @@ -177,11 +188,16 @@ def main(): args = parser.parse_args() fail = False - for cmdline in COMMANDS: - # run each generator command. these should all succeed - joined_cmdline = " ".join(cmdline) - print(f"running '{joined_cmdline}'...") - run_subprocess(cmdline) + for entry in COMMANDS: + # An entry is either a single command (list[str]) or a group of commands + # (list[list[str]]) that all run before a single dirty check. + cmdlines = entry if isinstance(entry[0], list) else [entry] + + for cmdline in cmdlines: + # run each generator command. these should all succeed + joined_cmdline = " ".join(cmdline) + print(f"running '{joined_cmdline}'...") + run_subprocess(cmdline) if not args.check: continue diff --git a/util/vendor.py b/util/vendor.py index abba52159..f675d5f5d 100755 --- a/util/vendor.py +++ b/util/vendor.py @@ -472,11 +472,19 @@ def lock_file_path(self): def import_from_upstream(self, upstream_path): log.info('Copying upstream sources to {}'.format(self.target_dir)) - # Remove existing directories before importing them again - shutil.rmtree(str(self.target_dir), ignore_errors=True) - items = (self.mapping.items if self.mapping is not None else [Mapping1.make_default(self.patch_dir is not None)]) + + # Remove only the paths managed by this vendor config rather than the + # entire target_dir. This allows multiple vendor configs to share the + # same target_dir without each run erasing the other's content. + for map1 in items: + managed_path = self.target_dir / map1.to_path + if managed_path.is_dir(): + shutil.rmtree(str(managed_path)) + elif managed_path.is_file(): + managed_path.unlink() + for map1 in items: map1.import_from_upstream(upstream_path, self.target_dir, @@ -521,18 +529,43 @@ def _export_patches(patchrepo_clone_url, target_patch_dir, upstream_rev, def ignore_patterns(base_dir, *patterns): - """Similar to shutil.ignore_patterns, but with support for directory excludes.""" + """Similar to shutil.ignore_patterns, but with support for directory excludes. + + Unlike fnmatch, '*' does not match path separators. Use '**' to match + across directory boundaries. + """ + import re as _re + + def _compile(pattern): + # Convert glob pattern to regex: * matches within one component, + # ** matches across components, ? matches one non-separator character. + i, result = 0, '' + while i < len(pattern): + if pattern[i:i+2] == '**': + result += '.*' + i += 2 + elif pattern[i] == '*': + result += '[^/]*' + i += 1 + elif pattern[i] == '?': + result += '[^/]' + i += 1 + else: + result += _re.escape(pattern[i]) + i += 1 + return _re.compile('^' + result + '$') + + compiled = [_compile(p) for p in patterns] + def _rel_to_base(path, name): return os.path.relpath(os.path.join(path, name), base_dir) def _ignore_patterns(path, names): ignored_names = [] - for pattern in patterns: - pattern_matches = [ - n for n in names - if fnmatch.fnmatch(_rel_to_base(path, n), pattern) - ] - ignored_names.extend(pattern_matches) + for regex in compiled: + ignored_names.extend( + n for n in names if regex.match(_rel_to_base(path, n)) + ) return set(ignored_names) return _ignore_patterns