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PLIC DV - Top-level priority-arbitration test #678

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@martin-velay

Implement chip_rv_plic_priority (rv_plic_priority_test / rv_plic_priority_test_cheri, V2, placeholder registered).

SW configures distinct priorities for several interrupt sources (for example UART, SPI device, GPIO, mailbox) and a non-zero threshold, then forces all of them simultaneously. The test confirms that only the highest-priority source above the threshold is delivered first, and that after each claim/complete the next-highest follows in strict priority order. The sequence is then repeated with the priority assignments rotated, to confirm the ordering is driven by the configured priority values and not by the interrupt ID.

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