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Optimize stack management and update QEMU port
- Implement symbolic stack offsets for RISC-V 32-bit GNU port. - Harmonize context restoration across all scheduling paths. - Clean up assembly files within the risc-v32/gnu source directory.
1 parent 39ede67 commit a1b2457

9 files changed

Lines changed: 73 additions & 146 deletions

‎ports/risc-v32/gnu/inc/tx_port.h‎

Lines changed: 17 additions & 31 deletions
Original file line numberDiff line numberDiff line change
@@ -30,7 +30,6 @@
3030
/* AUTHOR */
3131
/* */
3232
/* Akif Ejaz, 10xEngineers */
33-
/* Wei-Chen Lai, National Cheng Kung University */
3433
/* */
3534
/* DESCRIPTION */
3635
/* */
@@ -177,16 +176,15 @@
177176
alternately be defined on the command line. */
178177

179178
#include "tx_user.h"
180-
#endif /* TX_INCLUDE_USER_DEFINE_FILE */
179+
#endif
180+
181181

182-
#endif /* __ASSEMBLER__ */
182+
/* Define compiler library include files. */
183183

184184

185185
/* Define ThreadX basic types for this port. */
186186

187187
#define VOID void
188-
189-
#ifndef __ASSEMBLER__
190188
typedef char CHAR;
191189
typedef unsigned char UCHAR;
192190
typedef int INT;
@@ -197,7 +195,8 @@ typedef unsigned long long ULONG64;
197195
typedef short SHORT;
198196
typedef unsigned short USHORT;
199197
#define ULONG64_DEFINED
200-
#endif /* __ASSEMBLER__ */
198+
#define ALIGN_TYPE_DEFINED
199+
#define ALIGN_TYPE ULONG64
201200

202201

203202

@@ -346,33 +345,21 @@ typedef unsigned short USHORT;
346345

347346
#ifdef TX_DISABLE_INLINE
348347

349-
unsigned int _tx_thread_interrupt_control(unsigned int new_posture);
348+
ULONG64 _tx_thread_interrupt_control(unsigned int new_posture);
350349

351-
#define TX_INTERRUPT_SAVE_AREA register INT interrupt_save;
350+
#define TX_INTERRUPT_SAVE_AREA register ULONG64 interrupt_save;
352351

353352
#define TX_DISABLE interrupt_save = _tx_thread_interrupt_control(TX_INT_DISABLE);
354353
#define TX_RESTORE _tx_thread_interrupt_control(interrupt_save);
355354

356355
#else
357356

358-
#define TX_INTERRUPT_SAVE_AREA ULONG interrupt_save;
359-
360-
#define TX_DISABLE \
361-
__asm__ volatile ( \
362-
"csrr %0, mstatus\n\t" \
363-
"csrci mstatus, 8" \
364-
: "=r" (interrupt_save) \
365-
: \
366-
: "memory" \
367-
);
368-
369-
#define TX_RESTORE \
370-
__asm__ volatile ( \
371-
"csrw mstatus, %0\n\t" \
372-
: \
373-
: "r" (interrupt_save) \
374-
: "memory" \
375-
);
357+
#define TX_INTERRUPT_SAVE_AREA ULONG64 interrupt_save;
358+
/* Atomically read mstatus into interrupt_save and clear bit 3 of mstatus. */
359+
#define TX_DISABLE {__asm__ ("csrrci %0, mstatus, 0x08" : "=r" (interrupt_save) : );};
360+
/* We only care about mstatus.mie (bit 3), so mask interrupt_save and write to mstatus. */
361+
#define TX_RESTORE {register ULONG64 __tempmask = interrupt_save & 0x08; \
362+
__asm__ ("csrrs x0, mstatus, %0 \n\t" : : "r" (__tempmask) : );};
376363

377364
#endif
378365

@@ -389,13 +376,12 @@ unsigned int _tx_thread_interrupt_control(uns
389376

390377
/* Define the version ID of ThreadX. This may be utilized by the application. */
391378

392-
#ifndef __ASSEMBLER__
393379
#ifdef TX_THREAD_INIT
394380
CHAR _tx_version_id[] =
395-
"(c) 2024 Microsoft Corp. (c) 2026-present Eclipse ThreadX contributors. * ThreadX RISC-V32/GNU Version 6.5.0.202601 *";
381+
"Copyright (c) 2024 Microsoft Corporation. * ThreadX RISC-V32/GNU Version 6.4.2 *";
396382
#else
397383
extern CHAR _tx_version_id[];
398-
#endif /* TX_THREAD_INIT */
399-
#endif /* __ASSEMBLER__ */
384+
#endif
400385

401-
#endif /* TX_PORT_H */
386+
#endif /*not __ASSEMBLER__ */
387+
#endif

‎ports/risc-v32/gnu/src/tx_initialize_low_level.S‎

Lines changed: 1 addition & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -35,6 +35,7 @@ __tx_free_memory_start:
3535
/* AUTHOR */
3636
/* */
3737
/* Akif Ejaz, 10xEngineers */
38+
/* Wei-Chen Lai, National Cheng Kung University */
3839
/* */
3940
/* DESCRIPTION */
4041
/* */
@@ -60,12 +61,6 @@ __tx_free_memory_start:
6061
/* */
6162
/* _tx_initialize_kernel_enter ThreadX entry function */
6263
/* */
63-
/* RELEASE HISTORY */
64-
/* */
65-
/* DATE NAME DESCRIPTION */
66-
/* */
67-
/* 23-12-2025 Akif Ejaz Initial Version 6.4.x */
68-
/* */
6964
/**************************************************************************/
7065
/* VOID _tx_initialize_low_level(VOID)
7166
{ */

‎ports/risc-v32/gnu/src/tx_thread_context_restore.S‎

Lines changed: 1 addition & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -31,6 +31,7 @@
3131
/* AUTHOR */
3232
/* */
3333
/* Akif Ejaz, 10xEngineers */
34+
/* Wei-Chen Lai, National Cheng Kung University */
3435
/* */
3536
/* DESCRIPTION */
3637
/* */
@@ -55,12 +56,6 @@
5556
/* */
5657
/* ISRs Interrupt Service Routines */
5758
/* */
58-
/* RELEASE HISTORY */
59-
/* */
60-
/* DATE NAME DESCRIPTION */
61-
/* */
62-
/* 23-12-2025 Akif Ejaz Initial Version 6.4.x */
63-
/* */
6459
/**************************************************************************/
6560
/* VOID _tx_thread_context_restore(VOID)
6661
{ */

‎ports/risc-v32/gnu/src/tx_thread_context_save.S‎

Lines changed: 1 addition & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -31,6 +31,7 @@
3131
/* AUTHOR */
3232
/* */
3333
/* Akif Ejaz, 10xEngineers */
34+
/* Wei-Chen Lai, National Cheng Kung University */
3435
/* */
3536
/* DESCRIPTION */
3637
/* */
@@ -54,12 +55,6 @@
5455
/* */
5556
/* ISRs */
5657
/* */
57-
/* RELEASE HISTORY */
58-
/* */
59-
/* DATE NAME DESCRIPTION */
60-
/* */
61-
/* 23-12-2025 Akif Ejaz Initial Version 6.4.x */
62-
/* */
6358
/**************************************************************************/
6459
/* VOID _tx_thread_context_save(VOID)
6560
{ */

‎ports/risc-v32/gnu/src/tx_thread_interrupt_control.S‎

Lines changed: 5 additions & 14 deletions
Original file line numberDiff line numberDiff line change
@@ -19,19 +19,10 @@
1919
/**************************************************************************/
2020
/**************************************************************************/
2121

22-
/* #define TX_SOURCE_CODE */
23-
24-
25-
/* Include necessary system files. */
26-
27-
/* #include "tx_api.h"
28-
#include "tx_thread.h" */
29-
30-
.equ RETURN_MASK, 0x0000000F
31-
.equ SET_SR_MASK, 0xFFFFFFF0
22+
RETURN_MASK = 0x0000000F
23+
SET_SR_MASK = 0xFFFFFFF0
3224

3325
.section .text
34-
.balign 4
3526
/**************************************************************************/
3627
/* */
3728
/* FUNCTION RELEASE */
@@ -65,21 +56,21 @@
6556
/* Application Code */
6657
/* */
6758
/**************************************************************************/
68-
6959
/* UINT _tx_thread_interrupt_control(UINT new_posture)
7060
{ */
71-
.globl _tx_thread_interrupt_control
61+
.global _tx_thread_interrupt_control
7262
_tx_thread_interrupt_control:
7363
/* Pickup current interrupt lockout posture. */
7464

7565
csrr t0, mstatus
7666
mv t1, t0 // Save original mstatus for return
7767

7868
/* Apply the new interrupt posture. */
79-
69+
8070
li t2, SET_SR_MASK // Build set SR mask
8171
and t0, t0, t2 // Isolate interrupt lockout bits
8272
or t0, t0, a0 // Put new lockout bits in
8373
csrw mstatus, t0
8474
andi a0, t1, RETURN_MASK // Return original mstatus.
8575
ret
76+
/* } */

‎ports/risc-v32/gnu/src/tx_thread_schedule.S‎

Lines changed: 1 addition & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -31,6 +31,7 @@
3131
/* AUTHOR */
3232
/* */
3333
/* Akif Ejaz, 10xEngineers */
34+
/* Wei-Chen Lai, National Cheng Kung University */
3435
/* */
3536
/* DESCRIPTION */
3637
/* */
@@ -56,12 +57,6 @@
5657
/* _tx_thread_system_return Return to system from thread */
5758
/* _tx_thread_context_restore Restore thread's context */
5859
/* */
59-
/* RELEASE HISTORY */
60-
/* */
61-
/* DATE NAME DESCRIPTION */
62-
/* */
63-
/* 23-12-2025 Akif Ejaz Initial Version 6.4.x */
64-
/* */
6560
/**************************************************************************/
6661
/* VOID _tx_thread_schedule(VOID)
6762
{ */

‎ports/risc-v32/gnu/src/tx_thread_stack_build.S‎

Lines changed: 34 additions & 39 deletions
Original file line numberDiff line numberDiff line change
@@ -31,6 +31,7 @@
3131
/* AUTHOR */
3232
/* */
3333
/* Akif Ejaz, 10xEngineers */
34+
/* Wei-Chen Lai, National Cheng Kung University */
3435
/* */
3536
/* DESCRIPTION */
3637
/* */
@@ -55,12 +56,6 @@
5556
/* */
5657
/* _tx_thread_create Create thread service */
5758
/* */
58-
/* RELEASE HISTORY */
59-
/* */
60-
/* DATE NAME DESCRIPTION */
61-
/* */
62-
/* 23-12-2025 Akif Ejaz Initial Version 6.4.x */
63-
/* */
6459
/**************************************************************************/
6560
/* VOID _tx_thread_stack_build(TX_THREAD *thread_ptr, VOID (*function_ptr)(VOID))
6661
{ */
@@ -102,39 +97,39 @@ _tx_thread_stack_build:
10297
-- 29 reserved
10398
mepc 30 Initial mepc
10499
If floating point support:
105-
f0 31 Inital ft0
106-
f1 32 Inital ft1
107-
f2 33 Inital ft2
108-
f3 34 Inital ft3
109-
f4 35 Inital ft4
110-
f5 36 Inital ft5
111-
f6 37 Inital ft6
112-
f7 38 Inital ft7
113-
f8 39 Inital fs0
114-
f9 40 Inital fs1
115-
f10 41 Inital fa0
116-
f11 42 Inital fa1
117-
f12 43 Inital fa2
118-
f13 44 Inital fa3
119-
f14 45 Inital fa4
120-
f15 46 Inital fa5
121-
f16 47 Inital fa6
122-
f17 48 Inital fa7
123-
f18 49 Inital fs2
124-
f19 50 Inital fs3
125-
f20 51 Inital fs4
126-
f21 52 Inital fs5
127-
f22 53 Inital fs6
128-
f23 54 Inital fs7
129-
f24 55 Inital fs8
130-
f25 56 Inital fs9
131-
f26 57 Inital fs10
132-
f27 58 Inital fs11
133-
f28 59 Inital ft8
134-
f29 60 Inital ft9
135-
f30 61 Inital ft10
136-
f31 62 Inital ft11
137-
fscr 63 Inital fscr
100+
f0 31 Initial ft0
101+
f1 32 Initial ft1
102+
f2 33 Initial ft2
103+
f3 34 Initial ft3
104+
f4 35 Initial ft4
105+
f5 36 Initial ft5
106+
f6 37 Initial ft6
107+
f7 38 Initial ft7
108+
f8 39 Initial fs0
109+
f9 40 Initial fs1
110+
f10 41 Initial fa0
111+
f11 42 Initial fa1
112+
f12 43 Initial fa2
113+
f13 44 Initial fa3
114+
f14 45 Initial fa4
115+
f15 46 Initial fa5
116+
f16 47 Initial fa6
117+
f17 48 Initial fa7
118+
f18 49 Initial fs2
119+
f19 50 Initial fs3
120+
f20 51 Initial fs4
121+
f21 52 Initial fs5
122+
f22 53 Initial fs6
123+
f23 54 Initial fs7
124+
f24 55 Initial fs8
125+
f25 56 Initial fs9
126+
f26 57 Initial fs10
127+
f27 58 Initial fs11
128+
f28 59 Initial ft8
129+
f29 60 Initial ft9
130+
f30 61 Initial ft10
131+
f31 62 Initial ft11
132+
fscr 63 Initial fscr
138133
139134
Stack Bottom: (higher memory address) */
140135

‎ports/risc-v32/gnu/src/tx_thread_system_return.S‎

Lines changed: 1 addition & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -31,6 +31,7 @@
3131
/* AUTHOR */
3232
/* */
3333
/* Akif Ejaz, 10xEngineers */
34+
/* Wei-Chen Lai, National Cheng Kung University */
3435
/* */
3536
/* DESCRIPTION */
3637
/* */
@@ -55,12 +56,6 @@
5556
/* */
5657
/* ThreadX components */
5758
/* */
58-
/* RELEASE HISTORY */
59-
/* */
60-
/* DATE NAME DESCRIPTION */
61-
/* */
62-
/* 23-12-2025 Akif Ejaz Initial Version 6.4.x */
63-
/* */
6459
/**************************************************************************/
6560
/* VOID _tx_thread_system_return(VOID)
6661
{ */

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