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2 | 2 | from devito.core.cpu import (Cpu64NoopCOperator, Cpu64NoopOmpOperator, |
3 | 3 | Cpu64AdvCOperator, Cpu64AdvOmpOperator, |
4 | 4 | Cpu64FsgCOperator, Cpu64FsgOmpOperator, |
5 | | - Cpu64CustomOperator, Cpu64CXXCustomOperator, |
| 5 | + Cpu64CustomOperator, Cpu64CustomCXXOperator, |
6 | 6 | Cpu64CXXNoopCOperator, Cpu64CXXNoopOmpOperator, |
7 | | - Cpu64AdvCXXOperator, Cpu64CXXAdvOmpOperator, |
8 | | - Cpu64CXXFsgCOperator, Cpu64CXXFsgOmpOperator) |
| 7 | + Cpu64AdvCXXOperator, Cpu64AdvCXXOmpOperator, |
| 8 | + Cpu64FsgCXXOperator, Cpu64FsgCXXOmpOperator) |
9 | 9 |
|
10 | 10 | from devito.core.intel import (Intel64AdvCOperator, Intel64AdvOmpOperator, |
11 | 11 | Intel64FsgCOperator, Intel64FsgOmpOperator, |
12 | | - Intel64CXXAdvCOperator, Intel64CXXAdvOmpOperator, |
13 | | - Intel64CXXFsgCOperator, Intel64CXXFsgOmpOperator) |
| 12 | + Intel64CXXAdvCOperator, Intel64AdvCXXOmpOperator, |
| 13 | + Intel64FsgCXXOperator, Intel64FsgCXXOmpOperator) |
14 | 14 | from devito.core.arm import (ArmAdvCOperator, ArmAdvOmpOperator, |
15 | | - ArmCXXAdvCOperator, ArmCXXAdvOmpOperator) |
| 15 | + ArmAdvCXXOperator, ArmAdvCXXOmpOperator) |
16 | 16 | from devito.core.power import (PowerAdvCOperator, PowerAdvOmpOperator, |
17 | | - PowerCXXAdvCOperator, PowerCXXAdvOmpOperator) |
| 17 | + PowerCXXAdvCOperator, PowerAdvCXXOmpOperator) |
18 | 18 | from devito.core.gpu import (DeviceNoopOmpOperator, DeviceNoopAccOperator, |
19 | 19 | DeviceAdvOmpOperator, DeviceAdvAccOperator, |
20 | 20 | DeviceFsgOmpOperator, DeviceFsgAccOperator, |
|
24 | 24 | # Register CPU Operators |
25 | 25 | operator_registry.add(Cpu64CustomOperator, Cpu64, 'custom', 'C') |
26 | 26 | operator_registry.add(Cpu64CustomOperator, Cpu64, 'custom', 'openmp') |
27 | | -operator_registry.add(Cpu64CXXCustomOperator, Cpu64, 'custom', 'CXX') |
28 | | -operator_registry.add(Cpu64CXXCustomOperator, Cpu64, 'custom', 'CXXopenmp') |
| 27 | +operator_registry.add(Cpu64CustomCXXOperator, Cpu64, 'custom', 'CXX') |
| 28 | +operator_registry.add(Cpu64CustomCXXOperator, Cpu64, 'custom', 'CXXopenmp') |
29 | 29 |
|
30 | 30 | operator_registry.add(Cpu64NoopCOperator, Cpu64, 'noop', 'C') |
31 | 31 | operator_registry.add(Cpu64NoopOmpOperator, Cpu64, 'noop', 'openmp') |
|
35 | 35 | operator_registry.add(Cpu64AdvCOperator, Cpu64, 'advanced', 'C') |
36 | 36 | operator_registry.add(Cpu64AdvOmpOperator, Cpu64, 'advanced', 'openmp') |
37 | 37 | operator_registry.add(Cpu64AdvCXXOperator, Cpu64, 'advanced', 'CXX') |
38 | | -operator_registry.add(Cpu64CXXAdvOmpOperator, Cpu64, 'advanced', 'CXXopenmp') |
| 38 | +operator_registry.add(Cpu64AdvCXXOmpOperator, Cpu64, 'advanced', 'CXXopenmp') |
39 | 39 |
|
40 | 40 | operator_registry.add(Cpu64FsgCOperator, Cpu64, 'advanced-fsg', 'C') |
41 | 41 | operator_registry.add(Cpu64FsgOmpOperator, Cpu64, 'advanced-fsg', 'openmp') |
42 | | -operator_registry.add(Cpu64CXXFsgCOperator, Cpu64, 'advanced-fsg', 'CXX') |
43 | | -operator_registry.add(Cpu64CXXFsgOmpOperator, Cpu64, 'advanced-fsg', 'CXXopenmp') |
| 42 | +operator_registry.add(Cpu64FsgCXXOperator, Cpu64, 'advanced-fsg', 'CXX') |
| 43 | +operator_registry.add(Cpu64FsgCXXOmpOperator, Cpu64, 'advanced-fsg', 'CXXopenmp') |
44 | 44 |
|
45 | 45 | operator_registry.add(Intel64AdvCOperator, Intel64, 'advanced', 'C') |
46 | 46 | operator_registry.add(Intel64AdvOmpOperator, Intel64, 'advanced', 'openmp') |
47 | 47 | operator_registry.add(Intel64CXXAdvCOperator, Intel64, 'advanced', 'CXX') |
48 | | -operator_registry.add(Intel64CXXAdvOmpOperator, Intel64, 'advanced', 'CXXopenmp') |
| 48 | +operator_registry.add(Intel64AdvCXXOmpOperator, Intel64, 'advanced', 'CXXopenmp') |
49 | 49 |
|
50 | 50 | operator_registry.add(Intel64FsgCOperator, Intel64, 'advanced-fsg', 'C') |
51 | 51 | operator_registry.add(Intel64FsgOmpOperator, Intel64, 'advanced-fsg', 'openmp') |
52 | | -operator_registry.add(Intel64CXXFsgCOperator, Intel64, 'advanced-fsg', 'CXX') |
53 | | -operator_registry.add(Intel64CXXFsgOmpOperator, Intel64, 'advanced-fsg', 'CXXopenmp') |
| 52 | +operator_registry.add(Intel64FsgCXXOperator, Intel64, 'advanced-fsg', 'CXX') |
| 53 | +operator_registry.add(Intel64FsgCXXOmpOperator, Intel64, 'advanced-fsg', 'CXXopenmp') |
54 | 54 |
|
55 | 55 | operator_registry.add(ArmAdvCOperator, Arm, 'advanced', 'C') |
56 | 56 | operator_registry.add(ArmAdvOmpOperator, Arm, 'advanced', 'openmp') |
57 | | -operator_registry.add(ArmCXXAdvCOperator, Arm, 'advanced', 'CXX') |
58 | | -operator_registry.add(ArmCXXAdvOmpOperator, Arm, 'advanced', 'CXXopenmp') |
| 57 | +operator_registry.add(ArmAdvCXXOperator, Arm, 'advanced', 'CXX') |
| 58 | +operator_registry.add(ArmAdvCXXOmpOperator, Arm, 'advanced', 'CXXopenmp') |
59 | 59 |
|
60 | 60 | operator_registry.add(PowerAdvCOperator, Power, 'advanced', 'C') |
61 | 61 | operator_registry.add(PowerAdvOmpOperator, Power, 'advanced', 'openmp') |
62 | 62 | operator_registry.add(PowerCXXAdvCOperator, Power, 'advanced', 'CXX') |
63 | | -operator_registry.add(PowerCXXAdvOmpOperator, Power, 'advanced', 'CXXopenmp') |
| 63 | +operator_registry.add(PowerAdvCXXOmpOperator, Power, 'advanced', 'CXXopenmp') |
64 | 64 |
|
65 | 65 | # Register Device Operators |
66 | 66 | operator_registry.add(DeviceCustomOmpOperator, Device, 'custom', 'C') |
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