s390x: replace type-based isa checks with if-let (#13171)

* s390x: replace type-based isa checks with if-let

As a follow up to #13164, this changes the isa-extension checks in the
s390x backend to match the style of the isa checks in the x64 backend.

The prior style of ISA extension check dates back from prior to if-let
as part of isle.

* s390x: Replace true mie3_disabled with false mie3_enabled

* s390x: Replace true mie4_disabled with false mie4_enabled

* s390x: Replace true vxrs_ext2_disabled with false vxrs_ext2_enabled

* s390x: Replace true vxrs_ext3_disabled with false vxrs_ext3_enabled

* s390x: Rename mie3_enabled to has_mie3

This matches the backend flag, making it more clear where this comes from

* s390x: Rename mie4_enabled to has_mie4

This matches the backend flag, making it more clear where this comes from

* s390x: Rename vxrs_ext2_enabled to has_vxrs_ext2

This matches the backend flag, making it more clear where this comes from

* s390x: Rename vxrs_ext3_enabled to has_vxrs_ext3

This matches the backend flag, making it more clear where this comes from

Author: theotherjimmy

cranelift/codegen/src/isa/s390x/inst.isle

@@ -1580,23 +1580,15 @@
 
 ;; Helpers for querying enabled ISA extensions ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
 
-(decl mie3_enabled () Type)
-(extern extractor mie3_enabled mie3_enabled)
-(decl mie3_disabled () Type)
-(extern extractor mie3_disabled mie3_disabled)
-(decl mie4_enabled () Type)
-(extern extractor mie4_enabled mie4_enabled)
-(decl mie4_disabled () Type)
-(extern extractor mie4_disabled mie4_disabled)
-
-(decl vxrs_ext2_enabled () Type)
-(extern extractor vxrs_ext2_enabled vxrs_ext2_enabled)
-(decl vxrs_ext2_disabled () Type)
-(extern extractor vxrs_ext2_disabled vxrs_ext2_disabled)
-(decl vxrs_ext3_enabled () Type)
-(extern extractor vxrs_ext3_enabled vxrs_ext3_enabled)
-(decl vxrs_ext3_disabled () Type)
-(extern extractor vxrs_ext3_disabled vxrs_ext3_disabled)
+(decl pure has_mie3 () bool)
+(extern constructor has_mie3 has_mie3)
+(decl pure has_mie4 () bool)
+(extern constructor has_mie4 has_mie4)
+
+(decl pure has_vxrs_ext2 () bool)
+(extern constructor has_vxrs_ext2 has_vxrs_ext2)
+(decl pure has_vxrs_ext3 () bool)
+(extern constructor has_vxrs_ext3 has_vxrs_ext3)
 
 ;; Helpers for SIMD lane number operations ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
 
@@ -1945,27 +1937,37 @@
       (memarg_reg_plus_reg_plus_off x y z flags))
 
 (rule 1 (lower_address flags
-                     (symbol_value _ (symbol_value_data name (RelocDistance.Near) sym_offset))
-                     (i64_from_offset offset))
+          (symbol_value _ (symbol_value_data name (RelocDistance.Near) sym_offset))
+          (i64_from_offset offset))
       (if-let final_offset (memarg_symbol_offset_sum offset sym_offset))
       (memarg_symbol name final_offset flags))
 
-(rule 2 (lower_address flags (has_type (mie4_enabled)
+(rule 2 (lower_address flags
           (iadd $I64 (ishl $I64 (uextend $I64 (iadd $I32 x (simm20_from_value z)))
-                       (u8_from_value shift)) y)) (i64_from_offset offset))
+                       (u8_from_value shift)) y)
+          (i64_from_offset offset))
+      (if-let true (has_mie4))
       (memarg_reg_plus_off (load_logical_indexed_addr x y z shift) offset 0 flags))
 
-(rule 3 (lower_address flags (has_type (mie4_enabled)
+(rule 3 (lower_address flags
           (iadd $I64 y (ishl $I64 (uextend $I64 (iadd $I32 x (simm20_from_value z)))
-                         (u8_from_value shift)))) (i64_from_offset offset))
+                         (u8_from_value shift)))
+          (i64_from_offset offset))
+      (if-let true (has_mie4))
       (memarg_reg_plus_off (load_logical_indexed_addr y x z shift) offset 0 flags))
 
-(rule 4 (lower_address flags (has_type (mie4_enabled)
-          (iadd $I64 (ishl $I64 (sextend $I64 (iadd $I32 x (simm20_from_value z))) (u8_from_value shift)) y)) (i64_from_offset offset))
+(rule 4 (lower_address flags
+          (iadd $I64 (ishl $I64 (sextend $I64 (iadd $I32 x (simm20_from_value z)))
+                       (u8_from_value shift)) y)
+          (i64_from_offset offset))
+      (if-let true (has_mie4))
       (memarg_reg_plus_off (load_indexed_addr x y z shift) offset 0 flags))
 
-(rule 5 (lower_address flags (has_type (mie4_enabled)
-          (iadd $I64 y (ishl $I64 (sextend $I64 (iadd $I32 x (simm20_from_value z))) (u8_from_value shift)))) (i64_from_offset offset))
+(rule 5 (lower_address flags
+          (iadd $I64 y (ishl $I64 (sextend $I64 (iadd $I32 x (simm20_from_value z)))
+                         (u8_from_value shift)))
+          (i64_from_offset offset))
+      (if-let true (has_mie4))
       (memarg_reg_plus_off (load_indexed_addr y x z shift) offset 0 flags))
 
 ;; Lower an address plus a small bias into a `MemArg`.
@@ -4970,13 +4972,17 @@
 ;; Helpers for generating `fcvt_to_[us]int` instructions ;;;;;;;;;;;;;;;;;;;;;;;
 
 (decl fcvt_flt_ty (Type Type) Type)
-(rule 1 (fcvt_flt_ty (fits_in_32 ty) (and (vxrs_ext2_enabled) $F32)) $F32)
+(rule 1 (fcvt_flt_ty (fits_in_32 ty) $F32)
+      (if-let true (has_vxrs_ext2))
+      $F32)
 (rule (fcvt_flt_ty (fits_in_64 ty) $F32) $F64)
 (rule (fcvt_flt_ty (fits_in_64 ty) $F64) $F64)
 (rule (fcvt_flt_ty (fits_in_64 ty) $F128) $F128)
 
 (decl fcvt_int_ty (Type Type) Type)
-(rule 1 (fcvt_int_ty (fits_in_32 ty) (and (vxrs_ext2_enabled) $F32)) $I32)
+(rule 1 (fcvt_int_ty (fits_in_32 ty) $F32)
+      (if-let true (has_vxrs_ext2))
+      $I32)
 (rule (fcvt_int_ty (fits_in_64 ty) $F32) $I64)
 (rule (fcvt_int_ty (fits_in_64 ty) $F64) $I64)
 (rule 1 (fcvt_int_ty (fits_in_32 ty) $F128) $I32)