Replace inline construction of dead load with call of new dead_load_with_context instruction.

This will give us a convenient place to keep track of dead-load instruction locations and help us reserve the particular registers we need.

* Add `mem_flags_aligned_read_only` helper so we can construct aligned-and-read-only `MemFlags`es in ISLE.
* Add a `preg_rdi` constructor so we can refer to RDI in ISLE.

TODO: Reserve a scratch register to hold the return address.

Author: erikrose

cranelift/codegen/meta/src/shared/instructions.rs

@@ -380,6 +380,36 @@ fn define_control_flow(
         .call()
         .branches(),
     );
+
+    ig.push(
+        Inst::new(
+            "dead_load_with_context",
+            r#"
+        Load 32 bits from memory at ``load_ptr`` while also keeping ``context``
+        in a fixed register and reserving a second as scratch space.
+
+        This is intended for implementing MMU-triggered jumps as in
+        epoch-interruption-via-mmu, where the load conditionally triggers a
+        segfault, which hands off control to a signal handler for further
+        action. The handler has access to ``context`` (typically the
+        ``VMContext``'s ``vm_store_context``) and can use the second
+        reserved register to store a temp value, as needed on platforms
+        where signal handlers cannot push stack frames.
+        "#,
+            &formats.binary,
+        )
+        .operands_in(vec![
+            Operand::new("load_ptr", iAddr).with_doc("memory location to load from"),
+            Operand::new("context", iAddr)
+                .with_doc("arbitrary address-sized context to pass to signal handler"),
+        ])
+        // Are we a call? stack_switch calls itself one "as it continues execution elsewhere".
+        // .is_call()
+        .can_load()
+        // Don't optimize me out just because I don't def anything. TODO: Can we use side_effects_idempotent()?
+        .other_side_effects(),
+        // If `load` is not can_trap(), this isn't either.
+    );
 }
 
 #[inline(never)]

cranelift/codegen/src/isa/x64/inst.isle

@@ -4064,6 +4064,9 @@
 (decl preg_rsp () PReg)
 (extern constructor preg_rsp preg_rsp)
 
+(decl preg_rdi () PReg)
+(extern constructor preg_rdi preg_rdi)
+
 (decl preg_pinned () PReg)
 (extern constructor preg_pinned preg_pinned)
 

cranelift/codegen/src/isa/x64/lower.isle

@@ -3578,6 +3578,17 @@
             (in_payload0 Gpr (put_in_gpr in_payload0)))
         (x64_stack_switch_basic store_context_ptr load_context_ptr in_payload0)))
 
+;;;; Rules for `dead_load_with_context` ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+
+(rule (lower (dead_load_with_context load_ptr context))
+      (let (
+            ;; Put vmctx into rdi. TODO: Do we have to shove context in a different reg first? The type system seems happy to allow it without.
+            (_ SideEffectNoResult (mov_to_preg (preg_rdi) context))
+            ;; Load from load_ptr to perhaps trigger a trap.
+            ;; TODO: May be able to change x64_load to higher-level "load", from codegen/meta/src/shared/instructions.rs.
+            (_ Gpr (x64_load $I64 (to_amode (mem_flags_aligned_read_only) load_ptr (zero_offset)) (ExtKind.None))))
+       (output_none)))
+
 ;;;; Rules for `get_{frame,stack}_pointer` and `get_return_address` ;;;;;;;;;;;;
 
 (rule (lower (get_frame_pointer))

cranelift/codegen/src/isa/x64/lower/isle.rs

@@ -658,6 +658,11 @@ impl Context for IsleContext<'_, '_, MInst, X64Backend> {
         regs::rsp().to_real_reg().unwrap().into()
     }
 
+    #[inline]
+    fn preg_rdi(&mut self) -> PReg {
+        regs::rdi().to_real_reg().unwrap().into()
+    }
+
     #[inline]
     fn preg_pinned(&mut self) -> PReg {
         regs::pinned_reg().to_real_reg().unwrap().into()

cranelift/codegen/src/isle_prelude.rs

@@ -638,6 +638,11 @@ macro_rules! isle_common_prelude_methods {
             MemFlags::trusted()
         }
 
+        #[inline]
+        fn mem_flags_aligned_read_only(&mut self) -> MemFlags {
+            MemFlags::new().with_aligned().with_readonly()
+        }
+
         #[inline]
         fn little_or_native_endian(&mut self, flags: MemFlags) -> Option<MemFlags> {
             match flags.explicit_endianness() {

cranelift/codegen/src/prelude.isle

@@ -304,10 +304,15 @@
 
 ;; `MemFlags::trusted`
 (spec (mem_flags_trusted)
-      (provide (= result #x0003)))
+      (provide (= result #x0003))) ;; Shouldn't this be 0001?
 (decl pure mem_flags_trusted () MemFlags)
 (extern constructor mem_flags_trusted mem_flags_trusted)
 
+(spec (mem_flags_aligned_read_only)
+      (provide (= result #x0003)))
+(decl pure mem_flags_aligned_read_only () MemFlags)
+(extern constructor mem_flags_aligned_read_only mem_flags_aligned_read_only)
+
 ;; Determine if flags specify little- or native-endian.
 (decl little_or_native_endian (MemFlags) MemFlags)
 (extern extractor little_or_native_endian little_or_native_endian)

crates/cranelift/src/func_environ.rs

@@ -668,21 +668,20 @@ impl<'module_environment> FuncEnvironment<'module_environment> {
         );
         builder.def_var(self.epoch_interrupt_page_ptr_var, epoch_interrupt_page_ptr);
 
-        Self::epoch_mmu_interruption_check(epoch_interrupt_page_ptr, builder);
+        self.epoch_mmu_interruption_check(epoch_interrupt_page_ptr, builder);
     }
 
     /// Codegens a dead load from the epoch interrupt page, which causes a trap
     /// if an interrupt is due.
     fn epoch_mmu_interruption_check(
+        &mut self,
         epoch_interrupt_page_ptr: ir::Value,
         builder: &mut FunctionBuilder<'_>,
     ) {
-        let _ = builder.ins().load(
-            ir::types::I32, // Arbitrary. Pick whatever works on all ISAs and is fastest.
-            ir::MemFlags::new().with_aligned().with_readonly(),
-            epoch_interrupt_page_ptr,
-            ir::immediates::Offset32::new(0),
-        );
+        let vmctx = self.vmctx_val(&mut builder.cursor());
+        let _ = builder
+            .ins()
+            .dead_load_with_context(epoch_interrupt_page_ptr, vmctx);
     }
 
     #[cfg(feature = "wmemcheck")]
@@ -3803,7 +3802,7 @@ impl FuncEnvironment<'_> {
         // it's time.
         if self.tunables.epoch_interruption_via_mmu {
             let page_ptr = builder.use_var(self.epoch_interrupt_page_ptr_var);
-            Self::epoch_mmu_interruption_check(page_ptr, builder);
+            self.epoch_mmu_interruption_check(page_ptr, builder);
         }
 
         Ok(())