Merge pull request #823 from bartsanchez/bart/move-shl16-to-a-class

ref: move shl16 function into a class (Bits16)

Author: boriel

src/arch/z80/backend/_16bit.py

@@ -959,47 +959,47 @@ def shri16(cls, ins: Quad) -> list[str]:
         output.append("push hl")
         return output
 
+    @classmethod
+    def shl16(cls, ins: Quad) -> list[str]:
+        """Logical/aritmetical left shift 16bit (un)signed integer.
+        The result is pushed onto the stack.
 
-def _shl16(ins: Quad) -> list[str]:
-    """Logical/aritmetical left shift 16bit (un)signed integer.
-    The result is pushed onto the stack.
-
-    Optimizations:
-      * If 2nd op is 0 then
-        do nothing
+        Optimizations:
+          * If 2nd op is 0 then
+            do nothing
 
-      * If 2nd op is lower than 6
-        unroll lop
-    """
-    op1, op2 = tuple(ins[2:])
-    label = tmp_label()
-    label2 = tmp_label()
+          * If 2nd op is lower than 6
+            unroll lop
+        """
+        op1, op2 = tuple(ins[2:])
+        label = tmp_label()
+        label2 = tmp_label()
 
-    if is_int(op2):
-        op = int16(op2)
-        if op == 0:
-            return []
+        if is_int(op2):
+            op = int16(op2)
+            if op == 0:
+                return []
 
-        output = Bits16.get_oper(op1)
-        if op < 6:
-            output.extend(["add hl, hl"] * op)
-            output.append("push hl")
-            return output
+            output = Bits16.get_oper(op1)
+            if op < 6:
+                output.extend(["add hl, hl"] * op)
+                output.append("push hl")
+                return output
 
-        output.append("ld b, %i" % op)
-    else:
-        output = Bits8.get_oper(op2)
-        output.append("ld b, a")
-        output.extend(Bits16.get_oper(op1))
-        output.append("or a")
-        output.append("jr z, %s" % label2)
+            output.append("ld b, %i" % op)
+        else:
+            output = Bits8.get_oper(op2)
+            output.append("ld b, a")
+            output.extend(Bits16.get_oper(op1))
+            output.append("or a")
+            output.append("jr z, %s" % label2)
 
-    output.append("%s:" % label)
-    output.append("add hl, hl")
-    output.append("djnz %s" % label)
-    output.append("%s:" % label2)
-    output.append("push hl")
-    return output
+        output.append("%s:" % label)
+        output.append("add hl, hl")
+        output.append("djnz %s" % label)
+        output.append("%s:" % label2)
+        output.append("push hl")
+        return output
 
 
 def _load16(ins: Quad) -> list[str]:

src/arch/z80/backend/main.py

@@ -36,7 +36,6 @@
     _load16,
     _param16,
     _ret16,
-    _shl16,
     _store16,
 )
 
@@ -207,8 +206,8 @@ def _set_quad_table(self):
             ICInstruction.SHLI8: ICInfo(3, Bits8.shl8),
             ICInstruction.SHRU16: ICInfo(3, Bits16.shru16),
             ICInstruction.SHRI16: ICInfo(3, Bits16.shri16),
-            ICInstruction.SHLU16: ICInfo(3, _shl16),
-            ICInstruction.SHLI16: ICInfo(3, _shl16),
+            ICInstruction.SHLU16: ICInfo(3, Bits16.shl16),
+            ICInstruction.SHLI16: ICInfo(3, Bits16.shl16),
             ICInstruction.SHRU32: ICInfo(3, Bits32.shru32),
             ICInstruction.SHRI32: ICInfo(3, Bits32.shri32),
             ICInstruction.SHLU32: ICInfo(3, Bits32.shl32),