M5Stack Core S3 pinout error

[JamesWhitlock]

An issue exists in the pinout for the M5Stack CoreS3. D5 and D6 both map onto GPIO6. It is therefore not possible to use GPIO5. D5 should instead map onto GPIO5 (and probably A5 too to follow the file convention).

circuitpython/ports/espressif/boards/m5stack_cores3/pins.c

Lines 44 to 46 in 234ebf4

	{ MP_ROM_QSTR(MP_QSTR_D6), MP_ROM_PTR(&pin_GPIO6) },
	{ MP_ROM_QSTR(MP_QSTR_A6), MP_ROM_PTR(&pin_GPIO6) },
	{ MP_ROM_QSTR(MP_QSTR_D5), MP_ROM_PTR(&pin_GPIO6) },

[dhalbert]

Hi @CDarius, your PR #9093 added this board. The error above looks like a copy-pasta problem. Do you have the board? Would you be willing to submit a PR to fix, and maybe double-check the other pin assignments? Thanks.

If you do submit a PR, could you group pin aliases (same pin, different names) together, and add blank lines before and after? That makes it easy to see the aliases.

[CDarius]

Yes, I still have the board and I can take a look/fix at the pins assignment. I'm planning to do it mid next week