Every BIR value round-trips through its own 4-byte stack slot, with only t0/t1/t2 as scratch. A simple add is a load, a load, an add and a store. There is no live-range analysis, no coalescing and no rematerialisation, so the output is correct but roughly three times longer than it needs to be.
src/amdgpu/ra_ssa.c is a real allocator and is probably the thing to point at this. Worth noting the prologue currently only pushes ra, so callee-saved save and restore needs adding before anything can live in s0-s11.
Every BIR value round-trips through its own 4-byte stack slot, with only t0/t1/t2 as scratch. A simple add is a load, a load, an add and a store. There is no live-range analysis, no coalescing and no rematerialisation, so the output is correct but roughly three times longer than it needs to be.
src/amdgpu/ra_ssa.c is a real allocator and is probably the thing to point at this. Worth noting the prologue currently only pushes ra, so callee-saved save and restore needs adding before anything can live in s0-s11.