Version and Platform (required):
- Binary Ninja Version: 5.1.8104 Personal, 6eaaf348
- OS: windows
- OS Version: 11
- CPU Architecture: x86_64
Bug Description:
arm64 LDRSW <Xt>, <label>, according to Arm Architecture Reference Manual, does sign extension to 64 bits
but BN doesn't assign 64 bits negative value to the register, causing control flow analysis of indirect jump wrong in this case.
Steps To Reproduce:
load the attachment at 0x83af8, using aarch64
Expected Behavior:
ldrsw x6, data_83b50 sets x6=0xffffffffffffff4c instead of 0xffffff4c
br x25 jumps to 0x83b64 instead of 0x100083b64
Screenshots:
Binary:
binary_0x83af8_0x84.txt
Version and Platform (required):
Bug Description:
arm64
LDRSW <Xt>, <label>, according to Arm Architecture Reference Manual, does sign extension to 64 bitsbut BN doesn't assign 64 bits negative value to the register, causing control flow analysis of indirect jump wrong in this case.
Steps To Reproduce:
load the attachment at 0x83af8, using aarch64
Expected Behavior:
ldrsw x6, data_83b50setsx6=0xffffffffffffff4cinstead of0xffffff4cbr x25jumps to0x83b64instead of0x100083b64Screenshots:
Binary:
binary_0x83af8_0x84.txt